powerpc/85xx: Add Support for Freescale P1010 Processor
Key Features include of the P1010:
* e500v2 core frequency operation of 500 to 800 MHz
* Power consumption less than 5.0 W at 800 MHz core speed
* Dual SATA 3 Gbps controllers with integrated PHY
* Dual PCI Express controllers
* Three 10/100/1000 Mbps enhanced triple-speed Ethernet controllers (eTSECs)
* TCP/IP acceleration and classification capabilities
* IEEE 1588 support
* Lossless flow control
* RGMII, SGMII
* DDR3 with support for a 32-bit data interface (40 bits including ECC),
up to 800 MHz data rate 32/16-bit DDR3 memory controller
* Dedicated security engine featuring trusted boot
* TDM interface
* Dual controller area networks (FlexCAN) controller
* SD/MMC card controller supporting booting from Flash cards
* USB 2.0 host and device controller with an on-chip, high-speed PHY
* Integrated Flash controller (IFC)
* Power Management Controller (PMC)
* Four-channel, general-purpose DMA controller
* I2C controller
* Serial peripheral interface (SPI) controller with master and slave support
* System timers including a periodic interrupt timer, real-time clock,
software watchdog timer, and four general-purpose timers
* Dual DUARTs
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index af7bc09..e1261cf 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -50,6 +50,7 @@
COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
COBJS-$(CONFIG_MPC8569) += ddr-gen3.o
+COBJS-$(CONFIG_P1010) += ddr-gen3.o
COBJS-$(CONFIG_P1011) += ddr-gen3.o
COBJS-$(CONFIG_P1012) += ddr-gen3.o
COBJS-$(CONFIG_P1013) += ddr-gen3.o
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 5b30fbd..d1aa9e7 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
*
* This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
* arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
@@ -64,6 +64,8 @@
CPU_TYPE_ENTRY(8569, 8569_E, 1),
CPU_TYPE_ENTRY(8572, 8572, 2),
CPU_TYPE_ENTRY(8572, 8572_E, 2),
+ CPU_TYPE_ENTRY(P1010, P1010, 1),
+ CPU_TYPE_ENTRY(P1010, P1010_E, 1),
CPU_TYPE_ENTRY(P1011, P1011, 1),
CPU_TYPE_ENTRY(P1011, P1011_E, 1),
CPU_TYPE_ENTRY(P1012, P1012, 1),
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index 76dedeb..e142459 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -69,14 +69,16 @@
/* Enable TSEC2.0 for the platforms that have it if we are using TSEC */
#if defined(CONFIG_TSEC_ENET) && \
- (defined(CONFIG_P1020) || defined(CONFIG_P1011))
+ (defined(CONFIG_P1010) || \
+ defined(CONFIG_P1020) || defined(CONFIG_P1011))
#define CONFIG_TSECV2
#endif
/*
* SEC (crypto unit) major compatible version determination
*/
-#if defined(CONFIG_FSL_CORENET)
+#if defined(CONFIG_FSL_CORENET) || \
+ defined(CONFIG_P1010)
#define CONFIG_SYS_FSL_SEC_COMPAT 4
#elif defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83xx)
#define CONFIG_SYS_FSL_SEC_COMPAT 2
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 71fafa3..6b43dc5 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -1038,6 +1038,8 @@
#define SVR_8569_E 0x808800
#define SVR_8572 0x80E000
#define SVR_8572_E 0x80E800
+#define SVR_P1010 0x80F100
+#define SVR_P1010_E 0x80F900
#define SVR_P1011 0x80E500
#define SVR_P1011_E 0x80ED00
#define SVR_P1012 0x80E501