| commit | b604a41c6bcfb6273e7478089ff3e7b65e233645 | [log] [tgz] |
|---|---|---|
| author | Patrick Delaunay <patrick.delaunay@st.com> | Fri Mar 06 11:14:09 2020 +0100 |
| committer | Patrick Delaunay <patrick.delaunay@st.com> | Tue Mar 24 14:23:18 2020 +0100 |
| tree | dc7f3cd77c1fecd3024f0eeb51a281a007fd530e | |
| parent | 8c9ce0807545976c4080621be80dfb02b4ead400 [diff] |
ram: stm32mp1_ddr: fix self refresh disable during DQS training DDRCTRL_PWRCTL.SELFREF_EN needs to be reset before DQS training step, not to enter in self refresh mode during the execution of this phase. Depending on settings, it can be set after the DQS training. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Patrice Chotard <patrice.chotard@st.com>