AVR32: Add clk and gpio infrastructure for macb0 and macb1
Implement functions for configuring the macb0 and macb1 pins, as
well as functions for getting the clock rate of the various
busses the macb ethernet controllers are connected to.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
diff --git a/include/asm-avr32/arch-at32ap7000/clk.h b/include/asm-avr32/arch-at32ap7000/clk.h
index 4a25b17..1ca5b48 100644
--- a/include/asm-avr32/arch-at32ap7000/clk.h
+++ b/include/asm-avr32/arch-at32ap7000/clk.h
@@ -54,5 +54,13 @@
{
return get_pba_clk_rate();
}
+static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
+{
+ return get_pbb_clk_rate();
+}
+static inline unsigned long get_macb_hclk_rate(unsigned int dev_id)
+{
+ return get_hsb_clk_rate();
+}
#endif /* __ASM_AVR32_ARCH_CLK_H__ */