tree 83a0c0ba0d23cb01a7bfa72bb9c9b6b8cb3dc94b
parent bc13472867beaf350b569a98c49a102476537e4f
author Stephen Warren <swarren@nvidia.com> 1424812107 -0700
committer Tom Warren <twarren@nvidia.com> 1425488940 -0700

ARM: tegra: pinmux: partially handle varying register layouts

Tegra210 moves some bits around in the pinmux registers. Update the code
to handle this.

This doesn't attempt to address the issues with the group-to-group varying
drive group register layout mentioned earlier. This patch handles the
SoC-to-SoC differences in the mux register layout.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>