| commit | ad9dcb50019d3d87aa658079907451a3e371c687 | [log] [tgz] |
|---|---|---|
| author | Andre Przywara <andre.przywara@arm.com> | Mon Sep 05 16:25:57 2022 +0100 |
| committer | Andre Przywara <andre.przywara@arm.com> | Sun Oct 22 23:41:51 2023 +0100 |
| tree | 6f2c45a89ceabac10b7abfe3f795ae16507b7d4d | |
| parent | 4a9e89a3e390bbff31aec25f9ec6d32e29e355f5 [diff] |
pinctrl: sunxi: add Allwinner D1 pinctrl description Apart from using the new pinctrl MMIO register layout, the Allwinner D1 and related SoCs still need to usual set of mux values hardcoded in U-Boot's pinctrl driver. Add the values we need so far to this list, so that DM based drivers will just work without further ado. Signed-off-by: Andre Przywara <andre.przywara@arm.com>