commit abc7d0f75c078524f713cb2d4b4efe1b1a122c60
author Shaohui Xie <Shaohui.Xie@nxp.com> Thu Jan 28 15:38:15 2016 +0800
committer York Sun <york.sun@nxp.com> Mon Mar 21 12:42:10 2016 -0700
tree 93b1b221776309ecda58810f5ba0e2093ecc51f6
parent 2b690b9837b4bb6d3598e4259581e399d078bff8

armv8: ls2080ardb: invert irq pins polarity for AQR405 PHY

To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins
polarity by setting IRQCR register, because AQR405 interrupt is low
active but GIC accepts high active.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

include/configs/ls2080ardb.h

diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index b2c0181..14635b7 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -355,6 +355,7 @@
 #define AQ_PHY_ADDR2		0x01
 #define AQ_PHY_ADDR3		0x02
 #define AQ_PHY_ADDR4		0x03
+#define AQR405_IRQ_MASK		0x36
 
 #define CONFIG_MII
 #define CONFIG_ETHPRIME		"DPNI1"