| commit | a776493f4b4b51515db456e635709a93e256dacd | [log] [tgz] |
|---|---|---|
| author | Christian Marangi <ansuelsmth@gmail.com> | Sat Aug 03 10:43:24 2024 +0200 |
| committer | Tom Rini <trini@konsulko.com> | Mon Aug 19 16:15:26 2024 -0600 |
| tree | 60e59679c43a4e54ab01040f9db15ba27fef74c6 | |
| parent | a942c0c3f5d454241cf2c1d61d06a42dcd6a14cc [diff] |
clk: mediatek: mt7622: add missing clock PERI_UART4_PD Add missing clock PERI_UART4_PD for peri clock gates. This is needed to match upstream linux clk ID in preparation for OF_UPSTREAM. Also convert infracfg to mux + gate implementation as now we have mux on top of gates. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>