ppc4xx: Consolidate pci_pre_init() function
This patch removes the duplicted implementations of the pci_pre_init()
function by introducing a weak default function for it. This weak default
has a different implementation for some PPC variants. It can be
overridden by a board specific version.
Signed-off-by: Stefan Roese <sr@denx.de>
diff --git a/board/korat/korat.c b/board/korat/korat.c
index 02ebfdf..78ccb11 100644
--- a/board/korat/korat.c
+++ b/board/korat/korat.c
@@ -595,71 +595,13 @@
/*
* Assign interrupts to PCI devices.
*/
-void korat_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
+void board_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
{
pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, VECNUM_EIRQ2);
}
#endif
/*
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
- */
-#if defined(CONFIG_PCI)
-int pci_pre_init(struct pci_controller *hose)
-{
- unsigned long addr;
-
- /*
- * Set priority for all PLB3 devices to 0.
- * Set PLB3 arbiter to fair mode.
- */
- mfsdr(SD0_AMP1, addr);
- mtsdr(SD0_AMP1, (addr & 0x000000FF) | 0x0000FF00);
- addr = mfdcr(PLB3_ACR);
- mtdcr(PLB3_ACR, addr | 0x80000000);
-
- /*
- * Set priority for all PLB4 devices to 0.
- */
- mfsdr(SD0_AMP0, addr);
- mtsdr(SD0_AMP0, (addr & 0x000000FF) | 0x0000FF00);
- addr = mfdcr(PLB4_ACR) | 0xa0000000; /* Was 0x8---- */
- mtdcr(PLB4_ACR, addr);
-
- /*
- * Set Nebula PLB4 arbiter to fair mode.
- */
- /* Segment0 */
- addr = (mfdcr(PLB0_ACR) & ~PLB0_ACR_PPM_MASK) | PLB0_ACR_PPM_FAIR;
- addr = (addr & ~PLB0_ACR_HBU_MASK) | PLB0_ACR_HBU_ENABLED;
- addr = (addr & ~PLB0_ACR_RDP_MASK) | PLB0_ACR_RDP_4DEEP;
- addr = (addr & ~PLB0_ACR_WRP_MASK) | PLB0_ACR_WRP_2DEEP;
- mtdcr(PLB0_ACR, addr);
-
- /* Segment1 */
- addr = (mfdcr(PLB1_ACR) & ~PLB1_ACR_PPM_MASK) | PLB1_ACR_PPM_FAIR;
- addr = (addr & ~PLB1_ACR_HBU_MASK) | PLB1_ACR_HBU_ENABLED;
- addr = (addr & ~PLB1_ACR_RDP_MASK) | PLB1_ACR_RDP_4DEEP;
- addr = (addr & ~PLB1_ACR_WRP_MASK) | PLB1_ACR_WRP_2DEEP;
- mtdcr(PLB1_ACR, addr);
-
-#if defined(CONFIG_PCI_PNP)
- hose->fixup_irq = korat_pci_fixup_irq;
-#endif
-
- return 1;
-}
-#endif /* defined(CONFIG_PCI) */
-
-/*
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci