commit | a74e9d899d98037c75ca770d02367e26c179b45c | [log] [tgz] |
---|---|---|
author | Green Wan <green.wan@sifive.com> | Thu May 27 06:52:07 2021 -0700 |
committer | Leo Yu-Chi Liang <ycliang@andestech.com> | Mon May 31 16:35:53 2021 +0800 |
tree | 942066f839c98c68e8c41383ac5e405ea93b95c2 | |
parent | ffd810487ec2ff6095edf3f3d058d7ed6eb85ff3 [diff] |
riscv: cpu: fu740: Add support for cpu fu740 Add SiFive fu740 cpu to support RISC-V arch Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>