| commit | a46dce2817f574ee1186cc82a19ca9a99869b349 | [log] [tgz] |
|---|---|---|
| author | Patrick Delaunay <patrick.delaunay@foss.st.com> | Fri May 20 18:24:50 2022 +0200 |
| committer | Patrick Delaunay <patrick.delaunay@foss.st.com> | Fri Jun 17 10:41:16 2022 +0200 |
| tree | 0589833b5c9de92888fe60071500751bb1bfaf99 | |
| parent | ae3e2c2bf775e935eb08fcc8fee236b1633c6fd0 [diff] |
ram: stm32mp1: add support of STM32MP13x Add support for new compatible "st,stm32mp13-ddr" to manage the DDR sub system (Controller and PHY) in STM32MP13x SOC: - only one AXI port - support of 16 port output (MEMC_DRAM_DATA_WIDTH = 2) The STM32MP15x SOC have 2 AXI ports and 32 bits support. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>