x86: qemu: setup PM IO base for ACPI in southbridge
Enable ACPI IO space for piix4 (for pc board) and ich9 (for q35 board)
Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/arch/x86/include/asm/arch-qemu/device.h b/arch/x86/include/asm/arch-qemu/device.h
index 75a435e..38ab798 100644
--- a/arch/x86/include/asm/arch-qemu/device.h
+++ b/arch/x86/include/asm/arch-qemu/device.h
@@ -13,6 +13,8 @@
#define PIIX_ISA PCI_BDF(0, 1, 0)
#define PIIX_IDE PCI_BDF(0, 1, 1)
#define PIIX_USB PCI_BDF(0, 1, 2)
+#define PIIX_PM PCI_BDF(0, 1, 3)
+#define ICH9_PM PCI_BDF(0, 0x1f, 0)
#define I440FX_VGA PCI_BDF(0, 2, 0)
#define QEMU_Q35 PCI_BDF(0, 0, 0)