| commit | a2c74aaf51171fbdfab725c4dd05b58b1ce45070 | [log] [tgz] |
|---|---|---|
| author | Peng Fan <Peng.Fan@freescale.com> | Mon Jul 20 19:28:28 2015 +0800 |
| committer | Stefano Babic <sbabic@denx.de> | Sun Aug 02 11:05:08 2015 +0200 |
| tree | 4a42ddb2bb0954063819ee3f895e6cf05d10b45f | |
| parent | 43cb127b75d7511705e14d4d8b761f61d102bde7 [diff] |
imx: mx6ul select SYS_L2CACHE_OFF i.MX6UL features an Cortex-A7 core, it does not have PL310 as other i.MX6 chips. To Cortex-A7 core, If D-Cache is enabled, L2 Cache is enabled. There is on specific switch for on/off L2 Cache, so default select SYS_L2CACHE_OFF. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>