| commit | 9fd565dbe7eadc9736c496bc67f2a0414b50069f | [log] [tgz] |
|---|---|---|
| author | Dinh Nguyen <dinguyen@opensource.altera.com> | Mon Mar 30 17:01:06 2015 -0500 |
| committer | Marek Vasut <marex@denx.de> | Tue Apr 21 12:23:16 2015 +0200 |
| tree | 190f0d4108856c51fa764c3e2d9ddbae03593635 | |
| parent | 0812a1d3e5d056b012d6a9b4b2e83469440f7018 [diff] [blame] |
arm: socfpga: spl: Add call to timer_init Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c index a4dbe4f..95992f0 100644 --- a/arch/arm/cpu/armv7/socfpga/spl.c +++ b/arch/arm/cpu/armv7/socfpga/spl.c
@@ -148,6 +148,8 @@ socfpga_uart0_enable(); socfpga_osc1timer_enable(); + timer_init(); + debug("Reconfigure Clock Manager\n"); /* reconfigure the PLLs */ cm_basic_init(&cm_default_cfg);