commit 9ad31989de12ce5c67b07c4867ead47465655c4b
author Stefan Roese <sr@denx.de> Wed Mar 19 16:35:12 2008 +0100
committer Stefan Roese <sr@denx.de> Thu Mar 27 09:54:41 2008 +0100
tree 56813f6206ad88dadfce5d410c6f2b4790903b47
parent 4c9e855734c523900322a7c3cdd9099b4f51b51d

ppc4xx: Fix compilation warning in 4xx_enet.c

Signed-off-by: Stefan Roese <sr@denx.de>

cpu/ppc4xx/4xx_enet.c

diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c
index 4541a14..21ba922 100644
--- a/cpu/ppc4xx/4xx_enet.c
+++ b/cpu/ppc4xx/4xx_enet.c
@@ -274,8 +274,7 @@
 static void ppc_4xx_eth_halt (struct eth_device *dev)
 {
 	EMAC_4XX_HW_PST hw_p = dev->priv;
-	uint32_t failsafe = 10000;
-	u32 eth_cfg = 0;
+	u32 val = 10000;
 
 	out_be32((void *)EMAC_IER + hw_p->hw_addr, 0x00000000);	/* disable emac interrupts */
 
@@ -291,8 +290,8 @@
 	/* wait for reset */
 	while (mfdcr (malrxcasr) & (MAL_CR_MMSR >> hw_p->devnum)) {
 		udelay (1000);	/* Delay 1 MS so as not to hammer the register */
-		failsafe--;
-		if (failsafe == 0)
+		val--;
+		if (val == 0)
 			break;
 	}
 
@@ -311,9 +310,9 @@
 
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT)
 	/* don't bypass the TAHOE0/TAHOE1 cores for Linux */
-	mfsdr(SDR0_ETH_CFG, eth_cfg);
-	eth_cfg &= ~(SDR0_ETH_CFG_TAHOE0_BYPASS | SDR0_ETH_CFG_TAHOE1_BYPASS);
-	mtsdr(SDR0_ETH_CFG, eth_cfg);
+	mfsdr(SDR0_ETH_CFG, val);
+	val &= ~(SDR0_ETH_CFG_TAHOE0_BYPASS | SDR0_ETH_CFG_TAHOE1_BYPASS);
+	mtsdr(SDR0_ETH_CFG, val);
 #endif
 
 	return;