mpc85xx/t2081: enable parsing DDR ratio for T2081 rev1.1
T2081 rev 1.1 changes MEM_PLL_RAT in RCW which requires new parsing
for PLL ratio.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index d954fe2..e732969 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -131,7 +131,8 @@
* T2080 rev 1.1 and later also use half mem_pll comparing with rev 1.0
*/
#if defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) || \
- defined(CONFIG_PPC_T4080) || defined(CONFIG_PPC_T2080)
+ defined(CONFIG_PPC_T4080) || defined(CONFIG_PPC_T2080) || \
+ defined(CONFIG_PPC_T2081)
svr = get_svr();
switch (SVR_SOC_VER(svr)) {
case SVR_T4240: