commit 965de8b91bddd1f5967240d1d44005719b09dd5e
author Lokesh Vutla <lokeshvutla@ti.com> Tue Dec 10 15:02:21 2013 +0530
committer Tom Rini <trini@ti.com> Wed Dec 18 21:14:18 2013 -0500
tree dbcbdffdaaf14e8ace3eb1a911f27ace0352bbc6
parent cf04d0326bd1e24909cfe644c0c8676440a915b1

ARM: AM33xx+: Update ioregs to pass different values

Currently same value is programmed for all ioregs. This is not
the case for all SoC's like AM4372. So adding a structure for ioregs
and updating in all board files. And also return from config_cmd_ctrl()
and config_ddr_data() functions if data is not passed.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Fixup dxr2, cm_t335, adapt pcm051 rev3]
Signed-off-by: Tom Rini <trini@ti.com>

board/siemens/dxr2/board.c

diff --git a/board/siemens/dxr2/board.c b/board/siemens/dxr2/board.c
index 3a5e11d..6c316fa 100644
--- a/board/siemens/dxr2/board.c
+++ b/board/siemens/dxr2/board.c
@@ -144,6 +144,10 @@
 
 struct cmd_control dxr2_ddr3_cmd_ctrl_data = {
 };
+
+struct ctrl_ioregs dxr2_ddr3_ioregs = {
+};
+
 	/* pass values from eeprom */
 	dxr2_ddr3_emif_reg_data.sdram_tim1 = settings.ddr3.sdram_tim1;
 	dxr2_ddr3_emif_reg_data.sdram_tim2 = settings.ddr3.sdram_tim2;
@@ -165,7 +169,13 @@
 	dxr2_ddr3_cmd_ctrl_data.cmd2csratio = settings.ddr3.ddr3_sratio;
 	dxr2_ddr3_cmd_ctrl_data.cmd2iclkout = settings.ddr3.iclkout;
 
-	config_ddr(DDR_PLL_FREQ, settings.ddr3.ioctr_val, &dxr2_ddr3_data,
+	dxr2_ddr3_ioregs.cm0ioctl = settings.ddr3.ioctr_val,
+	dxr2_ddr3_ioregs.cm1ioctl = settings.ddr3.ioctr_val,
+	dxr2_ddr3_ioregs.cm2ioctl = settings.ddr3.ioctr_val,
+	dxr2_ddr3_ioregs.dt0ioctl = settings.ddr3.ioctr_val,
+	dxr2_ddr3_ioregs.dt1ioctl = settings.ddr3.ioctr_val,
+
+	config_ddr(DDR_PLL_FREQ, &dxr2_ddr3_ioregs, &dxr2_ddr3_data,
 		   &dxr2_ddr3_cmd_ctrl_data, &dxr2_ddr3_emif_reg_data, 0);
 }
 

board/siemens/pxm2/board.c

diff --git a/board/siemens/pxm2/board.c b/board/siemens/pxm2/board.c
index 0a25b4b..ef3d6cc 100644
--- a/board/siemens/pxm2/board.c
+++ b/board/siemens/pxm2/board.c
@@ -69,7 +69,15 @@
 	.cmd2iclkout = 0,
 };
 
-	config_ddr(DDR_PLL_FREQ, DXR2_IOCTRL_VAL, &pxm2_ddr3_data,
+const struct ctrl_ioregs ioregs = {
+	.cm0ioctl		= DXR2_IOCTRL_VAL,
+	.cm1ioctl		= DXR2_IOCTRL_VAL,
+	.cm2ioctl		= DXR2_IOCTRL_VAL,
+	.dt0ioctl		= DXR2_IOCTRL_VAL,
+	.dt1ioctl		= DXR2_IOCTRL_VAL,
+};
+
+	config_ddr(DDR_PLL_FREQ, &ioregs, &pxm2_ddr3_data,
 		   &pxm2_ddr3_cmd_ctrl_data, &pxm2_ddr3_emif_reg_data, 0);
 }
 

board/siemens/rut/board.c

diff --git a/board/siemens/rut/board.c b/board/siemens/rut/board.c
index 77592db..25ab54d 100644
--- a/board/siemens/rut/board.c
+++ b/board/siemens/rut/board.c
@@ -74,7 +74,15 @@
 	.cmd2iclkout = 1,
 };
 
-	config_ddr(DDR_PLL_FREQ, RUT_IOCTRL_VAL, &rut_ddr3_data,
+const struct ctrl_ioregs ioregs = {
+	.cm0ioctl		= RUT_IOCTRL_VAL,
+	.cm1ioctl		= RUT_IOCTRL_VAL,
+	.cm2ioctl		= RUT_IOCTRL_VAL,
+	.dt0ioctl		= RUT_IOCTRL_VAL,
+	.dt1ioctl		= RUT_IOCTRL_VAL,
+};
+
+	config_ddr(DDR_PLL_FREQ, &ioregs, &rut_ddr3_data,
 		   &rut_ddr3_cmd_ctrl_data, &rut_ddr3_emif_reg_data, 0);
 }