commit 8c5cad05c97122b33ef8de981b56f701d6bfb6ea
author Tom Rini <trini@konsulko.com> Mon Sep 03 15:26:12 2018 -0400
committer Tom Rini <trini@konsulko.com> Mon Sep 03 15:26:12 2018 -0400
tree 52a485561631e373ac50663f7156c04b878e6bd4
parent c3c19c27437390681b708c9b25d98d3c9eedf568

configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>

configs/zynq_zc702_defconfig

diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index 55c5d53..5223a9b 100644
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -7,7 +7,6 @@
 CONFIG_DEBUG_UART_CLOCK=50000000
 CONFIG_IDENT_STRING=" Xilinx Zynq ZC702"
 CONFIG_SPL_STACK_R_ADDR=0x200000
-CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702"
 CONFIG_DEBUG_UART=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
@@ -36,6 +35,7 @@
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
+CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y