ARMv8/ls2085a: Enable secondary cores
Spin table is at the very beginning of boot code. Each core has an individual
release address within the spin table, the ft_cpu_setup fn updates the
"cpu-release-addr" property of each cpu node with the corresponding release
address.
Also fix CPU_RELEASE_ADDR to point to secondary_boot_func.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
diff --git a/board/freescale/ls2085a/ls2085a.c b/board/freescale/ls2085a/ls2085a.c
index c2a726b..2c79a71 100644
--- a/board/freescale/ls2085a/ls2085a.c
+++ b/board/freescale/ls2085a/ls2085a.c
@@ -105,6 +105,8 @@
phys_addr_t base;
phys_size_t size;
+ ft_cpu_setup(blob, bd);
+
/* limit the memory size to bank 1 until Linux can handle 40-bit PA */
base = getenv_bootm_low();
size = getenv_bootm_size();