x86: Change pci option rom area MTRR setting to cacheable
Turn on cache on the pci option rom area to improve the performance.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index 70762ee..f9b30f6 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -55,6 +55,8 @@
#define MTRR_FIX_4K_F0000_MSR 0x26e
#define MTRR_FIX_4K_F8000_MSR 0x26f
+#define MTRR_FIX_TYPE(t) ((t << 24) | (t << 16) | (t << 8) | t)
+
#if !defined(__ASSEMBLER__)
/**