doc: board: phytec: phycore-am6: Use mtd commands
Update Flash to SPI NOR chapter for use with mtd commands.
This is more convenient as we do not have to remember any
offsets in the SPI.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
diff --git a/doc/board/phytec/phycore-am62x.rst b/doc/board/phytec/phycore-am62x.rst
index f887065..a615d01 100644
--- a/doc/board/phytec/phycore-am62x.rst
+++ b/doc/board/phytec/phycore-am62x.rst
@@ -110,13 +110,13 @@
.. code-block:: bash
- sf probe
+ mtd list
fatload mmc 1 ${loadaddr} tiboot3.bin
- sf update $loadaddr 0x0 $filesize
+ mtd write ospi.tiboot3 ${loadaddr} 0 ${filesize}
fatload mmc 1 ${loadaddr} tispl.bin
- sf update $loadaddr 0x80000 $filesize
+ mtd write ospi.tispl ${loadaddr} 0 ${filesize}
fatload mmc 1 ${loadaddr} u-boot.img
- sf update $loadaddr 0x280000 $filesize
+ mtd write ospi.u-boot ${loadaddr} 0 ${filesize}
Boot Modes
diff --git a/doc/board/phytec/phycore-am64x.rst b/doc/board/phytec/phycore-am64x.rst
index a27ad01..189da17 100644
--- a/doc/board/phytec/phycore-am64x.rst
+++ b/doc/board/phytec/phycore-am64x.rst
@@ -111,13 +111,13 @@
.. code-block:: bash
- sf probe
+ mtd list
fatload mmc 1 ${loadaddr} tiboot3.bin
- sf update $loadaddr 0x0 $filesize
+ mtd write ospi.tiboot3 ${loadaddr} 0 ${filesize}
fatload mmc 1 ${loadaddr} tispl.bin
- sf update $loadaddr 0x80000 $filesize
+ mtd write ospi.tispl ${loadaddr} 0 ${filesize}
fatload mmc 1 ${loadaddr} u-boot.img
- sf update $loadaddr 0x280000 $filesize
+ mtd write ospi.u-boot ${loadaddr} 0 ${filesize}
Boot Modes