* Patches by Yuli Barcohen, 13 Jul 2003:
  - Correct flash and JFFS2 support for MPC8260ADS
  - fix PVR values and clock generation for PowerQUICC II family
    (8270/8275/8280)

* Patch by Bernhard Kuhn, 08 Jul 2003:
  - add support for M68K targets

* Patch by Ken Chou, 3 Jul:
  - Fix PCI config table for A3000
  - Fix iobase for natsemi.c
    (PCI_BASE_ADDRESS_0 is the IO base register for DP83815)

* Allow to enable "slow" POST routines by key press on power-on
* Fix temperature dependend switching of LCD backlight on LWMON
* Tweak output format for LWMON
diff --git a/board/a3000/a3000.c b/board/a3000/a3000.c
index e43465d..8d66585 100644
--- a/board/a3000/a3000.c
+++ b/board/a3000/a3000.c
@@ -2,6 +2,9 @@
  * (C) Copyright 2001
  * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
  *
+ * Modified during 2003 by
+ * Ken Chou, kchou@ieee.org
+ *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -86,52 +89,42 @@
 /*
  * Initialize PCI Devices
  */
-#if 1
 #ifndef CONFIG_PCI_PNP
 static struct pci_config_table pci_a3000_config_table[] = {
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-	  0x0, 0x0, 0x0, /* unknown eth0 divice */
+        /* vendor, device, class */
+        /* bus, dev, func */
+	{ PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_83815, PCI_ANY_ID,
+	  PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,	   /* dp83815 eth0 divice */
 	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
 				       PCI_ENET0_MEMADDR,
 				       PCI_COMMAND_IO |
 				       PCI_COMMAND_MEMORY |
 				       PCI_COMMAND_MASTER }},
 	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-	  0x0, 0x0, 0x0, /* unknown eth1 device */
+        PCI_ANY_ID, 0x14, PCI_ANY_ID,         /* PCI slot1 */
 	  pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
 				       PCI_ENET1_MEMADDR,
 				       PCI_COMMAND_IO |
 				       PCI_COMMAND_MEMORY |
 				       PCI_COMMAND_MASTER }},
 	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-	  0x0, 0x0, 0x0, /* unknown eth1 device */
+        PCI_ANY_ID, 0x15, PCI_ANY_ID,         /* PCI slot2 */
 	  pci_cfgfunc_config_device, { PCI_ENET2_IOADDR,
 				       PCI_ENET2_MEMADDR,
 				       PCI_COMMAND_IO |
 				       PCI_COMMAND_MEMORY |
 				       PCI_COMMAND_MASTER }},
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+        PCI_ANY_ID, 0x16, PCI_ANY_ID,         /* PCI slot3 */
+	  pci_cfgfunc_config_device, { PCI_ENET3_IOADDR,
+				       PCI_ENET3_MEMADDR,
+				       PCI_COMMAND_IO |
+				       PCI_COMMAND_MEMORY |
+				       PCI_COMMAND_MASTER }},
 	{ }
 };
 #endif
 
-#else
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_a3000_config_table[] = {
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
-	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
-				       PCI_ENET0_MEMADDR,
-				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
-	  pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
-				       PCI_ENET1_MEMADDR,
-				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-	{ }
-};
-#endif
-
-#endif
-
 struct pci_controller hose = {
 #ifndef CONFIG_PCI_PNP
 	config_table: pci_a3000_config_table,