| commit | 7f0b16fba4cdb511bf517bd56ed6834ff2c1da0f | [log] [tgz] |
|---|---|---|
| author | Kumar Gala <galak@kernel.crashing.org> | Thu Sep 17 01:52:37 2009 -0500 |
| committer | Tom Rix <Tom.Rix@windriver.com> | Sat Oct 03 09:04:39 2009 -0500 |
| tree | 682b205bcf275ffcce9499aaaf60a510e665d7ed | |
| parent | 345fb36a2cf55c6ec912b84cdf2f04c4ce0c0aa1 [diff] |
ppc/p4080: Handle timebase enabling and frequency reporting On CoreNet style platforms the timebase frequency is the bus frequency defined by 16 (on PQ3 it is divide by 8). Also on the CoreNet platforms the core not longer controls the enabling of the timebase. We now need to enable the boot core's timebase via CCSR register writes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>