| commit | 7d06e59f73f0d4d2733fe41529cefa264404e0d9 | [log] [tgz] |
|---|---|---|
| author | Icenowy Zheng <icenowy@aosc.io> | Sat Jun 03 17:10:22 2017 +0800 |
| committer | Jagan Teki <jagan@amarulasolutions.com> | Thu Jun 08 22:37:55 2017 +0530 |
| tree | b12de28a49cf5c878ea7fe52fa1688d9e93533df | |
| parent | 3ec0698b8a5bf29d5b35f5057a09be348b067a1a [diff] |
sunxi: enable DRAM initialization and SPL for V3s SoC As we have already support for the DesignWare DRAM controller and the integrated DDR2 chip of V3s, let's enable the SPL support for V3s. This patch also contains the default DRAM configuration for V3s. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>