mpc8308: support for Freescale MPC8308 cpu

This patch adds basic support for Freescale MPC8308 CPU. Serial ports,
NOR flash and integrated Ethernet controllers are supported.
PCI Express is also supported. eSDHC, NAND and USB may work but aren't
tested (using ULPI PHY requires additional patch).

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index b664c64..42387b4 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -55,6 +55,7 @@
 		char name[15];
 		u32 partid;
 	} cpu_type_list [] = {
+		CPU_TYPE_ENTRY(8308),
 		CPU_TYPE_ENTRY(8311),
 		CPU_TYPE_ENTRY(8313),
 		CPU_TYPE_ENTRY(8314),
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index b5076a9..d04b192 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -100,7 +100,8 @@
 	u32 lcrr;
 
 	u32 csb_clk;
-#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+	defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
 	u32 tsec1_clk;
 	u32 tsec2_clk;
 	u32 usbdr_clk;
@@ -132,7 +133,8 @@
 	u32 qe_clk;
 	u32 brg_clk;
 #endif
-#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+	defined(CONFIG_MPC837x)
 	u32 pciexp1_clk;
 	u32 pciexp2_clk;
 #endif
@@ -164,7 +166,8 @@
 
 	sccr = im->clk.sccr;
 
-#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+	defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
 	switch ((sccr & SCCR_TSEC1CM) >> SCCR_TSEC1CM_SHIFT) {
 	case 0:
 		tsec1_clk = 0;
@@ -202,7 +205,8 @@
 	}
 #endif
 
-#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315) || \
+	defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
 	switch ((sccr & SCCR_TSEC2CM) >> SCCR_TSEC2CM_SHIFT) {
 	case 0:
 		tsec2_clk = 0;
@@ -319,7 +323,7 @@
 	i2c1_clk = csb_clk;
 #elif defined(CONFIG_MPC832x)
 	i2c1_clk = enc_clk;
-#elif defined(CONFIG_MPC831x)
+#elif defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x)
 	i2c1_clk = enc_clk;
 #elif defined(CONFIG_FSL_ESDHC)
 	i2c1_clk = sdhc_clk;
@@ -328,7 +332,8 @@
 	i2c2_clk = csb_clk; /* i2c-2 clk is equal to csb clk */
 #endif
 
-#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+	defined(CONFIG_MPC837x)
 	switch ((sccr & SCCR_PCIEXP1CM) >> SCCR_PCIEXP1CM_SHIFT) {
 	case 0:
 		pciexp1_clk = 0;
@@ -444,7 +449,8 @@
 #endif
 
 	gd->csb_clk = csb_clk;
-#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+	defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
 	gd->tsec1_clk = tsec1_clk;
 	gd->tsec2_clk = tsec2_clk;
 	gd->usbdr_clk = usbdr_clk;
@@ -525,7 +531,8 @@
 #if defined(CONFIG_FSL_ESDHC)
 	printf("  SDHC:                %-4s MHz\n", strmhz(buf, gd->sdhc_clk));
 #endif
-#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+	defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
 	printf("  TSEC1:               %-4s MHz\n", strmhz(buf, gd->tsec1_clk));
 	printf("  TSEC2:               %-4s MHz\n", strmhz(buf, gd->tsec2_clk));
 	printf("  USB DR:              %-4s MHz\n", strmhz(buf, gd->usbdr_clk));
diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h
index d3dd44e..c854ce9 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -60,7 +60,8 @@
 #if defined(CONFIG_MPC83xx)
 	/* There are other clocks in the MPC83XX */
 	u32 csb_clk;
-#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+	defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
 	u32 tsec1_clk;
 	u32 tsec2_clk;
 	u32 usbdr_clk;
@@ -76,7 +77,8 @@
 	u32 lbiu_clk;
 	u32 lclk_clk;
 	u32 pci_clk;
-#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x)
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+	defined(CONFIG_MPC837x)
 	u32 pciexp1_clk;
 	u32 pciexp2_clk;
 #endif
diff --git a/arch/powerpc/include/asm/immap_83xx.h b/arch/powerpc/include/asm/immap_83xx.h
index 6b42a73..3a9cdc4 100644
--- a/arch/powerpc/include/asm/immap_83xx.h
+++ b/arch/powerpc/include/asm/immap_83xx.h
@@ -73,7 +73,11 @@
 	u32 obir;		/* Output Buffer Impedance Register */
 	u8 res8[0xC];
 	u32 pecr1;		/* PCI Express control register 1 */
+#ifdef CONFIG_MPC8308
+	u32 sdhccr;		/* eSDHC Control Registers for MPC8308 */
+#else
 	u32 pecr2;		/* PCI Express control register 2 */
+#endif
 	u8 res9[0xB8];
 } sysconf83xx_t;
 
@@ -589,7 +593,14 @@
  * SerDes
  */
 typedef struct serdes83xx {
-	u8 fixme[0x100];
+	u32 srdscr0;
+	u32 srdscr1;
+	u32 srdscr2;
+	u32 srdscr3;
+	u32 srdscr4;
+	u8 res0[0xc];
+	u32 srdsrstctl;
+	u8 res1[0xdc];
 } serdes83xx_t;
 
 /*
@@ -691,7 +702,7 @@
 	u8			res7[0xC0000];
 } immap_t;
 
-#elif defined(CONFIG_MPC8315)
+#elif defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315)
 typedef struct immap {
 	sysconf83xx_t		sysconf;	/* System configuration */
 	wdt83xx_t		wdt;		/* Watch Dog Timer (WDT) Registers */
diff --git a/arch/powerpc/include/asm/mpc8xxx_spi.h b/arch/powerpc/include/asm/mpc8xxx_spi.h
index 41737d3..b0082af 100644
--- a/arch/powerpc/include/asm/mpc8xxx_spi.h
+++ b/arch/powerpc/include/asm/mpc8xxx_spi.h
@@ -27,9 +27,10 @@
 
 #include <asm/types.h>
 
-#if defined(CONFIG_MPC834x) || \
+#if defined(CONFIG_MPC8308) || \
 	defined(CONFIG_MPC8313) || \
 	defined(CONFIG_MPC8315) || \
+	defined(CONFIG_MPC834x) || \
 	defined(CONFIG_MPC837x)
 
 typedef struct spi8xxx {