commit | 7c2c235a27c7b7198742f37fbe20877e17b6e3ea | [log] [tgz] |
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author | Billy Tsai <billy_tsai@aspeedtech.com> | Tue Aug 20 15:27:36 2024 +0800 |
committer | Tom Rini <trini@konsulko.com> | Tue Aug 27 18:01:38 2024 -0600 |
tree | f3566c56e3c22c9f6caf0b762db1a92121c66e7c | |
parent | 1bf048f21bdc3834de5aac216b1e7bfce90364d9 [diff] |
gpio: Add G7 Aspeed gpio controller driver In the 7th generation of the SoC from Aspeed, the control logic of the GPIO controller has been updated to support per-pin control. Each pin now has its own 32-bit register, allowing for individual control of the pin’s value, direction, interrupt type, and other settings. Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>