ARM: keystone2: Fix dev and arm speed detection

Use common devspeed and armspeed definitions.
Also fix reading efuse bootrom register.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2e.h b/arch/arm/mach-keystone/include/mach/clock-k2e.h
index 68e15ac..6f53e43 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2e.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2e.h
@@ -58,17 +58,6 @@
 	TETRIS_PLL,
 };
 
-enum {
-	SPD800,
-	SPD850,
-	SPD1000,
-	SPD1250,
-	SPD1350,
-	SPD1400,
-	SPD1500,
-	SPD_RSV
-};
-
 #define CORE_PLL_800	{CORE_PLL, 16, 1, 2}
 #define CORE_PLL_850	{CORE_PLL, 17, 1, 2}
 #define CORE_PLL_1000	{CORE_PLL, 20, 1, 2}
@@ -83,4 +72,8 @@
 #define DDR3_PLL_800	{DDR3_PLL, 16, 1, 2}
 #define DDR3_PLL_333	{DDR3_PLL, 20, 1, 6}
 
+/* k2e DEV supports 800, 850, 1000, 1250, 1350, 1400, 1500 MHz */
+#define DEV_SUPPORTED_SPEEDS	0xFFF
+#define ARM_SUPPORTED_SPEEDS	0
+
 #endif
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2hk.h b/arch/arm/mach-keystone/include/mach/clock-k2hk.h
index f28d5f0..c41210c 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2hk.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2hk.h
@@ -64,15 +64,6 @@
 	DDR3B_PLL,
 };
 
-enum {
-	SPD800,
-	SPD1000,
-	SPD1200,
-	SPD1350,
-	SPD1400,
-	SPD_RSV
-};
-
 #define CORE_PLL_799    {CORE_PLL,	13,	1,	2}
 #define CORE_PLL_983    {CORE_PLL,	16,	1,	2}
 #define CORE_PLL_999	{CORE_PLL,	122,	15,	1}
@@ -100,4 +91,9 @@
 #define DDR3_PLL_800(x)	{DDR3##x##_PLL,	16,	1,	2}
 #define DDR3_PLL_333(x)	{DDR3##x##_PLL,	20,	1,	6}
 
+/* k2h DEV supports 800, 1000, 1200 MHz */
+#define DEV_SUPPORTED_SPEEDS	0x383
+/* k2h ARM supportd 800, 1000, 1200, 1350, 1400 MHz */
+#define ARM_SUPPORTED_SPEEDS	0x3EF
+
 #endif
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2l.h b/arch/arm/mach-keystone/include/mach/clock-k2l.h
index bb9a5c4..c145a1e 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2l.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2l.h
@@ -59,15 +59,6 @@
 	DDR3_PLL,
 };
 
-enum {
-	SPD800,
-	SPD1000,
-	SPD1200,
-	SPD1350,
-	SPD1400,
-	SPD_RSV
-};
-
 #define CORE_PLL_799	{CORE_PLL, 13, 1, 2}
 #define CORE_PLL_983	{CORE_PLL, 16, 1, 2}
 #define CORE_PLL_1000	{CORE_PLL, 114, 7, 2}
@@ -92,4 +83,9 @@
 #define DDR3_PLL_800	{DDR3_PLL, 16, 1, 2}
 #define DDR3_PLL_333	{DDR3_PLL, 20, 1, 6}
 
+/* k2l DEV supports 800, 1000, 1200 MHz */
+#define DEV_SUPPORTED_SPEEDS	0x383
+/* k2l ARM supportd 800, 1000, 1200, MHz */
+#define ARM_SUPPORTED_SPEEDS	0x383
+
 #endif
diff --git a/arch/arm/mach-keystone/include/mach/clock.h b/arch/arm/mach-keystone/include/mach/clock.h
index 8d4cad2..cb2b43c 100644
--- a/arch/arm/mach-keystone/include/mach/clock.h
+++ b/arch/arm/mach-keystone/include/mach/clock.h
@@ -32,6 +32,18 @@
 #define GENERATE_INDX_STR(NUM, STRING) #NUM"\t- "#STRING"\n"
 #define CLOCK_INDEXES_LIST	CLK_LIST(GENERATE_INDX_STR)
 
+enum {
+	SPD800,
+	SPD850,
+	SPD1000,
+	SPD1200,
+	SPD1250,
+	SPD1350,
+	SPD1400,
+	SPD1500,
+	NUM_SPDS,
+};
+
 enum clk_e {
 	CLK_LIST(GENERATE_ENUM)
 };
@@ -50,9 +62,8 @@
 };
 
 extern const struct keystone_pll_regs keystone_pll_regs[];
-extern int dev_speeds[];
-extern int arm_speeds[];
 extern s16 divn_val[];
+extern int speeds[];
 
 void init_plls(int num_pll, struct pll_init_data *config);
 void init_pll(const struct pll_init_data *data);
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h
index 6082b87..cf32ae5 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -248,6 +248,13 @@
 #define CPU_66AK2Ex	0xb9a6
 #define CPU_66AK2Lx	0xb9a7
 
+/* DEVSPEED register */
+#define DEVSPEED_DEVSPEED_SHIFT	16
+#define DEVSPEED_DEVSPEED_MASK	(0xfff << 16)
+#define DEVSPEED_ARMSPEED_SHIFT	0
+#define DEVSPEED_ARMSPEED_MASK	0xfff
+#define DEVSPEED_NUMSPDS	12
+
 #ifdef CONFIG_SOC_K2HK
 #include <asm/arch/hardware-k2hk.h>
 #endif