tree 846209b84de10786e055e7a6de55a74d5e9c89db
parent 3fb4ef7d39abbb2f8f6cd349e4af11082bf8c8c4
author Ashok Reddy Soma <ashok.reddy.soma@amd.com> 1689756552 -0600
committer Michal Simek <michal.simek@amd.com> 1689922839 +0200

clk: zynqmp: Add set_rate support for gem rx and tsu clks

gem0_rx till gem3_rx  and gem_tsu are missing from set rate function.
Add them, so that they can be set from pmu firmware via clock framework.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230719084912.30209-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>