imx: imx7ulp: add EVK board support
Add EVK board support.
Add the evk dts file.
LOG:
U-Boot 2017.03-rc2-00038-gab86c1d (Feb 22 2017 - 15:59:58 +0800)
CPU: Freescale i.MX7ULP rev1.0 at 500 MHz
Reset cause: POR
Boot mode: Dual boot
Model: NXP i.MX7ULP EVK
DRAM: 1 GiB
MMC: FSL_SDHC: 0
In: serial@402D0000
Out: serial@402D0000
Err: serial@402D0000
Net: Net Initialization Skipped
No ethernet found.
Hit any key to stop autoboot: 0
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
diff --git a/board/freescale/mx7ulp_evk/Kconfig b/board/freescale/mx7ulp_evk/Kconfig
new file mode 100644
index 0000000..ff44831
--- /dev/null
+++ b/board/freescale/mx7ulp_evk/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_MX7ULP_EVK
+
+config SYS_BOARD
+ default "mx7ulp_evk"
+
+config SYS_VENDOR
+ default "freescale"
+
+config SYS_CONFIG_NAME
+ default "mx7ulp_evk"
+
+endif
diff --git a/board/freescale/mx7ulp_evk/MAINTAINERS b/board/freescale/mx7ulp_evk/MAINTAINERS
new file mode 100644
index 0000000..1aa2644
--- /dev/null
+++ b/board/freescale/mx7ulp_evk/MAINTAINERS
@@ -0,0 +1,7 @@
+MX7ULPEVK BOARD
+M: Peng Fan <peng.fan@nxp.com>
+S: Maintained
+F: board/freescale/mx7ulp_evk/
+F: include/configs/mx7ulp_evk.h
+F: configs/mx7ulp_evk_defconfig
+F: configs/mx7ulp_evk_plugin_defconfig
diff --git a/board/freescale/mx7ulp_evk/Makefile b/board/freescale/mx7ulp_evk/Makefile
new file mode 100644
index 0000000..5e19eb4
--- /dev/null
+++ b/board/freescale/mx7ulp_evk/Makefile
@@ -0,0 +1,10 @@
+# (C) Copyright 2016 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := mx7ulp_evk.o
+
+extra-$(CONFIG_USE_PLUGIN) := plugin.bin
+$(obj)/plugin.bin: $(obj)/plugin.o
+ $(OBJCOPY) -O binary --gap-fill 0xff $< $@
diff --git a/board/freescale/mx7ulp_evk/imximage.cfg b/board/freescale/mx7ulp_evk/imximage.cfg
new file mode 100644
index 0000000..e4e4cb3
--- /dev/null
+++ b/board/freescale/mx7ulp_evk/imximage.cfg
@@ -0,0 +1,137 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+#define __ASSEMBLY__
+#include <config.h>
+
+/* image version */
+
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi/sd/nand/onenand, qspi/nor
+ */
+
+BOOT_FROM sd
+
+#ifdef CONFIG_USE_IMXIMG_PLUGIN
+/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
+PLUGIN board/freescale/mx7ulp_evk/plugin.bin 0x2F020000
+#else
+
+#ifdef CONFIG_SECURE_BOOT
+CSF CONFIG_CSF_SIZE
+#endif
+/*
+ * Device Configuration Data (DCD)
+ *
+ * Each entry must have the format:
+ * Addr-type Address Value
+ *
+ * where:
+ * Addr-type register length (1,2 or 4 bytes)
+ * Address absolute address of the register
+ * value value to be stored in the register
+ */
+DATA 4 0x403f00dc 0x00000000
+DATA 4 0x403e0040 0x01000020
+DATA 4 0x403e0500 0x01000000
+DATA 4 0x403e050c 0x80808080
+DATA 4 0x403e0508 0x00140000
+DATA 4 0x403E0510 0x00000004
+DATA 4 0x403E0514 0x00000002
+DATA 4 0x403e0500 0x00000001
+CHECK_BITS_SET 4 0x403e0500 0x01000000
+DATA 4 0x403e050c 0x8080801E
+CHECK_BITS_SET 4 0x403e050c 0x00000040
+DATA 4 0x403E0030 0x00000001
+DATA 4 0x403e0040 0x11000020
+DATA 4 0x403f00dc 0x42000000
+
+DATA 4 0x40B300AC 0x40000000
+
+DATA 4 0x40AD0128 0x00040000
+DATA 4 0x40AD00F8 0x00000000
+DATA 4 0x40AD00D8 0x00000180
+DATA 4 0x40AD0108 0x00000180
+DATA 4 0x40AD0104 0x00000180
+DATA 4 0x40AD0124 0x00010000
+DATA 4 0x40AD0080 0x0000018C
+DATA 4 0x40AD0084 0x0000018C
+DATA 4 0x40AD0088 0x0000018C
+DATA 4 0x40AD008C 0x0000018C
+
+DATA 4 0x40AD0120 0x00010000
+DATA 4 0x40AD010C 0x00000180
+DATA 4 0x40AD0110 0x00000180
+DATA 4 0x40AD0114 0x00000180
+DATA 4 0x40AD0118 0x00000180
+DATA 4 0x40AD0090 0x00000180
+DATA 4 0x40AD0094 0x00000180
+DATA 4 0x40AD0098 0x00000180
+DATA 4 0x40AD009C 0x00000180
+
+DATA 4 0x40AD00E0 0x00040000
+DATA 4 0x40AD00E4 0x00040000
+
+DATA 4 0x40AB001C 0x00008000
+DATA 4 0x40AB0800 0xA1390003
+DATA 4 0x40AB085C 0x0D3900A0
+DATA 4 0x40AB0890 0x00400000
+
+DATA 4 0x40AB0848 0x40404040
+DATA 4 0x40AB0850 0x40404040
+DATA 4 0x40AB081C 0x33333333
+DATA 4 0x40AB0820 0x33333333
+DATA 4 0x40AB0824 0x33333333
+DATA 4 0x40AB0828 0x33333333
+
+DATA 4 0x40AB082C 0xf3333333
+DATA 4 0x40AB0830 0xf3333333
+DATA 4 0x40AB0834 0xf3333333
+DATA 4 0x40AB0838 0xf3333333
+
+DATA 4 0x40AB08C0 0x24922492
+DATA 4 0x40AB08B8 0x00000800
+
+DATA 4 0x40AB0004 0x00020052
+DATA 4 0x40AB000C 0x292C42F3
+DATA 4 0x40AB0010 0x00100A22
+DATA 4 0x40AB0038 0x00120556
+DATA 4 0x40AB0014 0x00C700DB
+DATA 4 0x40AB0018 0x00211718
+DATA 4 0x40AB002C 0x0F9F26D2
+DATA 4 0x40AB0030 0x009F0E10
+DATA 4 0x40AB0040 0x0000003F
+DATA 4 0x40AB0000 0xC3190000
+
+DATA 4 0x40AB001C 0x00008050
+DATA 4 0x40AB001C 0x00008058
+DATA 4 0x40AB001C 0x003F8030
+DATA 4 0x40AB001C 0x003F8038
+DATA 4 0x40AB001C 0xFF0A8030
+DATA 4 0x40AB001C 0xFF0A8038
+DATA 4 0x40AB001C 0x04028030
+DATA 4 0x40AB001C 0x04028038
+DATA 4 0x40AB001C 0x83018030
+DATA 4 0x40AB001C 0x83018038
+DATA 4 0x40AB001C 0x01038030
+DATA 4 0x40AB001C 0x01038038
+
+DATA 4 0x40AB083C 0x20000000
+
+DATA 4 0x40AB0020 0x00001800
+DATA 4 0x40AB0800 0xA1310000
+DATA 4 0x40AB0004 0x00020052
+DATA 4 0x40AB0404 0x00011006
+DATA 4 0x40AB001C 0x00000000
+#endif
diff --git a/board/freescale/mx7ulp_evk/mx7ulp_evk.c b/board/freescale/mx7ulp_evk/mx7ulp_evk.c
new file mode 100644
index 0000000..3618715
--- /dev/null
+++ b/board/freescale/mx7ulp_evk/mx7ulp_evk.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/mx7ulp-pins.h>
+#include <asm/arch/iomux.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_PUS_UP)
+
+int dram_init(void)
+{
+ gd->ram_size = PHYS_SDRAM_SIZE;
+
+ return 0;
+}
+
+static iomux_cfg_t const lpuart4_pads[] = {
+ MX7ULP_PAD_PTC3__LPUART4_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX7ULP_PAD_PTC2__LPUART4_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+static void setup_iomux_uart(void)
+{
+ mx7ulp_iomux_setup_multiple_pads(lpuart4_pads,
+ ARRAY_SIZE(lpuart4_pads));
+}
+
+int board_early_init_f(void)
+{
+ setup_iomux_uart();
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+ return 0;
+}
diff --git a/board/freescale/mx7ulp_evk/plugin.S b/board/freescale/mx7ulp_evk/plugin.S
new file mode 100644
index 0000000..9eab365
--- /dev/null
+++ b/board/freescale/mx7ulp_evk/plugin.S
@@ -0,0 +1,224 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <config.h>
+
+.macro imx7ulp_ddr_freq_decrease
+ ldr r2, =0x403f0000
+ ldr r3, =0x00000000
+ str r3, [r2, #0xdc]
+
+ ldr r2, =0x403e0000
+ ldr r3, =0x01000020
+ str r3, [r2, #0x40]
+ ldr r3, =0x01000000
+ str r3, [r2, #0x500]
+ ldr r3, =0x80808080
+ str r3, [r2, #0x50c]
+ ldr r3, =0x00140000
+ str r3, [r2, #0x508]
+ ldr r3, =0x00000004
+ str r3, [r2, #0x510]
+ ldr r3, =0x00000002
+ str r3, [r2, #0x514]
+ ldr r3, =0x00000001
+ str r3, [r2, #0x500]
+
+ ldr r3, =0x01000000
+wait1:
+ ldr r4, [r2, #0x500]
+ and r4, r3
+ cmp r4, r3
+ bne wait1
+
+ ldr r3, =0x8080801E
+ str r3, [r2, #0x50c]
+
+ ldr r3, =0x00000040
+wait2:
+ ldr r4, [r2, #0x50c]
+ and r4, r3
+ cmp r4, r3
+ bne wait2
+
+ ldr r3, =0x00000001
+ str r3, [r2, #0x30]
+ ldr r3, =0x11000020
+ str r3, [r2, #0x40]
+
+ ldr r2, =0x403f0000
+ ldr r3, =0x42000000
+ str r3, [r2, #0xdc]
+
+.endm
+
+.macro imx7ulp_evk_ddr_setting
+
+ imx7ulp_ddr_freq_decrease
+
+ /* Enable MMDC PCC clock */
+ ldr r2, =0x40b30000
+ ldr r3, =0x40000000
+ str r3, [r2, #0xac]
+
+ /* Configure DDR pad */
+ ldr r0, =0x40ad0000
+ ldr r1, =0x00040000
+ str r1, [r0, #0x128]
+ ldr r1, =0x0
+ str r1, [r0, #0xf8]
+ ldr r1, =0x00000180
+ str r1, [r0, #0xd8]
+ ldr r1, =0x00000180
+ str r1, [r0, #0x108]
+ ldr r1, =0x00000180
+ str r1, [r0, #0x104]
+ ldr r1, =0x00010000
+ str r1, [r0, #0x124]
+ ldr r1, =0x0000018C
+ str r1, [r0, #0x80]
+ ldr r1, =0x0000018C
+ str r1, [r0, #0x84]
+ ldr r1, =0x0000018C
+ str r1, [r0, #0x88]
+ ldr r1, =0x0000018C
+ str r1, [r0, #0x8c]
+
+ ldr r1, =0x00010000
+ str r1, [r0, #0x120]
+ ldr r1, =0x00000180
+ str r1, [r0, #0x10c]
+ ldr r1, =0x00000180
+ str r1, [r0, #0x110]
+ ldr r1, =0x00000180
+ str r1, [r0, #0x114]
+ ldr r1, =0x00000180
+ str r1, [r0, #0x118]
+ ldr r1, =0x00000180
+ str r1, [r0, #0x90]
+ ldr r1, =0x00000180
+ str r1, [r0, #0x94]
+ ldr r1, =0x00000180
+ str r1, [r0, #0x98]
+ ldr r1, =0x00000180
+ str r1, [r0, #0x9c]
+ ldr r1, =0x00040000
+ str r1, [r0, #0xe0]
+ ldr r1, =0x00040000
+ str r1, [r0, #0xe4]
+
+ ldr r0, =0x40ab0000
+ ldr r1, =0x00008000
+ str r1, [r0, #0x1c]
+ ldr r1, =0xA1390003
+ str r1, [r0, #0x800]
+ ldr r1, =0x0D3900A0
+ str r1, [r0, #0x85c]
+ ldr r1, =0x00400000
+ str r1, [r0, #0x890]
+
+ ldr r1, =0x40404040
+ str r1, [r0, #0x848]
+ ldr r1, =0x40404040
+ str r1, [r0, #0x850]
+ ldr r1, =0x33333333
+ str r1, [r0, #0x81c]
+ ldr r1, =0x33333333
+ str r1, [r0, #0x820]
+ ldr r1, =0x33333333
+ str r1, [r0, #0x824]
+ ldr r1, =0x33333333
+ str r1, [r0, #0x828]
+
+ ldr r1, =0xf3333333
+ str r1, [r0, #0x82c]
+ ldr r1, =0xf3333333
+ str r1, [r0, #0x830]
+ ldr r1, =0xf3333333
+ str r1, [r0, #0x834]
+ ldr r1, =0xf3333333
+ str r1, [r0, #0x838]
+
+ ldr r1, =0x24922492
+ str r1, [r0, #0x8c0]
+ ldr r1, =0x00000800
+ str r1, [r0, #0x8b8]
+
+ ldr r1, =0x00020052
+ str r1, [r0, #0x4]
+ ldr r1, =0x292C42F3
+ str r1, [r0, #0xc]
+ ldr r1, =0x00100A22
+ str r1, [r0, #0x10]
+ ldr r1, =0x00120556
+ str r1, [r0, #0x38]
+ ldr r1, =0x00C700DB
+ str r1, [r0, #0x14]
+ ldr r1, =0x00211718
+ str r1, [r0, #0x18]
+
+ ldr r1, =0x0F9F26D2
+ str r1, [r0, #0x2c]
+ ldr r1, =0x009F0E10
+ str r1, [r0, #0x30]
+ ldr r1, =0x0000003F
+ str r1, [r0, #0x40]
+ ldr r1, =0xC3190000
+ str r1, [r0, #0x0]
+
+ ldr r1, =0x00008050
+ str r1, [r0, #0x1c]
+ ldr r1, =0x00008058
+ str r1, [r0, #0x1c]
+ ldr r1, =0x003F8030
+ str r1, [r0, #0x1c]
+ ldr r1, =0x003F8038
+ str r1, [r0, #0x1c]
+ ldr r1, =0xFF0A8030
+ str r1, [r0, #0x1c]
+ ldr r1, =0xFF0A8038
+ str r1, [r0, #0x1c]
+ ldr r1, =0x04028030
+ str r1, [r0, #0x1c]
+ ldr r1, =0x04028038
+ str r1, [r0, #0x1c]
+ ldr r1, =0x83018030
+ str r1, [r0, #0x1c]
+ ldr r1, =0x83018038
+ str r1, [r0, #0x1c]
+ ldr r1, =0x01038030
+ str r1, [r0, #0x1c]
+ ldr r1, =0x01038038
+ str r1, [r0, #0x1c]
+
+ ldr r1, =0x20000000
+ str r1, [r0, #0x83c]
+
+ ldr r1, =0x00001800
+ str r1, [r0, #0x20]
+ ldr r1, =0xA1310000
+ str r1, [r0, #0x800]
+ ldr r1, =0x00020052
+ str r1, [r0, #0x4]
+ ldr r1, =0x00011006
+ str r1, [r0, #0x404]
+ ldr r1, =0x00000000
+ str r1, [r0, #0x1c]
+
+.endm
+
+.macro imx7ulp_clock_gating
+.endm
+
+.macro imx7ulp_qos_setting
+.endm
+
+.macro imx7ulp_ddr_setting
+ imx7ulp_evk_ddr_setting
+.endm
+
+/* include the common plugin code here */
+#include <asm/arch/mx7ulp_plugin.S>