commit 76b3f195e9c771f03161616a2f35ab7070be178a
author Lokesh Vutla <lokeshvutla@ti.com> Mon Aug 17 19:58:34 2015 +0530
committer Tom Rini <trini@konsulko.com> Fri Aug 28 12:33:16 2015 -0400
tree 8e5c622e61bc55ad843e2f7f904e1664b379da2b
parent be8ce70c026e84bb74b4454890b0459d1e484057

ARM: k2l: Fix device speeds

ARM supported speeds and init value of core_pll for SDP1200
are programmed wrong as part for the device speed cleanups.
Fixing it here.
Thanks to "Vitaly Andrianov <vitalya@ti.com>" for bisecting this issue

Fixes: c37ed9f11b61 ("ARM: keystone2: Fix dev and arm speed detection")
Tested-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

board/ti/ks2_evm/board_k2l.c

diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c
index 70e25f1..f35a64f 100644
--- a/board/ti/ks2_evm/board_k2l.c
+++ b/board/ti/ks2_evm/board_k2l.c
@@ -25,7 +25,7 @@
 static struct pll_init_data core_pll_config[NUM_SPDS] = {
 	[SPD800]	= CORE_PLL_799,
 	[SPD1000]	= CORE_PLL_1000,
-	[SPD800]	= CORE_PLL_1198,
+	[SPD1200]	= CORE_PLL_1198,
 };
 
 s16 divn_val[16] = {