| commit | 638a05894169b07ea8f6d21b6925ca353ea6ebb7 | [log] [tgz] |
|---|---|---|
| author | Bin Meng <bmeng.cn@gmail.com> | Sun Oct 11 21:37:44 2015 -0700 |
| committer | Simon Glass <sjg@chromium.org> | Wed Oct 21 07:46:27 2015 -0600 |
| tree | 68308063e00f4b803a07b9f55d56b2973edc2c7b | |
| parent | 8b185041a9f4c30dc5edb1e04c0834e931b8633f [diff] |
x86: Enable mrc cache for bayleybay and minnowmax Now that we have added MRC cache for Intel FSP and BayTrail codes, enable it for all BayTrail boards (Bayley Bay and Minnow Max). Note it turns out that FSP for Intel Atom E6xx does not produce the HOB for NV storage, so we don't have such functionality on Intel Crown Bay board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>