commit 7282672d298905088fb3c7c0a049d7d7d31cb8b4
author Simon Glass <sjg@chromium.org> Sun Jan 17 16:11:09 2016 -0700
committer Bin Meng <bmeng.cn@gmail.com> Sun Jan 24 12:07:19 2016 +0800
tree 99a3fe5ca9ce440110e6086066aaf25c966c93b0
parent ac94b7bcbed9a5ee71f6fb9a507c72abf601cb8a

dm: pci: Convert bios_emu to use the driver model PCI API

At present this BIOS emulator uses a bus/device/function number. Change
it to use a device if CONFIG_DM_PCI is enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

drivers/bios_emulator/bios.c

diff --git a/drivers/bios_emulator/bios.c b/drivers/bios_emulator/bios.c
index dd4c0a4..77c7f94 100644
--- a/drivers/bios_emulator/bios.c
+++ b/drivers/bios_emulator/bios.c
@@ -185,12 +185,21 @@
 	case 0xB103:		/* Find PCI class code */
 		M.x86.R_AH = DEVICE_NOT_FOUND;
 #ifdef __KERNEL__
+#ifdef CONFIG_DM_PCI
+		dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
+				    &interface);
+		dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
+				    &subclass);
+		dm_pci_read_config8(_BE_env.vgaInfo.pcidev,
+				    PCI_CLASS_DEVICE + 1, &baseclass);
+#else
 		pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
 				     &interface);
 		pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
 				     &subclass);
 		pci_read_config_byte(_BE_env.vgaInfo.pcidev,
 				     PCI_CLASS_DEVICE + 1, &baseclass);
+#endif
 		if (M.x86.R_CL == interface && M.x86.R_CH == subclass
 		    && (u8) (M.x86.R_ECX >> 16) == baseclass) {
 #else
@@ -209,8 +218,13 @@
 		if (M.x86.R_BX == pciSlot) {
 			M.x86.R_AH = SUCCESSFUL;
 #ifdef __KERNEL__
+# ifdef CONFIG_DM_PCI
+			dm_pci_read_config8(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
+					    &M.x86.R_CL);
+# else
 			pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
 					     &M.x86.R_CL);
+# endif
 #else
 			M.x86.R_CL =
 			    (u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE,
@@ -224,8 +238,13 @@
 		if (M.x86.R_BX == pciSlot) {
 			M.x86.R_AH = SUCCESSFUL;
 #ifdef __KERNEL__
+# ifdef CONFIG_DM_PCI
+			dm_pci_read_config16(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
+					     &M.x86.R_CX);
+# else
 			pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
 					     &M.x86.R_CX);
+# endif
 #else
 			M.x86.R_CX =
 			    (u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD,
@@ -239,8 +258,13 @@
 		if (M.x86.R_BX == pciSlot) {
 			M.x86.R_AH = SUCCESSFUL;
 #ifdef __KERNEL__
+# ifdef CONFIG_DM_PCI
+			dm_pci_read_config32(_BE_env.vgaInfo.pcidev,
+					     M.x86.R_DI, &M.x86.R_ECX);
+# else
 			pci_read_config_dword(_BE_env.vgaInfo.pcidev,
 					      M.x86.R_DI, &M.x86.R_ECX);
+# endif
 #else
 			M.x86.R_ECX =
 			    (u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD,
@@ -254,8 +278,13 @@
 		if (M.x86.R_BX == pciSlot) {
 			M.x86.R_AH = SUCCESSFUL;
 #ifdef __KERNEL__
+# ifdef CONFIG_DM_PCI
+			dm_pci_write_config8(_BE_env.vgaInfo.pcidev,
+					     M.x86.R_DI, M.x86.R_CL);
+# else
 			pci_write_config_byte(_BE_env.vgaInfo.pcidev,
 					      M.x86.R_DI, M.x86.R_CL);
+# endif
 #else
 			PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE,
 				      _BE_env.vgaInfo.pciInfo);
@@ -268,8 +297,13 @@
 		if (M.x86.R_BX == pciSlot) {
 			M.x86.R_AH = SUCCESSFUL;
 #ifdef __KERNEL__
+# ifdef CONFIG_DM_PCI
+			dm_pci_write_config32(_BE_env.vgaInfo.pcidev,
+					      M.x86.R_DI, M.x86.R_CX);
+# else
 			pci_write_config_word(_BE_env.vgaInfo.pcidev,
 					      M.x86.R_DI, M.x86.R_CX);
+# endif
 #else
 			PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD,
 				      _BE_env.vgaInfo.pciInfo);
@@ -282,8 +316,13 @@
 		if (M.x86.R_BX == pciSlot) {
 			M.x86.R_AH = SUCCESSFUL;
 #ifdef __KERNEL__
+# ifdef CONFIG_DM_PCI
+			dm_pci_write_config32(_BE_env.vgaInfo.pcidev,
+					      M.x86.R_DI, M.x86.R_ECX);
+# else
 			pci_write_config_dword(_BE_env.vgaInfo.pcidev,
 					       M.x86.R_DI, M.x86.R_ECX);
+# endif
 #else
 			PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD,
 				      _BE_env.vgaInfo.pciInfo);