powerpc/p3060: Add SoC related support for P3060 platform
Add P3060 SoC specific information:cores setup, LIODN setup, etc
The P3060 SoC combines six e500mc Power Architecture processor cores with
high-performance datapath acceleration architecture(DPAA), CoreNet fabric
infrastructure, as well as network and peripheral interfaces.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index fc78c58..c3d6ba9 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -349,6 +349,21 @@
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
+#elif defined(CONFIG_PPC_P3060)
+#define CONFIG_MAX_CPUS 8
+#define CONFIG_SYS_FSL_NUM_CC_PLLS 4
+#define CONFIG_SYS_FSL_NUM_LAWS 32
+#define CONFIG_SYS_FSL_SEC_COMPAT 4
+#define CONFIG_SYS_NUM_FMAN 2
+#define CONFIG_SYS_NUM_FM1_DTSEC 4
+#define CONFIG_SYS_NUM_FM2_DTSEC 4
+#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
+#define CONFIG_SYS_FSL_TBCLK_DIV 16
+#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
+#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
+#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
+
#elif defined(CONFIG_PPC_P4040)
#define CONFIG_MAX_CPUS 4
#define CONFIG_SYS_FSL_NUM_CC_PLLS 4
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 769ca85..fb5ef91 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1700,7 +1700,7 @@
#define FSL_CORENET_RCWSR8_HOST_AGT_B1 0x00e00000
#define FSL_CORENET_RCWSR8_HOST_AGT_B2 0x00100000
#define FSL_CORENET_RCWSR11_EC1 0x00c00000 /* bits 360..361 */
-#if defined(CONFIG_PPC_P4080)
+#if defined(CONFIG_PPC_P4080) || defined(CONFIG_PPC_P3060)
#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC1 0x00000000
#define FSL_CORENET_RCWSR11_EC1_FM1_USB1 0x00800000
#define FSL_CORENET_RCWSR11_EC2 0x001c0000 /* bits 363..365 */
@@ -1708,6 +1708,16 @@
#define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC2 0x00080000
#define FSL_CORENET_RCWSR11_EC2_USB2 0x00100000
#endif
+#if defined(CONFIG_PPC_P3060)
+#define FSL_CORENET_RCWSR13_EC1_EXT 0x1c000000
+#define FSL_CORENET_RCWSR13_EC1_EXT_FM1_DTSEC4_RGMII 0x04000000
+#define FSL_CORENET_RCWSR13_EC1_EXT_FM1_DTSEC4_MII 0x08000000
+#define FSL_CORENET_RCWSR13_EC2_EXT 0x01c00000
+#define FSL_CORENET_RCWSR13_EC2_EXT_FM2_DTSEC4_RGMII 0x00400000
+#define FSL_CORENET_RCWSR13_EC2_EXT_FM2_DTSEC4_MII 0x00800000
+#define FSL_CORENET_RCWSR13_EC3 0x00380000
+#define FSL_CORENET_RCWSR13_EC3_FM2_DTSEC4_MII 0x00100000
+#endif
#if defined(CONFIG_PPC_P2040) || defined(CONFIG_PPC_P2041) \
|| defined(CONFIG_PPC_P3041) || defined(CONFIG_PPC_P5020)
#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_RGMII 0x00000000
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 46f9989..1b96b84 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -1115,6 +1115,8 @@
#define SVR_P2041_E 0x821801
#define SVR_P3041 0x821103
#define SVR_P3041_E 0x821903
+#define SVR_P3060 0x820002
+#define SVR_P3060_E 0x820802
#define SVR_P4040 0x820100
#define SVR_P4040_E 0x820900
#define SVR_P4080 0x820000