rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
diff --git a/board/gen860t/beeper.c b/board/gen860t/beeper.c
index b4c2c89..b472b91 100644
--- a/board/gen860t/beeper.c
+++ b/board/gen860t/beeper.c
@@ -43,7 +43,7 @@
*/
void init_beeper (void)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
immap->im_cpmtimer.cpmt_tgcr &= ~TGCR_RST1 | TGCR_STP1;
immap->im_cpmtimer.cpmt_tmr1 = ((33 << TMR_PS_SHIFT) & TMR_PS_MSK)
@@ -62,7 +62,7 @@
{
#define FREQ_LIMIT 2500
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
/*
* Compute timer ticks given desired frequency. The timer is set up
@@ -79,7 +79,7 @@
*/
void beeper_on (void)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
immap->im_cpmtimer.cpmt_tgcr &= ~TGCR_STP1;
}
@@ -89,7 +89,7 @@
*/
void beeper_off (void)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
immap->im_cpmtimer.cpmt_tgcr |= TGCR_STP1;
}
@@ -104,7 +104,7 @@
*/
void set_beeper_volume (int steps)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
int i;
if (steps >= 0) {
diff --git a/board/gen860t/flash.c b/board/gen860t/flash.c
index a46e7e6..827d9e0 100644
--- a/board/gen860t/flash.c
+++ b/board/gen860t/flash.c
@@ -27,7 +27,7 @@
#if defined(CONFIG_ENV_IS_IN_FLASH)
# ifndef CONFIG_ENV_ADDR
-# define CONFIG_ENV_ADDR (CFG_FLASH_BASE + CONFIG_ENV_OFFSET)
+# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
# endif
# ifndef CONFIG_ENV_SIZE
# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
@@ -41,15 +41,15 @@
* Use buffered writes to flash by default - they are about 32x faster than
* single byte writes.
*/
-#ifndef CFG_GEN860T_FLASH_USE_WRITE_BUFFER
-#define CFG_GEN860T_FLASH_USE_WRITE_BUFFER
+#ifndef CONFIG_SYS_GEN860T_FLASH_USE_WRITE_BUFFER
+#define CONFIG_SYS_GEN860T_FLASH_USE_WRITE_BUFFER
#endif
/*
* Max time to wait (in mS) for flash device to allocate a write buffer.
*/
-#ifndef CFG_FLASH_ALLOC_BUFFER_TOUT
-#define CFG_FLASH_ALLOC_BUFFER_TOUT 100
+#ifndef CONFIG_SYS_FLASH_ALLOC_BUFFER_TOUT
+#define CONFIG_SYS_FLASH_ALLOC_BUFFER_TOUT 100
#endif
/*
@@ -94,7 +94,7 @@
#endif
/*---------------------------------------------------------------------*/
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
/*-----------------------------------------------------------------------
* Functions
@@ -109,12 +109,12 @@
unsigned long
flash_init (void)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
unsigned long size_b0;
int i;
- for (i= 0; i < CFG_MAX_FLASH_BANKS; ++i) {
+ for (i= 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
@@ -139,7 +139,7 @@
* Remap FLASH according to real size
*/
memctl->memc_or0 |= (-size_b0 & 0xFFFF8000);
- memctl->memc_br0 |= (CFG_FLASH_BASE & BR_BA_MSK);
+ memctl->memc_br0 |= (CONFIG_SYS_FLASH_BASE & BR_BA_MSK);
PRINTF("## After remap:\n"
" BR0: 0x%08x OR0: 0x%08x\n", memctl->memc_br0, memctl->memc_or0);
@@ -147,17 +147,17 @@
/*
* Re-do sizing to get full correct info
*/
- size_b0 = flash_get_size ((vu_char *)CFG_FLASH_BASE, &flash_info[0]);
- flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
+ size_b0 = flash_get_size ((vu_char *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
+ flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
flash_info[0].size = size_b0;
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
/*
* Monitor protection is ON by default
*/
flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE + monitor_flash_len - 1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
&flash_info[0]);
#endif
@@ -307,10 +307,10 @@
return (NO_FLASH);
}
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
+ if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
+ info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
+ info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
}
return (info->size);
}
@@ -385,7 +385,7 @@
udelay (1000);
while (((status = *addr) & SCS_SR7) != SCS_SR7) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
*addr = SCS_BLOCK_ERASE_SUSPEND_CMD;
*addr = SCS_READ_CMD;
@@ -408,7 +408,7 @@
}
-#ifdef CFG_GEN860T_FLASH_USE_WRITE_BUFFER
+#ifdef CONFIG_SYS_GEN860T_FLASH_USE_WRITE_BUFFER
/*
* Allocate a flash buffer, fill it with data and write it to the flash.
* 0 - OK
@@ -451,10 +451,10 @@
*/
*block_addr_p = SCS_WRITE_BUF_CMD;
while ((*block_addr_p & SCS_XSR7) != SCS_XSR7) {
- if (get_timer(time) > CFG_FLASH_ALLOC_BUFFER_TOUT) {
+ if (get_timer(time) > CONFIG_SYS_FLASH_ALLOC_BUFFER_TOUT) {
PRINTF("%s:%d: Buffer allocation timeout @ 0x%p (waited %d mS)\n",
__FUNCTION__, __LINE__, block_addr_p,
- CFG_FLASH_ALLOC_BUFFER_TOUT);
+ CONFIG_SYS_FLASH_ALLOC_BUFFER_TOUT);
return 1;
}
*block_addr_p = SCS_WRITE_BUF_CMD;
@@ -478,9 +478,9 @@
#if 1
time = get_timer(0);
while ((*block_addr_p & SCS_SR7) != SCS_SR7) {
- if (get_timer(time) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(time) > CONFIG_SYS_FLASH_WRITE_TOUT) {
PRINTF("%s:%d: Write timeout @ 0x%p (waited %d mS)\n",
- __FUNCTION__, __LINE__, block_addr_p, CFG_FLASH_WRITE_TOUT);
+ __FUNCTION__, __LINE__, block_addr_p, CONFIG_SYS_FLASH_WRITE_TOUT);
return 1;
}
}
@@ -502,7 +502,7 @@
write_buff(flash_info_t *info_p, uchar *src_p, ulong addr, ulong count)
{
int rc = 0;
-#ifdef CFG_GEN860T_FLASH_USE_WRITE_BUFFER
+#ifdef CONFIG_SYS_GEN860T_FLASH_USE_WRITE_BUFFER
#define FLASH_WRITE_BUF_SIZE 0x00000020 /* 32 bytes */
int i;
uint bufs;
@@ -520,7 +520,7 @@
return 4;
}
-#ifdef CFG_GEN860T_FLASH_USE_WRITE_BUFFER
+#ifdef CONFIG_SYS_GEN860T_FLASH_USE_WRITE_BUFFER
sp = src_p;
dp = (uchar *)addr;
@@ -632,7 +632,7 @@
start = get_timer (0);
while (((status = *addr) & SCS_SR7) != SCS_SR7) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
*addr = SCS_READ_CMD;
return (1);
}
diff --git a/board/gen860t/fpga.c b/board/gen860t/fpga.c
index 1e6bdf1..29cad2e 100644
--- a/board/gen860t/fpga.c
+++ b/board/gen860t/fpga.c
@@ -161,7 +161,7 @@
*/
void fpga_reset (int assert)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
PRINTF ("%s:%d: RESET ", __FUNCTION__, __LINE__);
if (assert) {
@@ -210,7 +210,7 @@
*/
int fpga_pgm_fn (int assert, int flush, int cookie)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
PRINTF ("%s:%d: FPGA PROGRAM ", __FUNCTION__, __LINE__);
@@ -233,7 +233,7 @@
*/
int fpga_init_fn (int cookie)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
PRINTF ("%s:%d: INIT check... ", __FUNCTION__, __LINE__);
if (immap->im_cpm.cp_pbdat & (0x80000000 >> FPGA_INIT_BIT_NUM)) {
@@ -251,7 +251,7 @@
*/
int fpga_done_fn (int cookie)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
PRINTF ("%s:%d: DONE check... ", __FUNCTION__, __LINE__);
if (immap->im_cpm.cp_pbdat & (0x80000000 >> FPGA_DONE_BIT_NUM)) {
diff --git a/board/gen860t/gen860t.c b/board/gen860t/gen860t.c
index 5c497b6..008f765 100644
--- a/board/gen860t/gen860t.c
+++ b/board/gen860t/gen860t.c
@@ -160,7 +160,7 @@
*/
phys_size_t initdram (int board_type)
{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immr->im_memctl;
upmconfig (UPMA,
@@ -171,14 +171,14 @@
/*
* Setup MAMR register
*/
- memctl->memc_mptpr = CFG_MPTPR_1BK_8K;
- memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR_1BK_8K;
+ memctl->memc_mamr = CONFIG_SYS_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
/*
* Map CS1* to SDRAM bank
*/
- memctl->memc_or1 = CFG_OR1;
- memctl->memc_br1 = CFG_BR1;
+ memctl->memc_or1 = CONFIG_SYS_OR1;
+ memctl->memc_br1 = CONFIG_SYS_BR1;
/*
* Perform SDRAM initialization sequence:
@@ -235,7 +235,7 @@
*/
int misc_init_r (void)
{
- volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immr->im_memctl;
/*