| commit | 658ff9d035f558676dfcad091fbb985f4d15bad6 | [log] [tgz] |
|---|---|---|
| author | Peng Fan <peng.fan@nxp.com> | Tue Jul 26 16:40:31 2022 +0800 |
| committer | Stefano Babic <sbabic@denx.de> | Tue Jul 26 11:28:59 2022 +0200 |
| tree | e01c0f643e2b50edb0aae2bff3e04944d52856ff | |
| parent | bb19f85168957a658a7d0aa19bda95158aeb3520 [diff] |
spl: imx8mm: enlarge SPL_MAX_SIZE The CONFIG_SPL_MAX_SIZE could be 0x27000 for i.MX8MM when SPL_TEXT_BASE set to 0x7E1000. The DDR firmware max uses 96KB, there is a 4KB padding header before SPL_TEXT_BASE, so the SPL MAX SIZE is `256KB - 96KB - 4KB`. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>