tree 3d88e367f5a8d6d64fcf9c93371aa30d326982c9
parent 414e1660c8e898539411d92fbacdefc3e6bfbdfb
author Benoît Thébaudeau <benoit.thebaudeau@advansee.com> 1348741342 +0000
committer Tom Rini <trini@ti.com> 1350327251 -0700

mx5 clocks: Add and use CCSR definitions

This fixes config_pll_clk(), which used 0x20 instead of 0x200 for PLL4_CLOCK.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>