x86: timer: Reduce timer code size in TPL on Intel CPUs

Most of the timer-calibration methods are not needed on recent Intel CPUs
and just increase code size. Add an option to use the known-good way to
get the clock frequency in TPL. Size reduction is about 700 bytes.

Note that version 1 of this commit caused bootstage to crash since the CPU
was not identified. This is corrected by changes previously applied to
make sure that the CPU is identified before spl_init() is called, such as

   39146a2e0b x86: Move CPU init to before spl_init()

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 41f9755..96cc492 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -188,6 +188,15 @@
 	  The only exception is when U-Boot is used as a secondary bootloader,
 	  where this option should be enabled.
 
+config TPL_X86_TSC_TIMER_NATIVE
+	bool "x86 TSC timer uses native calibration"
+	depends on TPL && X86_TSC_TIMER
+	help
+	  Selects native timer calibration for TPL and don't include the other
+	  methods in the code. This helps to reduce code size in TPL and works
+	  on fairly modern Intel chips. Code-size reductions is about 700
+	  bytes.
+
 config MTK_TIMER
 	bool "MediaTek timer support"
 	depends on TIMER