diff --git a/CHANGELOG b/CHANGELOG
index d7d73eb..c774dd0 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,8 @@
 Changes since U-Boot 1.1.4:
 ======================================================================
 
+* Coding Style cleanup
+
 * Write RTC seconds first to maintain settings integrity per
   Maxim/Dallas DS1306 data sheet.
   Patch by Alan J. Luse, 02 May 2006
diff --git a/board/bc3450/bc3450.c b/board/bc3450/bc3450.c
index a030b82..0d86518 100644
--- a/board/bc3450/bc3450.c
+++ b/board/bc3450/bc3450.c
@@ -1,6 +1,4 @@
 /*
- * -- Version 1.1 --
- *
  * (C) Copyright 2003-2004
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
@@ -13,9 +11,6 @@
  * (C) Copyright 2006
  * Stefan Strobl, GERSYS GmbH, stefan.strobl@gersys.de
  *
- * History:
- *	1.1 - improved SM501 init to meet spec timing
- *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -51,7 +46,7 @@
 
 #ifdef CONFIG_RTC_MPC5200
 #include <rtc.h>
-#endif 
+#endif
 
 #ifdef CONFIG_PS2MULT
 void ps2mult_early_init(void);
@@ -375,7 +370,7 @@
 int board_early_init_r (void)
 {
 #ifdef CONFIG_RTC_MPC5200
-        struct rtc_time t;
+	struct rtc_time t;
 
 	/* set to Wed Dec 31 19:00:00 1969 */
 	t.tm_sec = t.tm_min = 0;
@@ -384,7 +379,7 @@
 	t.tm_mon = 12;
 	t.tm_year = 1969;
 	t.tm_wday = 3;
-	
+
 	rtc_set(&t);
 #endif /* CONFIG_RTC_MPC5200 */
 
@@ -482,7 +477,7 @@
 	} else {
 		puts ("VGA:   SMI501 (Voyager) with 8 MB\n");
 	}
-	/* restore origianl FB content  */
+	/* restore origianl FB content	*/
 	if (restore) {
 		*(volatile u16 *)CFG_CS1_START = save;
 		__asm__ volatile ("sync");
@@ -493,8 +488,8 @@
 
 #ifdef CONFIG_VIDEO_SM501
 
-#define DISPLAY_WIDTH   640
-#define DISPLAY_HEIGHT  480
+#define DISPLAY_WIDTH	640
+#define DISPLAY_HEIGHT	480
 
 #ifdef CONFIG_VIDEO_SM501_8BPP
 #error CONFIG_VIDEO_SM501_8BPP not supported.
@@ -633,7 +628,7 @@
 	} else {
 	    ret = SM501_MMIO_BASE;
 	}
-	
+
 	if (restore) {
 		*(volatile u16 *)CFG_CS1_START = save;
 		__asm__ volatile ("sync");
diff --git a/board/bc3450/cmd_bc3450.c b/board/bc3450/cmd_bc3450.c
index 1442b68..6bbe4e6 100644
--- a/board/bc3450/cmd_bc3450.c
+++ b/board/bc3450/cmd_bc3450.c
@@ -27,7 +27,7 @@
 #include <common.h>
 #include <command.h>
 
-/* 
+/*
  * BC3450 specific commands
  */
 #if (CONFIG_COMMANDS & CFG_CMD_BSP)
@@ -39,7 +39,7 @@
 # define dprintf(fmt,args...)
 #endif
 
-/* 
+/*
  * Definitions for DS1620 chip
  */
 #define THERM_START_CONVERT	0xee
@@ -57,8 +57,8 @@
 #define CFG_STANDALONE		0
 
 struct therm {
-    int hi;
-    int lo;
+	int hi;
+	int lo;
 };
 
 /*
@@ -124,36 +124,46 @@
  * Yet, the initialisation sequence is executed only the first
  * time the function is called.
  */
-int sm501_gpio_init(void)
+int sm501_gpio_init (void)
 {
-    static int init_done = 0;
+	static int init_done = 0;
 
-    if(init_done) {
+	if (init_done) {
 /*	dprintf("sm501_gpio_init: nothing to be done.\n"); */
-	return 1;
-    }
+		return 1;
+	}
 
-    /* enable SM501 GPIO control (in both power modes) */
-    *(vu_long *) (SM501_MMIO_BASE + SM501_POWER_MODE0_GATE) |= POWER_MODE_GATE_GPIO_PWM_I2C;
-    *(vu_long *) (SM501_MMIO_BASE + SM501_POWER_MODE1_GATE) |= POWER_MODE_GATE_GPIO_PWM_I2C;
+	/* enable SM501 GPIO control (in both power modes) */
+	*(vu_long *) (SM501_MMIO_BASE + SM501_POWER_MODE0_GATE) |=
+		POWER_MODE_GATE_GPIO_PWM_I2C;
+	*(vu_long *) (SM501_MMIO_BASE + SM501_POWER_MODE1_GATE) |=
+		POWER_MODE_GATE_GPIO_PWM_I2C;
 
-    /* set up default O/Ps */
-    *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) &= ~(DS1620_RES | DS1620_CLK);
-    *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) |= DS1620_DQ;
-    *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) &= ~(FP_DATA_TRI);
-    *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) |= (BUZZER | PWR_OFF);
+	/* set up default O/Ps */
+	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) &=
+		~(DS1620_RES | DS1620_CLK);
+	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) |= DS1620_DQ;
+	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) &=
+		~(FP_DATA_TRI);
+	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) |=
+		(BUZZER | PWR_OFF);
 
-    /* configure directions for SM501 GPIO pins */
-    *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_CTRL_LOW) &= ~(0xFF << 24);
-    *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_CTRL_HIGH) &= ~(0x3F << 14);
-    *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_LOW) &= ~(DIP | DS1620_DQ);
-    *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_LOW) |= (DS1620_RES | DS1620_CLK);
-    *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_HIGH) &= ~DS1620_TLOW;
-    *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_HIGH) |= (PWR_OFF | BUZZER | FP_DATA_TRI);
+	/* configure directions for SM501 GPIO pins */
+	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_CTRL_LOW) &= ~(0xFF << 24);
+	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_CTRL_HIGH) &=
+		~(0x3F << 14);
+	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_LOW) &=
+		~(DIP | DS1620_DQ);
+	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_LOW) |=
+		(DS1620_RES | DS1620_CLK);
+	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_HIGH) &=
+		~DS1620_TLOW;
+	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_HIGH) |=
+		(PWR_OFF | BUZZER | FP_DATA_TRI);
 
-    init_done = 1;
+	init_done = 1;
 /*  dprintf("sm501_gpio_init: done.\n"); */
-    return 0;
+	return 0;
 }
 
 
@@ -163,347 +173,358 @@
  * read and prints the dip switch
  * and/or external config inputs (4bits) 0...0x0F
  */
-int cmd_dip (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int cmd_dip (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
-    vu_long rc = 0;
+	vu_long rc = 0;
 
-    sm501_gpio_init();
+	sm501_gpio_init ();
 
-    /* read dip switch */
-    rc = *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW);
-    rc = ~rc;
-    rc &= DIP;
-    rc = (int)(rc >> 24);
+	/* read dip switch */
+	rc = *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW);
+	rc = ~rc;
+	rc &= DIP;
+	rc = (int) (rc >> 24);
 
-    /* plausibility check */
-    if (rc > 0x0F)
-	return -1;
+	/* plausibility check */
+	if (rc > 0x0F)
+		return -1;
 
-    printf ("0x%x\n", rc);
-    return 0;
+	printf ("0x%x\n", rc);
+	return 0;
 }
 
-U_BOOT_CMD(
-	dip ,	1,	1,	cmd_dip,
-	"dip     - read dip switch and config inputs\n",
-	"\n"
-	"     - prints the state of the dip switch and/or\n"
-	"       external configuration inputs as hex value.\n"
-	"     - \"Config 1\" is the LSB\n"
-    );
+U_BOOT_CMD (dip, 1, 1, cmd_dip,
+	    "dip     - read dip switch and config inputs\n",
+	    "\n"
+	    "     - prints the state of the dip switch and/or\n"
+	    "       external configuration inputs as hex value.\n"
+	    "     - \"Config 1\" is the LSB\n");
 
 
 /*
  * buz - turns Buzzer on/off
  */
 #ifdef CONFIG_BC3450_BUZZER
-static int cmd_buz (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int cmd_buz (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
-    if (argc != 2) {
+	if (argc != 2) {
+		printf ("Usage:\nspecify one argument: \"on\" or \"off\"\n");
+		return 1;
+	}
+
+	sm501_gpio_init ();
+
+	if (strncmp (argv[1], "on", 2) == 0) {
+		*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) &=
+			~(BUZZER);
+		return 0;
+	} else if (strncmp (argv[1], "off", 3) == 0) {
+		*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) |=
+			BUZZER;
+		return 0;
+	}
 	printf ("Usage:\nspecify one argument: \"on\" or \"off\"\n");
 	return 1;
-    }
-
-    sm501_gpio_init();
-
-    if (strncmp (argv[1], "on", 2) == 0) {
-	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) &= ~(BUZZER);
-	return 0;
-    }
-    else if (strncmp (argv[1], "off", 3) == 0) {
-	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) |= BUZZER;
-	return 0;
-    }
-    printf ("Usage:\nspecify one argument: \"on\" or \"off\"\n");
-    return 1;
 }
 
-U_BOOT_CMD(
-	buz ,	2,	1,	cmd_buz,
-	"buz     - turns buzzer on/off\n",
-	"\n"
-	"buz <on/off>\n"
-	"     - turns the buzzer on or off\n"
-    );
+U_BOOT_CMD (buz, 2, 1, cmd_buz,
+	    "buz     - turns buzzer on/off\n",
+	    "\n" "buz <on/off>\n" "     - turns the buzzer on or off\n");
 #endif /* CONFIG_BC3450_BUZZER */
 
 
 /*
  * fp - front panel commands
  */
-static int cmd_fp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int cmd_fp (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
-    sm501_gpio_init();
+	sm501_gpio_init ();
 
-    if (strncmp (argv[1], "on", 2) == 0) {
-	/* turn on VDD first */
-	*(vu_long *)(SM501_MMIO_BASE + SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_VDDEN;
-	udelay(1000);
-	/* then put data on */
-	*(vu_long *)(SM501_MMIO_BASE + SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_DATA;
-	/* wait some time and enable backlight */
-	udelay(1000);
-	*(vu_long *)(SM501_MMIO_BASE + SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_BIAS;
-	udelay(1000);
-	*(vu_long *)(SM501_MMIO_BASE + SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_FPEN;
-	return 0;
-    }
-    else if (strncmp (argv[1], "off", 3) == 0) {
-	/* turn off the backlight first */
-	*(vu_long *)(SM501_MMIO_BASE + SM501_PANEL_DISPLAY_CONTROL) &= ~SM501_PDC_FPEN;
-	udelay(1000);
-	*(vu_long *)(SM501_MMIO_BASE + SM501_PANEL_DISPLAY_CONTROL) &= ~SM501_PDC_BIAS;
-	udelay(200000);
-	/* wait some time, then remove data */
-	*(vu_long *)(SM501_MMIO_BASE + SM501_PANEL_DISPLAY_CONTROL) &= ~SM501_PDC_DATA;
-	udelay(1000);
-	/* and remove VDD last */
-	*(vu_long *)(SM501_MMIO_BASE + SM501_PANEL_DISPLAY_CONTROL) &= ~SM501_PDC_VDDEN;
-	return 0;
-    }
-    else if (strncmp (argv[1], "bl", 2) == 0) {
-	/* turn on/off backlight only */
-	if (strncmp (argv[2], "on", 2) == 0) {
-	    *(vu_long *)(SM501_MMIO_BASE + SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_BIAS;
-	    udelay(1000);
-	    *(vu_long *)(SM501_MMIO_BASE + SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_FPEN;
-	    return 0;
+	if (strncmp (argv[1], "on", 2) == 0) {
+		/* turn on VDD first */
+		*(vu_long *) (SM501_MMIO_BASE +
+			      SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_VDDEN;
+		udelay (1000);
+		/* then put data on */
+		*(vu_long *) (SM501_MMIO_BASE +
+			      SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_DATA;
+		/* wait some time and enable backlight */
+		udelay (1000);
+		*(vu_long *) (SM501_MMIO_BASE +
+			      SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_BIAS;
+		udelay (1000);
+		*(vu_long *) (SM501_MMIO_BASE +
+			      SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_FPEN;
+		return 0;
+	} else if (strncmp (argv[1], "off", 3) == 0) {
+		/* turn off the backlight first */
+		*(vu_long *) (SM501_MMIO_BASE +
+			      SM501_PANEL_DISPLAY_CONTROL) &= ~SM501_PDC_FPEN;
+		udelay (1000);
+		*(vu_long *) (SM501_MMIO_BASE +
+			      SM501_PANEL_DISPLAY_CONTROL) &= ~SM501_PDC_BIAS;
+		udelay (200000);
+		/* wait some time, then remove data */
+		*(vu_long *) (SM501_MMIO_BASE +
+			      SM501_PANEL_DISPLAY_CONTROL) &= ~SM501_PDC_DATA;
+		udelay (1000);
+		/* and remove VDD last */
+		*(vu_long *) (SM501_MMIO_BASE +
+			      SM501_PANEL_DISPLAY_CONTROL) &=
+			~SM501_PDC_VDDEN;
+		return 0;
+	} else if (strncmp (argv[1], "bl", 2) == 0) {
+		/* turn on/off backlight only */
+		if (strncmp (argv[2], "on", 2) == 0) {
+			*(vu_long *) (SM501_MMIO_BASE +
+				      SM501_PANEL_DISPLAY_CONTROL) |=
+				SM501_PDC_BIAS;
+			udelay (1000);
+			*(vu_long *) (SM501_MMIO_BASE +
+				      SM501_PANEL_DISPLAY_CONTROL) |=
+				SM501_PDC_FPEN;
+			return 0;
+		} else if (strncmp (argv[2], "off", 3) == 0) {
+			*(vu_long *) (SM501_MMIO_BASE +
+				      SM501_PANEL_DISPLAY_CONTROL) &=
+				~SM501_PDC_FPEN;
+			udelay (1000);
+			*(vu_long *) (SM501_MMIO_BASE +
+				      SM501_PANEL_DISPLAY_CONTROL) &=
+				~SM501_PDC_BIAS;
+			return 0;
+		}
 	}
-	else if (strncmp (argv[2], "off", 3) == 0) {
-	    *(vu_long *)(SM501_MMIO_BASE + SM501_PANEL_DISPLAY_CONTROL) &= ~SM501_PDC_FPEN;
-	    udelay(1000);
-	    *(vu_long *)(SM501_MMIO_BASE + SM501_PANEL_DISPLAY_CONTROL) &= ~SM501_PDC_BIAS;
-	    return 0;
-	}
-    }
 #ifdef CONFIG_BC3450_CRT
-    else if (strncmp (argv[1], "crt", 3) == 0) {
-	/* enables/disables the crt output (debug only) */
-	if(strncmp (argv[2], "on", 2) == 0) {
-	    *(vu_long *)(SM501_MMIO_BASE + SM501_CRT_DISPLAY_CONTROL) |= 
-		(SM501_CDC_TE | SM501_CDC_E);
-	    *(vu_long *)(SM501_MMIO_BASE + SM501_CRT_DISPLAY_CONTROL) &= 
-		~SM501_CDC_SEL;
-	    return 0;
+	else if (strncmp (argv[1], "crt", 3) == 0) {
+		/* enables/disables the crt output (debug only) */
+		if (strncmp (argv[2], "on", 2) == 0) {
+			*(vu_long *) (SM501_MMIO_BASE +
+				      SM501_CRT_DISPLAY_CONTROL) |=
+				(SM501_CDC_TE | SM501_CDC_E);
+			*(vu_long *) (SM501_MMIO_BASE +
+				      SM501_CRT_DISPLAY_CONTROL) &=
+				~SM501_CDC_SEL;
+			return 0;
+		} else if (strncmp (argv[2], "off", 3) == 0) {
+			*(vu_long *) (SM501_MMIO_BASE +
+				      SM501_CRT_DISPLAY_CONTROL) &=
+				~(SM501_CDC_TE | SM501_CDC_E);
+			*(vu_long *) (SM501_MMIO_BASE +
+				      SM501_CRT_DISPLAY_CONTROL) |=
+				SM501_CDC_SEL;
+			return 0;
+		}
 	}
-	else if (strncmp (argv[2], "off", 3) == 0) {
-	    *(vu_long *)(SM501_MMIO_BASE + SM501_CRT_DISPLAY_CONTROL) &= 
-		~(SM501_CDC_TE | SM501_CDC_E);
-	    *(vu_long *)(SM501_MMIO_BASE + SM501_CRT_DISPLAY_CONTROL) |= 
-		SM501_CDC_SEL;
-	    return 0;
-	}
-    }
 #endif /* CONFIG_BC3450_CRT */
-    printf("Usage:%s\n", cmdtp->help);
-    return 1;
+	printf ("Usage:%s\n", cmdtp->help);
+	return 1;
 }
 
-U_BOOT_CMD(
-	fp ,	3,	1,	cmd_fp,
-	"fp      - front panes access functions\n",
-	"\n"
-	"fp bl <on/off>\n"
-	"     - turns the CCFL backlight of the display on/off\n"
-	"fp <on/off>\n"
-	"     - turns the whole display on/off\n"
+U_BOOT_CMD (fp, 3, 1, cmd_fp,
+	    "fp      - front panes access functions\n",
+	    "\n"
+	    "fp bl <on/off>\n"
+	    "     - turns the CCFL backlight of the display on/off\n"
+	    "fp <on/off>\n" "     - turns the whole display on/off\n"
 #ifdef CONFIG_BC3450_CRT
-	"fp crt <on/off>\n"
-	"     - enables/disables the crt output (debug only)\n"
+	    "fp crt <on/off>\n"
+	    "     - enables/disables the crt output (debug only)\n"
 #endif /* CONFIG_BC3450_CRT */
-    );
+	);
 
 
 /*
  * temp - DS1620 thermometer
  */
 /* GERSYS BC3450 specific functions */
-static inline void bc_ds1620_set_clk(int clk)
+static inline void bc_ds1620_set_clk (int clk)
 {
-    if(clk)
-	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) |= DS1620_CLK;
-    else
-	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) &= ~DS1620_CLK;
+	if (clk)
+		*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) |=
+			DS1620_CLK;
+	else
+		*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) &=
+			~DS1620_CLK;
 }
 
-static inline void bc_ds1620_set_data(int dat)
+static inline void bc_ds1620_set_data (int dat)
 {
-    if(dat)
-	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) |= DS1620_DQ;
-    else
-	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) &= ~DS1620_DQ;
+	if (dat)
+		*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) |=
+			DS1620_DQ;
+	else
+		*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) &=
+			~DS1620_DQ;
 }
 
-static inline int bc_ds1620_get_data(void)
+static inline int bc_ds1620_get_data (void)
 {
-    vu_long rc;
-    rc = *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW);
-    rc &= DS1620_DQ;
-    if(rc != 0)
-	rc = 1;
-    return (int)rc;
+	vu_long rc;
+
+	rc = *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW);
+	rc &= DS1620_DQ;
+	if (rc != 0)
+		rc = 1;
+	return (int) rc;
 }
 
-static inline void bc_ds1620_set_data_dir(int dir)
+static inline void bc_ds1620_set_data_dir (int dir)
 {
-    if(dir) /* in */
-	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_LOW) &= ~DS1620_DQ;
-    else /* out */
-	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_LOW) |= DS1620_DQ;
+	if (dir)		/* in */
+		*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_LOW) &= ~DS1620_DQ;
+	else			/* out */
+		*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_LOW) |= DS1620_DQ;
 }
 
-static inline void bc_ds1620_set_reset(int res)
+static inline void bc_ds1620_set_reset (int res)
 {
-    if(res)
-	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) |= DS1620_RES;
-    else
-	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) &= ~DS1620_RES;
+	if (res)
+		*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) |= DS1620_RES;
+	else
+		*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) &= ~DS1620_RES;
 }
 
 /* hardware independent functions */
-static void ds1620_send_bits(int nr, int value)
+static void ds1620_send_bits (int nr, int value)
 {
-    int i;
-    
-    for (i = 0; i < nr; i++) {
-	bc_ds1620_set_data(value & 1);
-	bc_ds1620_set_clk(0);
-	udelay(1);
-	bc_ds1620_set_clk(1);
-	udelay(1);
-	
-	value >>= 1;
-    }
+	int i;
+
+	for (i = 0; i < nr; i++) {
+		bc_ds1620_set_data (value & 1);
+		bc_ds1620_set_clk (0);
+		udelay (1);
+		bc_ds1620_set_clk (1);
+		udelay (1);
+
+		value >>= 1;
+	}
 }
 
-static unsigned int ds1620_recv_bits(int nr)
+static unsigned int ds1620_recv_bits (int nr)
 {
-    unsigned int value = 0, mask = 1;
-    int i;
+	unsigned int value = 0, mask = 1;
+	int i;
 
-    bc_ds1620_set_data(0);
+	bc_ds1620_set_data (0);
 
-    for (i = 0; i < nr; i++) {
-	bc_ds1620_set_clk(0);
-	udelay(1);
+	for (i = 0; i < nr; i++) {
+		bc_ds1620_set_clk (0);
+		udelay (1);
 
-	if (bc_ds1620_get_data())
-	    value |= mask;
+		if (bc_ds1620_get_data ())
+			value |= mask;
 
-	mask <<= 1;
+		mask <<= 1;
 
-	bc_ds1620_set_clk(1);
-	udelay(1);
-    }
+		bc_ds1620_set_clk (1);
+		udelay (1);
+	}
 
-    return value;
+	return value;
 }
 
-static void ds1620_out(int cmd, int bits, int value)
+static void ds1620_out (int cmd, int bits, int value)
 {
-    bc_ds1620_set_clk(1);
-    bc_ds1620_set_data_dir(0);
+	bc_ds1620_set_clk (1);
+	bc_ds1620_set_data_dir (0);
 
-    bc_ds1620_set_reset(0);
-    udelay(1);
-    bc_ds1620_set_reset(1);
+	bc_ds1620_set_reset (0);
+	udelay (1);
+	bc_ds1620_set_reset (1);
 
-    udelay(1);
+	udelay (1);
 
-    ds1620_send_bits(8, cmd);
-    if (bits)
-	ds1620_send_bits(bits, value);
+	ds1620_send_bits (8, cmd);
+	if (bits)
+		ds1620_send_bits (bits, value);
 
-    udelay(1);
+	udelay (1);
 
-    /* go stand alone */
-    bc_ds1620_set_data_dir(1);
-    bc_ds1620_set_reset(0);
-    bc_ds1620_set_clk(0);
+	/* go stand alone */
+	bc_ds1620_set_data_dir (1);
+	bc_ds1620_set_reset (0);
+	bc_ds1620_set_clk (0);
 
-    udelay(10000);
+	udelay (10000);
 }
 
-static unsigned int ds1620_in(int cmd, int bits)
+static unsigned int ds1620_in (int cmd, int bits)
 {
-    unsigned int value;
+	unsigned int value;
 
-    bc_ds1620_set_clk(1);
-    bc_ds1620_set_data_dir(0);
+	bc_ds1620_set_clk (1);
+	bc_ds1620_set_data_dir (0);
 
-    bc_ds1620_set_reset(0);
-    udelay(1);
-    bc_ds1620_set_reset(1);
+	bc_ds1620_set_reset (0);
+	udelay (1);
+	bc_ds1620_set_reset (1);
 
-    udelay(1);
+	udelay (1);
 
-    ds1620_send_bits(8, cmd);
+	ds1620_send_bits (8, cmd);
 
-    bc_ds1620_set_data_dir(1);
-    value = ds1620_recv_bits(bits);
+	bc_ds1620_set_data_dir (1);
+	value = ds1620_recv_bits (bits);
 
-    /* go stand alone */
-    bc_ds1620_set_data_dir(1);
-    bc_ds1620_set_reset(0);
-    bc_ds1620_set_clk(0);
+	/* go stand alone */
+	bc_ds1620_set_data_dir (1);
+	bc_ds1620_set_reset (0);
+	bc_ds1620_set_clk (0);
 
-    return value;
+	return value;
 }
 
-static int cvt_9_to_int(unsigned int val)
+static int cvt_9_to_int (unsigned int val)
 {
-    if (val & 0x100)
-	val |= 0xfffffe00;
+	if (val & 0x100)
+		val |= 0xfffffe00;
 
-    return val;
+	return val;
 }
 
 /* set thermostate thresholds */
-static void ds1620_write_state(struct therm *therm)
+static void ds1620_write_state (struct therm *therm)
 {
-    ds1620_out(THERM_WRITE_TL, 9, therm->lo);
-    ds1620_out(THERM_WRITE_TH, 9, therm->hi);
-    ds1620_out(THERM_START_CONVERT, 0, 0);
+	ds1620_out (THERM_WRITE_TL, 9, therm->lo);
+	ds1620_out (THERM_WRITE_TH, 9, therm->hi);
+	ds1620_out (THERM_START_CONVERT, 0, 0);
 }
 
-static int cmd_temp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int cmd_temp (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
-    int i;
-    struct therm therm;
+	int i;
+	struct therm therm;
 
-    sm501_gpio_init();
+	sm501_gpio_init ();
 
-    /* print temperature */
-    if (argc == 1) {
-	i = cvt_9_to_int(ds1620_in(THERM_READ_TEMP, 9));
-	printf("%d.%d C\n", i >> 1, i & 1 ? 5 : 0);
-	return 0;
-    }
-
-    /* set to default operation */
-    if (strncmp (argv[1], "set", 3) == 0) {
-	if(strncmp (argv[2], "default", 3) == 0) {
-	    therm.hi = +88;
-	    therm.lo = -20;
-	    therm.hi <<= 1;
-	    therm.lo <<= 1;
-	    ds1620_write_state(&therm);
-	    ds1620_out(THERM_WRITE_CONFIG, 8, CFG_STANDALONE);
-	    return 0;
+	/* print temperature */
+	if (argc == 1) {
+		i = cvt_9_to_int (ds1620_in (THERM_READ_TEMP, 9));
+		printf ("%d.%d C\n", i >> 1, i & 1 ? 5 : 0);
+		return 0;
 	}
-    }
 
-    printf ("Usage:%s\n", cmdtp->help);
-    return 1;
+	/* set to default operation */
+	if (strncmp (argv[1], "set", 3) == 0) {
+		if (strncmp (argv[2], "default", 3) == 0) {
+			therm.hi = +88;
+			therm.lo = -20;
+			therm.hi <<= 1;
+			therm.lo <<= 1;
+			ds1620_write_state (&therm);
+			ds1620_out (THERM_WRITE_CONFIG, 8, CFG_STANDALONE);
+			return 0;
+		}
+	}
+
+	printf ("Usage:%s\n", cmdtp->help);
+	return 1;
 }
 
-U_BOOT_CMD(
-	temp ,	3,	1,	cmd_temp,
-	"temp    - print current temperature\n",
-	"\n"
-	"temp\n"
-	"     - print current temperature\n"
-);
+U_BOOT_CMD (temp, 3, 1, cmd_temp,
+	    "temp    - print current temperature\n",
+	    "\n" "temp\n" "     - print current temperature\n");
 
 #ifdef CONFIG_BC3450_CAN
 /*
@@ -512,40 +533,40 @@
  * return 1 on CAN initialization failure
  * return 0 if no failure
  */
-int can_init(void)
+int can_init (void)
 {
 	static int init_done = 0;
 	int i;
 	struct mpc5xxx_mscan *can1 =
-		(struct mpc5xxx_mscan *)(CFG_MBAR + 0x0900);
+		(struct mpc5xxx_mscan *) (CFG_MBAR + 0x0900);
 	struct mpc5xxx_mscan *can2 =
-		(struct mpc5xxx_mscan *)(CFG_MBAR + 0x0980);
+		(struct mpc5xxx_mscan *) (CFG_MBAR + 0x0980);
 
 	/* GPIO configuration of the CAN pins is done in BC3450.h */
 
 	if (!init_done) {
 		/* init CAN 1 */
 		can1->canctl1 |= 0x80;	/* CAN enable */
-		udelay(100);
+		udelay (100);
 
 		i = 0;
 		can1->canctl0 |= 0x02;	/* sleep mode */
 		/* wait until sleep mode reached */
 		while (!(can1->canctl1 & 0x02)) {
-			udelay(10);
-		i++;
-		if (i == 10) {
-			printf ("%s: CAN1 initialize error, "
-				"can not enter sleep mode!\n",
-				__FUNCTION__);
-			return 1;
-		}
+			udelay (10);
+			i++;
+			if (i == 10) {
+				printf ("%s: CAN1 initialize error, "
+					"can not enter sleep mode!\n",
+					__FUNCTION__);
+				return 1;
+			}
 		}
 		i = 0;
 		can1->canctl0 = 0x01;	/* enter init mode */
 		/* wait until init mode reached */
 		while (!(can1->canctl1 & 0x01)) {
-			udelay(10);
+			udelay (10);
 			i++;
 			if (i == 10) {
 				printf ("%s: CAN1 initialize error, "
@@ -577,7 +598,7 @@
 		can1->canctl0 &= ~(0x02);
 		/* wait until init and sleep mode left */
 		while ((can1->canctl1 & 0x01) || (can1->canctl1 & 0x02)) {
-			udelay(10);
+			udelay (10);
 			i++;
 			if (i == 10) {
 				printf ("%s: CAN1 initialize error, "
@@ -589,13 +610,13 @@
 
 		/* init CAN 2 */
 		can2->canctl1 |= 0x80;	/* CAN enable */
-		udelay(100);
+		udelay (100);
 
 		i = 0;
 		can2->canctl0 |= 0x02;	/* sleep mode */
 		/* wait until sleep mode reached */
-		while (!(can2->canctl1 & 0x02))	{
-			udelay(10);
+		while (!(can2->canctl1 & 0x02)) {
+			udelay (10);
 			i++;
 			if (i == 10) {
 				printf ("%s: CAN2 initialize error, "
@@ -607,8 +628,8 @@
 		i = 0;
 		can2->canctl0 = 0x01;	/* enter init mode */
 		/* wait until init mode reached */
-		while (!(can2->canctl1 & 0x01))	{
-			udelay(10);
+		while (!(can2->canctl1 & 0x01)) {
+			udelay (10);
 			i++;
 			if (i == 10) {
 				printf ("%s: CAN2 initialize error, "
@@ -640,7 +661,7 @@
 		i = 0;
 		/* wait until init mode left */
 		while ((can2->canctl1 & 0x01) || (can2->canctl1 & 0x02)) {
-			udelay(10);
+			udelay (10);
 			i++;
 			if (i == 10) {
 				printf ("%s: CAN2 initialize error, "
@@ -661,13 +682,13 @@
  * return 1 on CAN failure
  * return 0 if no failure
  */
-int do_can(char *argv[])
+int do_can (char *argv[])
 {
 	int i;
-	struct mpc5xxx_mscan *can1 = 
-		(struct mpc5xxx_mscan *)(CFG_MBAR + 0x0900);
-	struct mpc5xxx_mscan *can2 = 
-		(struct mpc5xxx_mscan *)(CFG_MBAR + 0x0980);
+	struct mpc5xxx_mscan *can1 =
+		(struct mpc5xxx_mscan *) (CFG_MBAR + 0x0900);
+	struct mpc5xxx_mscan *can2 =
+		(struct mpc5xxx_mscan *) (CFG_MBAR + 0x0980);
 
 	/* send a message on CAN1 */
 	can1->cantbsel = 0x01;
@@ -685,30 +706,27 @@
 		i++;
 		if (i == 10) {
 			printf ("%s: CAN1 send timeout, "
-				"can not send message!\n",
-				__FUNCTION__);
+				"can not send message!\n", __FUNCTION__);
 			return 1;
 		}
-		udelay(1000);
+		udelay (1000);
 	}
-	udelay(1000);
+	udelay (1000);
 
 	i = 0;
-	while (!(can2->canrflg & 0x01))	{
+	while (!(can2->canrflg & 0x01)) {
 		i++;
 		if (i == 10) {
 			printf ("%s: CAN2 receive timeout, "
-				"no message received!\n",
-				__FUNCTION__);
+				"no message received!\n", __FUNCTION__);
 			return 1;
 		}
-		udelay(1000);
+		udelay (1000);
 	}
-	
+
 	if (can2->canrxfg.dsr[0] != 0xCC) {
 		printf ("%s: CAN2 receive error, "
-			 "data mismatch!\n",
-			__FUNCTION__);
+			"data mismatch!\n", __FUNCTION__);
 		return 1;
 	}
 
@@ -728,24 +746,22 @@
 		i++;
 		if (i == 10) {
 			printf ("%s: CAN2 send error, "
-				"can not send message!\n",
-				__FUNCTION__);
+				"can not send message!\n", __FUNCTION__);
 			return 1;
 		}
-		udelay(1000);
+		udelay (1000);
 	}
-	udelay(1000);
+	udelay (1000);
 
 	i = 0;
-	while (!(can1->canrflg & 0x01))	{
+	while (!(can1->canrflg & 0x01)) {
 		i++;
 		if (i == 10) {
 			printf ("%s: CAN1 receive timeout, "
-				"no message received!\n",
-				__FUNCTION__);
+				"no message received!\n", __FUNCTION__);
 			return 1;
 		}
-		udelay(1000);
+		udelay (1000);
 	}
 
 	if (can1->canrxfg.dsr[0] != 0xCC) {
@@ -761,53 +777,51 @@
 /*
  * test - BC3450 HW test routines
  */
-int cmd_test(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int cmd_test (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
 #ifdef CONFIG_BC3450_CAN
-    int rcode;
-    can_init();
+	int rcode;
+
+	can_init ();
 #endif /* CONFIG_BC3450_CAN */
 
-    sm501_gpio_init();
+	sm501_gpio_init ();
 
-    if (argc != 2) {
+	if (argc != 2) {
+		printf ("Usage:%s\n", cmdtp->help);
+		return 1;
+	}
+
+	if (strncmp (argv[1], "unit-off", 8) == 0) {
+		printf ("waiting 2 seconds...\n");
+		udelay (2000000);
+		*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) &=
+			~PWR_OFF;
+		return 0;
+	}
+#ifdef CONFIG_BC3450_CAN
+	else if (strncmp (argv[1], "can", 2) == 0) {
+		rcode = do_can (argv);
+		if (simple_strtoul (argv[2], NULL, 10) == 2) {
+			if (rcode == 0)
+				printf ("OK\n");
+			else
+				printf ("Error\n");
+		}
+		return rcode;
+	}
+#endif /* CONFIG_BC3450_CAN */
+
 	printf ("Usage:%s\n", cmdtp->help);
 	return 1;
-    }
-
-    if (strncmp (argv[1], "unit-off", 8) == 0) {
-	printf ("waiting 2 seconds...\n");
-	udelay(2000000);
-	*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) &= ~PWR_OFF;
-	return 0;
-    }
-#ifdef CONFIG_BC3450_CAN
-    else if (strncmp (argv[1], "can", 2) == 0) {
-	rcode = do_can (argv);
-	if (simple_strtoul(argv[2], NULL, 10) == 2) {
-	    if (rcode == 0)
-		printf ("OK\n");
-	    else
-		printf ("Error\n");
-	}
-	return rcode;
-    }
-#endif /* CONFIG_BC3450_CAN */
-
-    printf ("Usage:%s\n", cmdtp->help);
-    return 1;
 }
 
-U_BOOT_CMD(
-	test ,	2,	1,	cmd_test,
-	"test    - unit test routines\n",
-	"\n"
+U_BOOT_CMD (test, 2, 1, cmd_test, "test    - unit test routines\n", "\n"
 #ifdef CONFIG_BC3450_CAN
-	"test can\n"
-	"     - connect CAN1 (X8) with CAN2 (X9) for this test\n"
+	    "test can\n"
+	    "     - connect CAN1 (X8) with CAN2 (X9) for this test\n"
 #endif /* CONFIG_BC3450_CAN */
-	"test unit-off\n"
-	"     - turns off the BC3450 unit\n"
-	"       WARNING: Unsaved environment variables will be lost!\n"
-    );
+	    "test unit-off\n"
+	    "     - turns off the BC3450 unit\n"
+	    "       WARNING: Unsaved environment variables will be lost!\n");
 #endif /* CFG_CMD_BSP */
diff --git a/board/nc650/nand.c b/board/nc650/nand.c
index f27e536..de54386 100644
--- a/board/nc650/nand.c
+++ b/board/nc650/nand.c
@@ -37,22 +37,22 @@
 	struct nand_chip *this = mtd->priv;
 
 	switch(cmd) {
-		case NAND_CTL_SETCLE:
-			this->IO_ADDR_W += 2;
-			break;
-		case NAND_CTL_CLRCLE:
-			this->IO_ADDR_W -= 2;
-			break;
-		case NAND_CTL_SETALE:
-			this->IO_ADDR_W += 1;
-			break;
-		case NAND_CTL_CLRALE:
-			this->IO_ADDR_W -= 1;
-			break;
-		case NAND_CTL_SETNCE:
-		case NAND_CTL_CLRNCE:
-			/* nop */
-			break;
+	case NAND_CTL_SETCLE:
+		this->IO_ADDR_W += 2;
+		break;
+	case NAND_CTL_CLRCLE:
+		this->IO_ADDR_W -= 2;
+		break;
+	case NAND_CTL_SETALE:
+		this->IO_ADDR_W += 1;
+		break;
+	case NAND_CTL_CLRALE:
+		this->IO_ADDR_W -= 1;
+		break;
+	case NAND_CTL_SETNCE:
+	case NAND_CTL_CLRNCE:
+		/* nop */
+		break;
 	}
 }
 #elif defined(CONFIG_IDS852_REV2)
@@ -64,24 +64,24 @@
 	struct nand_chip *this = mtd->priv;
 
 	switch(cmd) {
-		case NAND_CTL_SETCLE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0xa) = 0; 
-			break;
-		case NAND_CTL_CLRCLE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
-			break;
-		case NAND_CTL_SETALE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x9) = 0; 
-			break;
-		case NAND_CTL_CLRALE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
-			break;
-		case NAND_CTL_SETNCE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
-			break;
-		case NAND_CTL_CLRNCE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0xc) = 0; 
-			break;
+	case NAND_CTL_SETCLE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0xa) = 0;
+		break;
+	case NAND_CTL_CLRCLE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
+		break;
+	case NAND_CTL_SETALE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0x9) = 0;
+		break;
+	case NAND_CTL_CLRALE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
+		break;
+	case NAND_CTL_SETNCE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
+		break;
+	case NAND_CTL_CLRNCE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0xc) = 0;
+		break;
 	}
 }
 #else
diff --git a/board/nc650/nc650.c b/board/nc650/nc650.c
index c90ac9c..8a6b5b0 100644
--- a/board/nc650/nc650.c
+++ b/board/nc650/nc650.c
@@ -265,8 +265,8 @@
 	int             iCompatMode = 0;
 	char            *pParam = NULL;
 	char            *envlb;
-	
-	/* 
+
+	/*
 	   First byte in CPLD read address space signals compatibility mode
 	   0 - cp850
 	   1 - kp852
@@ -274,9 +274,9 @@
 	pParam = (char*)(CFG_CPLD_BASE);
 	if( *pParam != 0)
 		iCompatMode = 1;
-	
+
 	if ( iCompatMode != 0) {
-		/* 
+		/*
 		   In KP852 compatibility mode we have to write to
 		   DPRAM as early as possible the binary coded
 		   line config and board name.
@@ -288,7 +288,7 @@
 			setenv( DPRAM_VARNAME, DEFAULT_LB);
 			envlb = DEFAULT_LB;
 		}
-		
+
 		/* Status string */
 		printf("Mode:  KP852(LB=%s)\n", envlb);
 
@@ -305,7 +305,7 @@
 	} else {
 		puts("Mode:  CP850\n");
 	}
-	
+
 	return 0;
 }
 #endif
diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h
index a79de40..5b54f30 100644
--- a/include/configs/BC3450.h
+++ b/include/configs/BC3450.h
@@ -42,21 +42,21 @@
 #define CONFIG_MPC5200		1	/* (more precisely a MPC5200 CPU)   */
 #define CONFIG_TQM5200		1	/* ... on a TQM5200 module	    */
 
-#define CONFIG_BC3450           1       /* ... on a BC3450 mainboard	    */
-#define CONFIG_BC3450_PS2	1       /*  + a PS/2 converter onboard	    */
-#define CONFIG_BC3450_IDE	1       /*  + IDE drives (Compact Flash)    */
+#define CONFIG_BC3450		1	/* ... on a BC3450 mainboard	    */
+#define CONFIG_BC3450_PS2	1	/*  + a PS/2 converter onboard	    */
+#define CONFIG_BC3450_IDE	1	/*  + IDE drives (Compact Flash)    */
 #define CONFIG_BC3450_USB	1	/*  + USB support		    */
 # define CONFIG_FAT		1	/*    + FAT support		    */
 # define CONFIG_EXT2		1	/*    + EXT2 support		    */
 #undef CONFIG_BC3450_BUZZER		/*  + Buzzer onboard		    */
 #undef CONFIG_BC3450_CAN		/*  + CAN transceiver		    */
 #undef CONFIG_BC3450_DS1340		/*  + a RTC DS1340 onboard	    */
-#undef CONFIG_BC3450_DS3231		/*  + a RTC DS3231 onboard      tbd */
-#undef CONFIG_BC3450_AC97		/*  + AC97 on PSC2,             tbd */
+#undef CONFIG_BC3450_DS3231		/*  + a RTC DS3231 onboard	tbd */
+#undef CONFIG_BC3450_AC97		/*  + AC97 on PSC2,		tbd */
 #define CONFIG_BC3450_FP	1	/*  + enable FP O/P		    */
 #undef CONFIG_BC3450_CRT		/*  + enable CRT O/P (Debug only!)  */
 
-#define CFG_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz     */
+#define CFG_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz	    */
 
 #define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH */
 #define BOOTFLAG_WARM		0x02	/* Software reboot		    */
@@ -91,7 +91,7 @@
  */
 # define CONFIG_PCI		1
 # define CONFIG_PCI_PNP		1
-/* #define CONFIG_PCI_SCAN_SHOW	1 */
+/* #define CONFIG_PCI_SCAN_SHOW 1 */
 
 #define CONFIG_PCI_MEM_BUS	0x40000000
 #define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
@@ -103,7 +103,7 @@
 
 #define CONFIG_NET_MULTI	1
 /*#define CONFIG_EEPRO100	XXX - FIXME: conflicts when CONFIG_MII is enabled */
-#define CFG_RX_ETH_BUFFER	8	/* use 8 rx buffer on eepro100  */
+#define CFG_RX_ETH_BUFFER	8	/* use 8 rx buffer on eepro100	*/
 #define CONFIG_NS8382X		1
 
 #ifdef CONFIG_PCI
@@ -132,15 +132,15 @@
 # define ADD_BMP_CMD		0
 #endif
 
-/* 
- * Partitions 
+/*
+ * Partitions
  */
 #define CONFIG_MAC_PARTITION
 #define CONFIG_DOS_PARTITION
 #define CONFIG_ISO_PARTITION
 
-/* 
- * USB 
+/*
+ * USB
  */
 #ifdef CONFIG_BC3450_USB
 # define CONFIG_USB_OHCI
@@ -150,8 +150,8 @@
 # define ADD_USB_CMD		0
 #endif /* CONFIG_BC3450_USB */
 
-/* 
- * POST support 
+/*
+ * POST support
  */
 #define CONFIG_POST		(CFG_POST_MEMORY   | \
 				 CFG_POST_CPU	   | \
@@ -165,8 +165,8 @@
 # define CFG_CMD_POST_DIAG 0
 #endif /* CONFIG_POST */
 
-/* 
- * IDE 
+/*
+ * IDE
  */
 #ifdef CONFIG_BC3450_IDE
 # define ADD_IDE_CMD		CFG_CMD_IDE
@@ -219,7 +219,7 @@
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
 
-#define	CONFIG_TIMESTAMP		/* display image timestamps */
+#define CONFIG_TIMESTAMP		/* display image timestamps */
 
 #if (TEXT_BASE == 0xFC000000)		/* Boot low */
 #   define CFG_LOWBOOT		1
@@ -242,14 +242,14 @@
 	"ipaddr=192.168.1.10\0"						\
 	"serverip=192.168.1.3\0"					\
 	"netmask=255.255.255.0\0"					\
-        "hostname=bc3450\0"                                             \
+	"hostname=bc3450\0"						\
 	"rootpath=/opt/eldk/ppc_6xx\0"					\
-        "kernel_addr=fc0a0000\0"					\
-        "ramdisk_addr=fc1c0000\0"					\
+	"kernel_addr=fc0a0000\0"					\
+	"ramdisk_addr=fc1c0000\0"					\
 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
 		"nfsroot=$(serverip):$(rootpath)\0"			\
-        "ideargs=setenv bootargs root=/dev/hda2 ro\0"			\
+	"ideargs=setenv bootargs root=/dev/hda2 ro\0"			\
 	"addip=setenv bootargs $(bootargs) "				\
 		"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"	\
 		":$(hostname):$(netdev):off panic=1\0"			\
@@ -260,10 +260,10 @@
 	"flash_nfs=run nfsargs addip addcons; bootm $(kernel_addr)\0"	\
 	"net_nfs=tftp 200000 $(bootfile); "				\
 		"run nfsargs addip addcons; bootm\0"			\
-        "ide_nfs=run nfsargs addip addcons; "				\
-                "disk 200000 0:1; bootm\0"				\
-        "ide_ide=run ideargs addip addcons; "				\
-                "disk 200000 0:1; bootm\0" 				\
+	"ide_nfs=run nfsargs addip addcons; "				\
+		"disk 200000 0:1; bootm\0"				\
+	"ide_ide=run ideargs addip addcons; "				\
+		"disk 200000 0:1; bootm\0"				\
 	"usb_self=run usbload; run ramargs addip addcons; "		\
 		"bootm 200000 400000\0"					\
 	"usbload=usb reset; usb scan; usbboot 200000 0:1; "		\
@@ -288,7 +288,7 @@
  * PCI Bus clocking configuration
  *
  * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet 
+ * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet
  * hasn't been tested with a IPB Bus Clock of 66 MHz.
  */
 #if defined(CFG_IPBSPEED_133)
@@ -314,9 +314,9 @@
 #define CFG_I2C_SLAVE		0x7F
 
 /*
- * EEPROM configuration for I²C EEPROM M24C32 
+ * EEPROM configuration for I²C EEPROM M24C32
  * M24C64 should work also. For other EEPROMs config should be verified.
- * 
+ *
  * The TQM5200 module may hold an EEPROM at address 0x50.
  */
 #define CFG_I2C_EEPROM_ADDR		0x50	/* 1010000x (TQM) */
@@ -376,7 +376,7 @@
 #define CFG_ENV_SIZE		0x10000
 #define CFG_ENV_SECT_SIZE	0x20000
 #define CFG_ENV_ADDR_REDUND	(CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
-#define	CFG_ENV_SIZE_REDUND	(CFG_ENV_SIZE)
+#define CFG_ENV_SIZE_REDUND	(CFG_ENV_SIZE)
 
 /*
  * Memory map
@@ -419,25 +419,25 @@
 /*
  * GPIO configuration on BC3450
  *
- *  PSC1:   UART1 (Service-UART)         [0x xxxxxxx4]
- *  PSC2:   UART2                        [0x xxxxxx4x]
- *    or:   AC/97 if CONFIG_BC3450_AC97  [0x xxxxxx2x]
- *  PSC3:   USB2                         [0x xxxxx1xx]
- *  USB:    UART4(ext.)/UART5(int.)      [0x xxxx2xxx]
- *            (this has to match 
- *            CONFIG_USB_CONFIG which is
- *            used by usb_ohci.c to set 
- *            the USB ports)
- *  Eth:    10/100Mbit Ethernet          [0x xxx0xxxx]
- *            (this is reset to '5' 
- *            in FEC driver: fec.c)
- *  PSC6:   UART6 (int. to PS/2 contr.)  [0x xx5xxxxx]
- *  ATA/CS: ???                          [0x x1xxxxxx]
- *          FIXME! UM Fig 2-10 suggests  [0x x0xxxxxx]
+ *  PSC1:   UART1 (Service-UART)	 [0x xxxxxxx4]
+ *  PSC2:   UART2			 [0x xxxxxx4x]
+ *    or:   AC/97 if CONFIG_BC3450_AC97	 [0x xxxxxx2x]
+ *  PSC3:   USB2			 [0x xxxxx1xx]
+ *  USB:    UART4(ext.)/UART5(int.)	 [0x xxxx2xxx]
+ *	      (this has to match
+ *	      CONFIG_USB_CONFIG which is
+ *	      used by usb_ohci.c to set
+ *	      the USB ports)
+ *  Eth:    10/100Mbit Ethernet		 [0x xxx0xxxx]
+ *	      (this is reset to '5'
+ *	      in FEC driver: fec.c)
+ *  PSC6:   UART6 (int. to PS/2 contr.)	 [0x xx5xxxxx]
+ *  ATA/CS: ???				 [0x x1xxxxxx]
+ *	    FIXME! UM Fig 2-10 suggests	 [0x x0xxxxxx]
  *  CS1:    Use Pin gpio_wkup_6 as second
- *          SDRAM chip select (mem_cs1)
+ *	    SDRAM chip select (mem_cs1)
  *  Timer:  CAN2 / SPI
- *  I2C:    CAN1 / I²C2                  [0x bxxxxxxx]
+ *  I2C:    CAN1 / I²C2		  [0x bxxxxxxx]
  */
 #ifdef CONFIG_BC3450_AC97
 # define CFG_GPS_PORT_CONFIG	0xb1502124
@@ -465,7 +465,7 @@
 #define CFG_MEMTEST_START	0x00100000	/* memtest works on	    */
 #define CFG_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM	    */
 
-#define CFG_LOAD_ADDR		0x100000	/* default load address     */
+#define CFG_LOAD_ADDR		0x100000	/* default load address	    */
 
 #define CFG_HZ			1000		/* dec freq: 1ms ticks	    */
 
@@ -489,7 +489,7 @@
 #define CFG_BOOTCS_START	CFG_FLASH_BASE
 #define CFG_BOOTCS_SIZE		CFG_FLASH_SIZE
 #ifdef CFG_PCISPEED_66
-# define CFG_BOOTCS_CFG		0x0008DF30	/* for pci_clk  = 66 MHz */
+# define CFG_BOOTCS_CFG		0x0008DF30	/* for pci_clk	= 66 MHz */
 #else
 # define CFG_BOOTCS_CFG		0x0004DF30	/* for pci_clk = 33 MHz	 */
 #endif
@@ -533,17 +533,17 @@
  * USB stuff
  */
 #define CONFIG_USB_CLOCK	0x0001BBBB
-#define CONFIG_USB_CONFIG	0x00002000      /* we're using Port 2	*/
+#define CONFIG_USB_CONFIG	0x00002000	/* we're using Port 2	*/
 
 /*
  * IDE/ATA stuff Supports IDE harddisk
  */
 #undef	CONFIG_IDE_8xx_PCCARD		/* Use IDE with PC Card Adapter */
 
-#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE     not supported	*/
-#undef	CONFIG_IDE_LED			/* LED for ide    not supported	*/
+#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE	  not supported */
+#undef	CONFIG_IDE_LED			/* LED for ide	  not supported */
 
-#define CONFIG_IDE_RESET		/* reset for ide      supported	*/
+#define CONFIG_IDE_RESET		/* reset for ide      supported */
 #define CONFIG_IDE_PREINIT
 
 #define CFG_IDE_MAXBUS		1	/* max. 1 IDE bus		*/