add c structures for SoC access
* add's c structures for SoC access to pheriperials head files
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
diff --git a/include/asm-arm/arch-at91/at91_spi.h b/include/asm-arm/arch-at91/at91_spi.h
index 30643c6..c520e89 100644
--- a/include/asm-arm/arch-at91/at91_spi.h
+++ b/include/asm-arm/arch-at91/at91_spi.h
@@ -16,6 +16,25 @@
#ifndef AT91_SPI_H
#define AT91_SPI_H
+#include <asm/arch/at91_pdc.h>
+
+typedef struct at91_spi {
+ u32 cr; /* 0x00 Control Register */
+ u32 mr; /* 0x04 Mode Register */
+ u32 rdr; /* 0x08 Receive Data Register */
+ u32 tdr; /* 0x0C Transmit Data Register */
+ u32 sr; /* 0x10 Status Register */
+ u32 ier; /* 0x14 Interrupt Enable Register */
+ u32 idr; /* 0x18 Interrupt Disable Register */
+ u32 imr; /* 0x1C Interrupt Mask Register */
+ u32 reserve1[4];
+ u32 csr[4]; /* 0x30 Chip Select Register 0-3 */
+ u32 reserve2[48];
+ at91_pdc_t pdc;
+} at91_spi_t;
+
+#ifdef CONFIG_AT91_LEGACY
+
#define AT91_SPI_CR 0x00 /* Control Register */
#define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */
#define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */
@@ -102,4 +121,6 @@
#define AT91_SPI_PTSR 0x0124 /* PDC Transfer Status Register */
+#endif /* CONFIG_AT91_LEGACY */
+
#endif