* Patch by Bernhard Kuhn, 28 Oct 2003:
Add low boot support for MPC5200
* Fix problem with dual PCMCIA support (NSCU)
* Fix MPC5200 I2C initialization function
diff --git a/cpu/mpc5xxx/i2c.c b/cpu/mpc5xxx/i2c.c
index ea37fb0..75c7739 100644
--- a/cpu/mpc5xxx/i2c.c
+++ b/cpu/mpc5xxx/i2c.c
@@ -229,9 +229,10 @@
{
DECLARE_GLOBAL_DATA_PTR;
static int fdr = -1;
- static int best_speed = 0;
if (fdr == -1) {
+ ulong best_speed = 0;
+ ulong divider;
ulong ipb, scl;
ulong bestmatch = 0xffffffffUL;
int best_i = 0, best_j = 0, i, j;
@@ -262,8 +263,13 @@
}
}
}
- fdr = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
- printf("%d kHz, ", best_speed / 1000);
+ divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
+ if (gd->flags & GD_FLG_RELOC) {
+ fdr = divider;
+ } else {
+ printf("%ld kHz, ", best_speed / 1000);
+ return divider;
+ }
}
return fdr;
diff --git a/cpu/mpc5xxx/start.S b/cpu/mpc5xxx/start.S
index 0557909..e0873ed 100644
--- a/cpu/mpc5xxx/start.S
+++ b/cpu/mpc5xxx/start.S
@@ -103,6 +103,47 @@
boot_warm:
mfmsr r5 /* save msr contents */
+#if defined(CFG_LOWBOOT)
+ lis r4, CFG_DEFAULT_MBAR@h
+ lis r3, 0x0000FF00@h
+ ori r3, r3, 0x0000FF00@l
+ stw r3, 0x4(r4)
+ lis r3, 0x0000FFFF@h
+ ori r3, r3, 0x0000FFFF@l
+ stw r3, 0x8(r4)
+ lis r3, 0x00047800@h
+ ori r3, r3, 0x00047800@l
+ stw r3, 0x300(r4)
+ lis r3, 0x02010000@h
+ ori r3, r3, 0x02010000@l
+ stw r3, 0x54(r4)
+
+#if defined(CFG_LOWBOOT08)
+ lis r3, 0xff800160@h
+ ori r3, r3, 0xff800160@l
+#endif
+#if defined(CFG_LOWBOOT16)
+ lis r3, 0xff000160@h
+ ori r3, r3, 0xff000160@l
+#endif
+ mtlr r3
+ blr
+lowboot_reentry: /* FLASH_BASE + 0x160 */
+
+ lis r3, 0x0000FF00@h
+ ori r3, r3, 0x0000FF00@l
+ stw r3, 0x4c(r4)
+ lis r3, 0x0000FFFF@h
+ ori r3, r3, 0x0000FFFF@l
+ stw r3, 0x50(r4)
+ lis r3, 0x00047800@h
+ ori r3, r3, 0x00047800@l
+ stw r3, 0x300(r4)
+ lis r3, 0x02000001@h
+ ori r3, r3, 0x02000001@l
+ stw r3, 0x54(r4)
+#endif /* CFG_LOWBOOT */
+
#if defined(CFG_DEFAULT_MBAR) && !defined(CFG_RAMBOOT)
lis r3, CFG_MBAR@h
ori r3, r3, CFG_MBAR@l