83xx, uec: split enet_interface in two variables

There's no sensible reason to unite speed and interface type into
one variable.  So split this variable enet_interface into two
vars: enet_interface_type, which hold the interface type and speed.

Also: add the possibility for switching between 10 and 100 MBit
interfaces on the fly, when running in FAST_ETH mode.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c
index 9715183..c4214d9 100644
--- a/drivers/qe/uec_phy.c
+++ b/drivers/qe/uec_phy.c
@@ -401,7 +401,8 @@
 
 	gbit_config_aneg(mii_info);
 
-	if (uec->uec_info->enet_interface == ENET_1000_RGMII_RXID) {
+	if ((uec->uec_info->enet_interface_type == RGMII_RXID) &&
+	   (uec->uec_info->speed == 1000)) {
 		u16 val;
 		int cnt = 50;
 
@@ -429,20 +430,22 @@
 {
 	struct eth_device *edev = mii_info->dev;
 	uec_private_t *uec = edev->priv;
-	enum enet_interface iface = uec->uec_info->enet_interface;
+	enum enet_interface_type iface = uec->uec_info->enet_interface_type;
+	int	speed = uec->uec_info->speed;
 
-	if (iface == ENET_1000_RGMII_ID ||
-			iface == ENET_1000_RGMII_RXID ||
-			iface == ENET_1000_RGMII_TXID) {
+	if ((speed == 1000) &&
+	   (iface == RGMII_ID ||
+	    iface == RGMII_RXID ||
+	    iface == RGMII_TXID)) {
 		int temp;
 
 		temp = phy_read(mii_info, MII_M1111_PHY_EXT_CR);
-		if (iface == ENET_1000_RGMII_ID) {
+		if (iface == RGMII_ID) {
 			temp |= MII_M1111_RX_DELAY | MII_M1111_TX_DELAY;
-		} else if (iface == ENET_1000_RGMII_RXID) {
+		} else if (iface == RGMII_RXID) {
 			temp &= ~MII_M1111_TX_DELAY;
 			temp |= MII_M1111_RX_DELAY;
-		} else if (iface == ENET_1000_RGMII_TXID) {
+		} else if (iface == RGMII_TXID) {
 			temp &= ~MII_M1111_RX_DELAY;
 			temp |= MII_M1111_TX_DELAY;
 		}
@@ -795,7 +798,9 @@
 }
 
 void marvell_phy_interface_mode (struct eth_device *dev,
-				 enet_interface_e mode)
+				 enet_interface_type_e type,
+				 int speed
+				)
 {
 	uec_private_t *uec = (uec_private_t *) dev->priv;
 	struct uec_mii_info *mii_info;
@@ -807,33 +812,35 @@
 	}
 	mii_info = uec->mii_info;
 
-	if (mode == ENET_100_RGMII) {
-		phy_write (mii_info, 0x00, 0x9140);
-		phy_write (mii_info, 0x1d, 0x001f);
-		phy_write (mii_info, 0x1e, 0x200c);
-		phy_write (mii_info, 0x1d, 0x0005);
-		phy_write (mii_info, 0x1e, 0x0000);
-		phy_write (mii_info, 0x1e, 0x0100);
-		phy_write (mii_info, 0x09, 0x0e00);
-		phy_write (mii_info, 0x04, 0x01e1);
-		phy_write (mii_info, 0x00, 0x9140);
-		phy_write (mii_info, 0x00, 0x1000);
-		udelay (100000);
-		phy_write (mii_info, 0x00, 0x2900);
-		phy_write (mii_info, 0x14, 0x0cd2);
-		phy_write (mii_info, 0x00, 0xa100);
-		phy_write (mii_info, 0x09, 0x0000);
-		phy_write (mii_info, 0x1b, 0x800b);
-		phy_write (mii_info, 0x04, 0x05e1);
-		phy_write (mii_info, 0x00, 0xa100);
-		phy_write (mii_info, 0x00, 0x2100);
-		udelay (1000000);
-	} else if (mode == ENET_10_RGMII) {
-		phy_write (mii_info, 0x14, 0x8e40);
-		phy_write (mii_info, 0x1b, 0x800b);
-		phy_write (mii_info, 0x14, 0x0c82);
-		phy_write (mii_info, 0x00, 0x8100);
-		udelay (1000000);
+	if (type == RGMII) {
+		if (speed == 100) {
+			phy_write (mii_info, 0x00, 0x9140);
+			phy_write (mii_info, 0x1d, 0x001f);
+			phy_write (mii_info, 0x1e, 0x200c);
+			phy_write (mii_info, 0x1d, 0x0005);
+			phy_write (mii_info, 0x1e, 0x0000);
+			phy_write (mii_info, 0x1e, 0x0100);
+			phy_write (mii_info, 0x09, 0x0e00);
+			phy_write (mii_info, 0x04, 0x01e1);
+			phy_write (mii_info, 0x00, 0x9140);
+			phy_write (mii_info, 0x00, 0x1000);
+			udelay (100000);
+			phy_write (mii_info, 0x00, 0x2900);
+			phy_write (mii_info, 0x14, 0x0cd2);
+			phy_write (mii_info, 0x00, 0xa100);
+			phy_write (mii_info, 0x09, 0x0000);
+			phy_write (mii_info, 0x1b, 0x800b);
+			phy_write (mii_info, 0x04, 0x05e1);
+			phy_write (mii_info, 0x00, 0xa100);
+			phy_write (mii_info, 0x00, 0x2100);
+			udelay (1000000);
+		} else if (speed == 10) {
+			phy_write (mii_info, 0x14, 0x8e40);
+			phy_write (mii_info, 0x1b, 0x800b);
+			phy_write (mii_info, 0x14, 0x0c82);
+			phy_write (mii_info, 0x00, 0x8100);
+			udelay (1000000);
+		}
 	}
 
 	/* handle 88e1111 rev.B2 erratum 5.6 */
@@ -844,9 +851,10 @@
 	/* now the B2 will correctly report autoneg completion status */
 }
 
-void change_phy_interface_mode (struct eth_device *dev, enet_interface_e mode)
+void change_phy_interface_mode (struct eth_device *dev,
+				enet_interface_type_e type, int speed)
 {
 #ifdef CONFIG_PHY_MODE_NEED_CHANGE
-	marvell_phy_interface_mode (dev, mode);
+	marvell_phy_interface_mode (dev, type, speed);
 #endif
 }