Merge branch '2023-05-15-assorted-bugfixes'
- Merge in a long-standing fix for some exynos platforms, correct a
Kconfig description, fix some env issues, fix an issue in
devfdt_get_addr_size_index_ptr and look for "panel-timings" not
"panel-timing" per upstream binding.
diff --git a/.mailmap b/.mailmap
index 4b3532e..312a428 100644
--- a/.mailmap
+++ b/.mailmap
@@ -17,66 +17,115 @@
Alexander Graf <agraf@csgraf.de> <agraf@suse.de>
Allen Martin <amartin@nvidia.com>
+Amanda Baze <amanda.baze@amd.com> <nicole.baze@xilinx.com>
+Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> <amit.kumar-mahapatra@xilinx.com>
Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann <andreas@biessmann.org>
Aneesh V <aneesh@ti.com>
Anup Patel <anup@brainfault.org> <anup.patel@wdc.com>
+Anurag Kumar Vulisha <AnuragKumar.Vulisha@amd.com> <anurag.kumar.vulisha@xilinx.com>
+Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com> <appana.durga.rao@xilinx.com>
+Ashok Reddy Soma <ashok.reddy.soma@amd.com> <ashok.reddy.soma@xilinx.com>
Atish Patra <atishp@atishpatra.org> <atish.patra@wdc.com>
+Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> <bharat.kumar.gogada@xilinx.com>
+Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> <bharatku@xilinx.com>
+Bhargava Sreekantappa Gayathri <bhargava.sreekantappa-gayathri@amd.com> <bhargava.sreekantappa-gayathri@xilinx.com>
Bin Meng <bmeng.cn@gmail.com> <bin.meng@windriver.com>
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>
+Christian Kohn <chris.kohn@amd.com> <christian.kohn@xilinx.com>
Dirk Behme <dirk.behme@googlemail.com>
+Durga Challa <durga.challa@amd.com> <vnsl.durga.challa@xilinx.com>
Eugen Hristev <eugen.hristev@collabora.com> <eugen.hristev@microchip.com>
Fabio Estevam <fabio.estevam@nxp.com>
+Harini Katakam <harini.katakam@amd.com> <harini.katakam@xilinx.com>
+Harsha <harsha.harsha@amd.com> <harsha.harsha@xilinx.com>
Heinrich Schuchardt <xypron.glpk@gmx.de> <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt <xypron.glpk@gmx.de> xypron.glpk@gmx.de <xypron.glpk@gmx.de>
+Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> <ibai.erkiaga-elorza@xilinx.com>
+Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@linaro.org>
+Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@toradex.com>
+Izhar Ameer Shaikh <izhar.ameer.shaikh@amd.com> <izhar.ameer.shaikh@xilinx.com>
Jagan Teki <402jagan@gmail.com>
Jagan Teki <jaganna@gmail.com>
Jagan Teki <jaganna@xilinx.com>
Jagan Teki <jagannadh.teki@gmail.com>
Jagan Teki <jagannadha.sutradharudu-teki@xilinx.com>
+Jay Buddhabhatti <jay.buddhabhatti@amd.com> <jay.buddhabhatti@xilinx.com>
Jernej Skrabec <jernej.skrabec@gmail.com> <jernej.skrabec@siol.net>
-Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@linaro.org>
-Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@toradex.com>
+John Linn <john.linn@amd.com> <john.linn@xilinx.com>
+Jyotheeswar Reddy Mutthareddyvari <jyotheeswar.reddy.mutthareddyvari@amd.com> <jyothee@xilinx.com>
+Jyotheeswar Reddy Mutthareddyvari <jyotheeswar.reddy.mutthareddyvari@amd.com> <jyotheeswar.reddy.mutthareddyvari@xilinx.com>
+Kalyani Akula <kalyani.akula@amd.com> <kalyani.akula@xilinx.com>
+Love Kumar <love.kumar@amd.com> <love.kumar@xilinx.com>
+Lukasz Majewski <lukma@denx.de>
Marek Behún <kabel@kernel.org> <marek.behun@nic.cz>
Marek Behún <kabel@kernel.org> Marek Behun <marek.behun@nic.cz>
Marek Vasut <marex@denx.de> <marek.vasut+renesas@gmail.com>
Marek Vasut <marex@denx.de> <marek.vasut@gmail.com>
Marek Vasut <marex@denx.de> <marex at denx.de>
Markus Klotzbuecher <mk@denx.de>
-Masahiro Yamada <yamada.masahiro@socionext.com> <yamada.m@jp.panasonic.com>
Masahiro Yamada <yamada.masahiro@socionext.com> <masahiroy@kernel.org>
+Masahiro Yamada <yamada.masahiro@socionext.com> <yamada.m@jp.panasonic.com>
+Michal Simek <michal.simek@amd.com> <Monstr@seznam.cz>
Michal Simek <michal.simek@amd.com> <michal.simek@xilinx.com>
-Michal Simek <michal.simek@xilinx.com> <monstr@monstr.eu>
-Michal Simek <michal.simek@xilinx.com> <Monstr@seznam.cz>
-Michal Simek <michal.simek@xilinx.com> <root@monstr.eu>
+Michal Simek <michal.simek@amd.com> <monstr@monstr.eu>
+Michal Simek <michal.simek@amd.com> <root@monstr.eu>
+Mirza <Taimoor_Mirza@mentor.com>
+Mounika Grace Akula <mounika.akula@amd.com> <mounika.grace.akula@xilinx.com>
+Mubin Usman Sayyed <mubin.sayyed@amd.com> <mubin.usman.sayyed@xilinx.com>
+Nathalie Chan King Choy <nathalie.chan-king-choy@amd.com> <nathalie.chan-king-choy@xilinx.com>
+Nathalie Chan King Choy <nathalie.chan-king-choy@amd.com> <nathalie@xilinx.com>
+Nava kishore Manne <nava.kishore.manne@amd.com> <nava.manne@xilinx.com>
+Neal Frager <neal.frager@amd.com> <neal.frager@xilinx.com>
Neil Armstrong <neil.armstrong@linaro.org> <narmstrong@baylibre.com>
Nicolas Saenz Julienne <nsaenz@kernel.org> <nsaenzjulienne@suse.de>
Patrice Chotard <patrice.chotard@foss.st.com> <patrice.chotard@st.com>
Patrick Delaunay <patrick.delaunay@foss.st.com> <patrick.delaunay@st.com>
Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>
+Piyush Mehta <piyush.mehta@amd.com> <piyush.mehta@xilinx.com>
Prabhakar Kushwaha <prabhakar@freescale.com>
+Punnaiah Choudary Kalluri <punnaiah.choudary.kalluri@amd.com> <punnaiah.choudary.kalluri@xilinx.com>
+Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> <radhey.shyam.pandey@xilinx.com>
Rajeshwari Shinde <rajeshwari.s@samsung.com>
-Ricardo Ribalda <ricardo@ribalda.com> <ricardo.ribalda@uam.es>
+Raju Kumar Pothuraju <rajukumar.pothuraju@amd.com> <raju.kumar-pothuraju@xilinx.com>
+Ravi Patel <ravi.patel@amd.com> <ravi.patel@xilinx.com>
Ricardo Ribalda <ricardo@ribalda.com> <ricardo.ribalda@gmail.com>
+Ricardo Ribalda <ricardo@ribalda.com> <ricardo.ribalda@uam.es>
+Rohit Visavalia <rohit.visavalia@amd.com> <rohit.visavalia@xilinx.com>
Ruchika Gupta <ruchika.gupta@nxp.com> <ruchika.gupta@freescale.com>
+Saeed Nowshadi <saeed.nowshadi@amd.com> <saeed.nowshadi@xilinx.com>
+Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> <lakshmi.sai.krishna.potthuri@xilinx.com>
+Sai Pavan Boddu <sai.pavan.boddu@amd.com> <sai.pavan.boddu@xilinx.com>
+Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> <sandeep.gundlupet-raju@xilinx.com>
Sandeep Paulraj <s-paulraj@ti.com>
+Sandeep Reddy Ghanapuram <sandeep.reddy-ghanapuram@amd.com> <sandeep.reddy-ghanapuram@xilinx.com>
Shaohui Xie <Shaohui.Xie@freescale.com>
+Shravya Kumbham <shravya.kumbham@amd.com> <shravya.kumbham@xilinx.com>
+Shubhrajyoti Datta <shubhrajyoti.datta@amd.com> <shubhrajyoti.datta@xilinx.com>
+Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> <siva.durga.paladugu@xilinx.com>
+Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> <sivadur@xilinx.com>
+Srinivas Goud <srinivas.goud@amd.com> <srinivas.goud@xilinx.com>
+Srinivas Neeli <srinivas.neeli@amd.com> <srinivas.neeli@xilinx.com>
Stefan Roese <sr@denx.de> <stroese>
Stefano Babic <sbabic@denx.de>
+Stefano Stabellini <stefano.stabellini@amd.com> <stefano.stabellini@xilinx.com>
Tom Rini <trini@konsulko.com> <trini@ti.com>
+Tomas Thoresen <tomas.thoresen@amd.com> <tomast@xilinx.com>
TsiChung Liew <Tsi-Chung.Liew@freescale.com>
-Wolfgang Denk <wd@denx.de> <wdenk>
-Wolfgang Denk <wd@denx.de> <wd@pollux.denx.de>
-Wolfgang Denk <wd@denx.de> <wd@pollux.(none)>
-Wolfgang Denk <wd@denx.de> <wd@fifi.denx.de>
-Wolfgang Denk <wd@denx.de> <wd@nyx.denx.de>
+Varalaxmi Bingi <varalaxmi.bingi@amd.com> <varalaxmi.bingi@xilinx.com>
+Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> <venkatesh.abbarapu@xilinx.com>
+Vikhyat Goyal <vikhyat.goyal@amd.com> <vikhyat.goyal@xilinx.com>
+Vishal Patel <vishal.patel@amd.com> <vishal.patel@xilinx.com>
Wolfgang Denk <wd@denx.de> <wd@atlas.denx.de>
Wolfgang Denk <wd@denx.de> <wd@castor.denx.de>
-Wolfgang Denk <wd@denx.de> <wd@xpert.denx.de>
+Wolfgang Denk <wd@denx.de> <wd@fifi.denx.de>
Wolfgang Denk <wd@denx.de> <wd@nyx.(none)>
-York Sun <yorksun@freescale.com>
+Wolfgang Denk <wd@denx.de> <wd@nyx.denx.de>
+Wolfgang Denk <wd@denx.de> <wd@pollux.(none)>
+Wolfgang Denk <wd@denx.de> <wd@pollux.denx.de>
+Wolfgang Denk <wd@denx.de> <wd@xpert.denx.de>
+Wolfgang Denk <wd@denx.de> <wdenk>
York Sun <york.sun@nxp.com>
+York Sun <yorksun@freescale.com>
Łukasz Majewski <l.majewski@samsung.com>
-Lukasz Majewski <lukma@denx.de>
-Mirza <Taimoor_Mirza@mentor.com>
diff --git a/arch/arm/dts/zynq-dlc20-rev1.0.dts b/arch/arm/dts/zynq-dlc20-rev1.0.dts
index cbf52c8..cfe0710 100644
--- a/arch/arm/dts/zynq-dlc20-rev1.0.dts
+++ b/arch/arm/dts/zynq-dlc20-rev1.0.dts
@@ -26,7 +26,7 @@
};
chosen {
- bootargs = "earlyprintk";
+ bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
diff --git a/arch/arm/dts/zynq-microzed.dts b/arch/arm/dts/zynq-microzed.dts
index 875ee08..5f280f4 100644
--- a/arch/arm/dts/zynq-microzed.dts
+++ b/arch/arm/dts/zynq-microzed.dts
@@ -8,7 +8,7 @@
#include "zynq-7000.dtsi"
/ {
- model = "Zynq MicroZED Board";
+ model = "Avnet MicroZed board";
compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000";
aliases {
@@ -19,11 +19,11 @@
memory@0 {
device_type = "memory";
- reg = <0 0x40000000>;
+ reg = <0x0 0x40000000>;
};
chosen {
- bootargs = "earlyprintk";
+ bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
@@ -42,11 +42,6 @@
status = "okay";
};
-&uart1 {
- bootph-all;
- status = "okay";
-};
-
&gem0 {
status = "okay";
phy-mode = "rgmii-id";
@@ -62,8 +57,41 @@
status = "okay";
};
+&uart1 {
+ bootph-all;
+ status = "okay";
+};
+
&usb0 {
status = "okay";
dr_mode = "host";
usb-phy = <&usb_phy0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb0_default>;
+};
+
+&pinctrl0 {
+ pinctrl_usb0_default: usb0-default {
+ mux {
+ groups = "usb0_0_grp";
+ function = "usb0";
+ };
+
+ conf {
+ groups = "usb0_0_grp";
+ slew-rate = <0>;
+ io-standard = <1>;
+ };
+
+ conf-rx {
+ pins = "MIO29", "MIO31", "MIO36";
+ bias-high-impedance;
+ };
+
+ conf-tx {
+ pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
+ "MIO35", "MIO37", "MIO38", "MIO39";
+ bias-disable;
+ };
+ };
};
diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts
index ed75049..f6ed047 100644
--- a/arch/arm/dts/zynqmp-sm-k26-revA.dts
+++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts
@@ -224,7 +224,7 @@
};
partition@22A0000 {
label = "User";
- reg = <0x22A0000 0x1db0000>; /* 29.5 MB */
+ reg = <0x22A0000 0x1d60000>; /* 29.375 MB */
};
};
};
diff --git a/arch/arm/mach-zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c
index 2891878..7a12f4b 100644
--- a/arch/arm/mach-zynqmp/mp.c
+++ b/arch/arm/mach-zynqmp/mp.c
@@ -32,7 +32,8 @@
#define ZYNQMP_CRLAPB_RST_LPD_R51_RST_MASK 0x02
#define ZYNQMP_CRLAPB_CPU_R5_CTRL_CLKACT_MASK 0x1000000
-#define ZYNQMP_TCM_START_ADDRESS 0xFFE00000
+#define ZYNQMP_R5_0_TCM_START_ADDR 0xFFE00000
+#define ZYNQMP_R5_1_TCM_START_ADDR 0xFFE90000
#define ZYNQMP_TCM_BOTH_SIZE 0x40000
#define ZYNQMP_CORE_APU0 0
@@ -215,9 +216,14 @@
writel(tmp, &rpu_base->rpu1_cfg);
}
-static void write_tcm_boot_trampoline(u32 boot_addr)
+static void write_tcm_boot_trampoline(u32 nr, u32 boot_addr)
{
if (boot_addr) {
+ u64 tcm_start_addr = ZYNQMP_R5_0_TCM_START_ADDR;
+
+ if (nr == ZYNQMP_CORE_RPU1)
+ tcm_start_addr = ZYNQMP_R5_1_TCM_START_ADDR;
+
/*
* Boot trampoline is simple ASM code below.
*
@@ -229,12 +235,12 @@
* bx r1
*/
debug("Write boot trampoline for %x\n", boot_addr);
- writel(0xea000000, ZYNQMP_TCM_START_ADDRESS);
- writel(boot_addr, ZYNQMP_TCM_START_ADDRESS + 0x4);
- writel(0xe59f0004, ZYNQMP_TCM_START_ADDRESS + 0x8);
- writel(0xe5901000, ZYNQMP_TCM_START_ADDRESS + 0xc);
- writel(0xe12fff11, ZYNQMP_TCM_START_ADDRESS + 0x10);
- writel(0x00000004, ZYNQMP_TCM_START_ADDRESS + 0x14); // address for
+ writel(0xea000000, tcm_start_addr);
+ writel(boot_addr, tcm_start_addr + 0x4);
+ writel(0xe59f0004, tcm_start_addr + 0x8);
+ writel(0xe5901000, tcm_start_addr + 0xc);
+ writel(0xe12fff11, tcm_start_addr + 0x10);
+ writel(0x00000004, tcm_start_addr + 0x14);
}
}
@@ -247,8 +253,10 @@
release_r5_reset(ZYNQMP_CORE_RPU0, LOCK);
} else {
set_r5_tcm_mode(SPLIT);
+ set_r5_halt_mode(ZYNQMP_CORE_RPU0, HALT, SPLIT);
set_r5_halt_mode(ZYNQMP_CORE_RPU1, HALT, SPLIT);
enable_clock_r5();
+ release_r5_reset(ZYNQMP_CORE_RPU0, SPLIT);
release_r5_reset(ZYNQMP_CORE_RPU1, SPLIT);
}
}
@@ -326,7 +334,7 @@
enable_clock_r5();
release_r5_reset(nr, LOCK);
dcache_disable();
- write_tcm_boot_trampoline(boot_addr_uniq);
+ write_tcm_boot_trampoline(nr, boot_addr_uniq);
dcache_enable();
set_r5_halt_mode(nr, RELEASE, LOCK);
mark_r5_used(nr, LOCK);
@@ -339,7 +347,7 @@
enable_clock_r5();
release_r5_reset(nr, SPLIT);
dcache_disable();
- write_tcm_boot_trampoline(boot_addr_uniq);
+ write_tcm_boot_trampoline(nr, boot_addr_uniq);
dcache_enable();
set_r5_halt_mode(nr, RELEASE, SPLIT);
mark_r5_used(nr, SPLIT);
diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig
index fb8f86c..97904bd 100644
--- a/configs/xilinx_versal_net_virt_defconfig
+++ b/configs/xilinx_versal_net_virt_defconfig
@@ -48,6 +48,7 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
+CONFIG_CMD_RNG=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_SMC=y
CONFIG_CMD_EXT4_WRITE=y
@@ -109,6 +110,7 @@
CONFIG_POWER_DOMAIN=y
CONFIG_ZYNQMP_POWER_DOMAIN=y
CONFIG_RESET_ZYNQMP=y
+CONFIG_DM_RNG=y
CONFIG_ARM_DCC=y
CONFIG_PL01X_SERIAL=y
CONFIG_XILINX_UARTLITE=y
@@ -134,3 +136,6 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_VIRTIO_NET=y
+CONFIG_VIRTIO_BLK=y
diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig
index 86cfbd6..a1feafc 100644
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -48,6 +48,7 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
+CONFIG_CMD_RNG=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_SMC=y
CONFIG_CMD_EXT4_WRITE=y
@@ -98,6 +99,7 @@
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_ADIN=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
@@ -112,6 +114,7 @@
CONFIG_POWER_DOMAIN=y
CONFIG_ZYNQMP_POWER_DOMAIN=y
CONFIG_RESET_ZYNQMP=y
+CONFIG_DM_RNG=y
CONFIG_ARM_DCC=y
CONFIG_PL01X_SERIAL=y
CONFIG_XILINX_UARTLITE=y
@@ -138,3 +141,6 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_VIRTIO_NET=y
+CONFIG_VIRTIO_BLK=y
diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
index e1b241f..c4bbde2 100644
--- a/configs/xilinx_zynqmp_virt_defconfig
+++ b/configs/xilinx_zynqmp_virt_defconfig
@@ -91,6 +91,7 @@
CONFIG_CMD_RTC=y
CONFIG_CMD_TIME=y
CONFIG_CMD_GETTIME=y
+CONFIG_CMD_RNG=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_SMC=y
@@ -171,6 +172,7 @@
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_ADIN=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
@@ -230,6 +232,9 @@
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_VIRTIO_NET=y
+CONFIG_VIRTIO_BLK=y
CONFIG_PANIC_HANG=y
CONFIG_TPM=y
CONFIG_SPL_GZIP=y
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index 00e3ffc..d1d4048 100644
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -676,7 +676,6 @@
const struct spi_mem_op *op)
{
int op_len, pos = 0, ret, i;
- u32 dummy_bytes = 0;
unsigned int flag = 0;
const u8 *tx_buf = NULL;
u8 *rx_buf = NULL;
@@ -689,11 +688,6 @@
}
op_len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes;
- if (op->dummy.nbytes) {
- op_len = op->cmd.nbytes + op->addr.nbytes +
- op->dummy.nbytes / op->dummy.buswidth;
- dummy_bytes = op->dummy.nbytes / op->dummy.buswidth;
- }
u8 op_buf[op_len];
@@ -707,8 +701,8 @@
pos += op->addr.nbytes;
}
- if (dummy_bytes)
- memset(op_buf + pos, 0xff, dummy_bytes);
+ if (op->dummy.nbytes)
+ memset(op_buf + pos, 0xff, op->dummy.nbytes);
/* 1st transfer: opcode + address + dummy cycles */
/* Make sure to set END bit if no tx or rx data messages follow */