Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi
- Move the PSCI runtime code for H3/A23/A33 into SRAM
- Pick the environment from the actual MMC boot device (SD card vs.
eMMC)
- Plus a small improvement from Icenowy, just for good measure.
diff --git a/Makefile b/Makefile
index 5c1fcb1..269e353 100644
--- a/Makefile
+++ b/Makefile
@@ -802,16 +802,19 @@
HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(srctree)/board/$(VENDOR)/common/Makefile),y,n)
-libs-y += lib/
+libs-$(CONFIG_API) += api/
libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
+libs-y += cmd/
+libs-y += common/
libs-$(CONFIG_OF_EMBED) += dts/
+libs-y += env/
+libs-y += lib/
libs-y += fs/
libs-y += net/
libs-y += disk/
libs-y += drivers/
libs-y += drivers/dma/
libs-y += drivers/gpio/
-libs-y += drivers/i2c/
libs-y += drivers/net/
libs-y += drivers/net/phy/
libs-y += drivers/power/ \
@@ -841,10 +844,6 @@
libs-y += drivers/usb/musb-new/
libs-y += drivers/usb/phy/
libs-y += drivers/usb/ulpi/
-libs-y += cmd/
-libs-y += common/
-libs-y += env/
-libs-$(CONFIG_API) += api/
ifdef CONFIG_POST
libs-y += post/
endif
@@ -1128,7 +1127,7 @@
$(call deprecated,CONFIG_WDT,DM watchdog,v2019.10,\
$(CONFIG_WATCHDOG)$(CONFIG_HW_WATCHDOG))
$(call deprecated,CONFIG_DM_ETH,Ethernet drivers,v2020.07,$(CONFIG_NET))
- $(call deprecated,CONFIG_DM_I2C,I2C drivers,v2022.04,$(CONFIG_I2C))
+ $(call deprecated,CONFIG_DM_I2C,I2C drivers,v2022.04,$(CONFIG_SYS_I2C_LEGACY))
@# Check that this build does not use CONFIG options that we do not
@# know about unless they are in Kconfig. All the existing CONFIG
@# options are whitelisted, so new ones should not be added.
@@ -1441,7 +1440,7 @@
$(BOARD_SIZE_CHECK)
endif
-u-boot-spl.kwb: u-boot.img spl/u-boot-spl.bin FORCE
+u-boot-spl.kwb: u-boot.bin spl/u-boot-spl.bin FORCE
$(call if_changed,mkimage)
u-boot.sha1: u-boot.bin
@@ -1736,7 +1735,7 @@
quiet_cmd_keep_syms_lto = KSL $@
cmd_keep_syms_lto = \
- NM=$(NM) $(srctree)/scripts/gen_ll_addressable_symbols.sh $^ >$@
+ $(srctree)/scripts/gen_ll_addressable_symbols.sh $(NM) $^ > $@
quiet_cmd_keep_syms_lto_cc = KSLCC $@
cmd_keep_syms_lto_cc = \
@@ -2100,7 +2099,7 @@
# Directories & files removed with 'make mrproper'
MRPROPER_DIRS += include/config include/generated spl tpl \
- .tmp_objdiff doc/output
+ .tmp_objdiff doc/output include/asm
# Remove include/asm symlink created by U-Boot before v2014.01
MRPROPER_FILES += .config .config.old include/autoconf.mk* include/config.h \
diff --git a/README b/README
index 1472b40..4fdc49f 100644
--- a/README
+++ b/README
@@ -128,7 +128,7 @@
Directory Hierarchy:
====================
-/arch Architecture specific files
+/arch Architecture-specific files
/arc Files generic to ARC architecture
/arm Files generic to ARM architecture
/m68k Files generic to m68k architecture
@@ -142,16 +142,16 @@
/sh Files generic to SH architecture
/x86 Files generic to x86 architecture
/xtensa Files generic to Xtensa architecture
-/api Machine/arch independent API for external apps
-/board Board dependent files
+/api Machine/arch-independent API for external apps
+/board Board-dependent files
/cmd U-Boot commands functions
-/common Misc architecture independent functions
+/common Misc architecture-independent functions
/configs Board default configuration files
/disk Code for disk drive partition handling
-/doc Documentation (don't expect too much)
-/drivers Commonly used device drivers
-/dts Contains Makefile for building internal U-Boot fdt.
-/env Environment files
+/doc Documentation (a mix of ReST and READMEs)
+/drivers Device drivers
+/dts Makefile for building internal U-Boot fdt.
+/env Environment support
/examples Example code for standalone applications, etc.
/fs Filesystem code (cramfs, ext2, jffs2, etc.)
/include Header Files
@@ -161,7 +161,7 @@
/post Power On Self Test
/scripts Various build scripts and Makefiles
/test Various unit test files
-/tools Tools to build S-Record or U-Boot images, etc.
+/tools Tools to build and sign FIT images, etc.
Software Configuration:
=======================
@@ -1461,9 +1461,12 @@
In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
with a list of GPIO LEDs that have inverted polarity.
-- I2C Support: CONFIG_SYS_I2C
+- I2C Support: CONFIG_SYS_I2C_LEGACY
- This enable the NEW i2c subsystem, and will allow you to use
+ Note: This is deprecated in favour of driver model. Use
+ CONFIG_DM_I2C instead.
+
+ This enable the legacy i2c subsystem, and will allow you to use
i2c commands at the u-boot command line (as long as you set
CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
for defining speed and slave address
diff --git a/arch/Kconfig b/arch/Kconfig
index 49813a4..b6f9e17 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -229,8 +229,8 @@
# Thing to enable for when SPL/TPL are enabled: SPL
imply SPL_DM
imply SPL_OF_LIBFDT
- imply SPL_DRIVERS_MISC_SUPPORT
- imply SPL_GPIO_SUPPORT
+ imply SPL_DRIVERS_MISC
+ imply SPL_GPIO
imply SPL_PINCTRL
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
@@ -243,8 +243,8 @@
imply SPL_SYSCON
# TPL
imply TPL_DM
- imply TPL_DRIVERS_MISC_SUPPORT
- imply TPL_GPIO_SUPPORT
+ imply TPL_DRIVERS_MISC
+ imply TPL_GPIO
imply TPL_PINCTRL
imply TPL_LIBCOMMON_SUPPORT
imply TPL_LIBGENERIC_SUPPORT
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9de97cc..2b7b625 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -954,7 +954,7 @@
select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
select SPL_SERIAL_SUPPORT
select SPL_SYSRESET
- select SPL_WATCHDOG_SUPPORT
+ select SPL_WATCHDOG
select SUPPORT_SPL
select SYS_NS16550
select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
@@ -1019,11 +1019,11 @@
imply FIT
imply OF_LIBFDT_OVERLAY
imply PRE_CONSOLE_BUFFER
- imply SPL_GPIO_SUPPORT
+ imply SPL_GPIO
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_MMC_SUPPORT if MMC
- imply SPL_POWER_SUPPORT
+ imply SPL_POWER
imply SPL_SERIAL_SUPPORT
imply USB_GADGET
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 15cecb5..3de18c7 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -719,6 +719,11 @@
return (get_sctlr() & CR_I) != 0;
}
+int mmu_status(void)
+{
+ return (get_sctlr() & CR_M) != 0;
+}
+
void invalidate_icache_all(void)
{
__asm_invalidate_icache_all();
@@ -740,6 +745,11 @@
return 0;
}
+int mmu_status(void)
+{
+ return 0;
+}
+
void invalidate_icache_all(void)
{
}
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index c3cd6c7..0562d28 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -329,7 +329,7 @@
#ifdef CONFIG_SYS_FSL_ERRATUM_A009203
static void erratum_a009203(void)
{
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
u8 __iomem *ptr;
#ifdef I2C1_BASE_ADDR
ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index b3f1148..1d5e344 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -88,8 +88,8 @@
preloader_console_init();
spl_set_bd();
-#ifdef CONFIG_SYS_I2C
-#ifdef CONFIG_SPL_I2C_SUPPORT
+#ifdef CONFIG_SYS_I2C_LEGACY
+#ifdef CONFIG_SPL_I2C
i2c_init_all();
#endif
#endif
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 3941a08..537c96b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -366,6 +366,7 @@
am335x-pocketbeagle.dtb \
am335x-pxm50.dtb \
am335x-rut.dtb \
+ am335x-sancloud-bbe.dtb \
am335x-shc.dtb \
am335x-pdu001.dtb \
am335x-chiliboard.dtb \
diff --git a/arch/arm/dts/am335x-bone-common.dtsi b/arch/arm/dts/am335x-bone-common.dtsi
index 8dcfac3..35ec1a8 100644
--- a/arch/arm/dts/am335x-bone-common.dtsi
+++ b/arch/arm/dts/am335x-bone-common.dtsi
@@ -1,9 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
- * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
@@ -13,44 +10,44 @@
};
};
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>; /* 256 MB */
+ };
+
chosen {
stdout-path = &uart0;
tick-timer = &timer2;
};
- memory {
- device_type = "memory";
- reg = <0x80000000 0x10000000>; /* 256 MB */
- };
-
leds {
pinctrl-names = "default";
pinctrl-0 = <&user_leds_s0>;
compatible = "gpio-leds";
- led@2 {
+ led2 {
label = "beaglebone:green:heartbeat";
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
- led@3 {
+ led3 {
label = "beaglebone:green:mmc0";
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
- led@4 {
+ led4 {
label = "beaglebone:green:usr2";
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "cpu0";
default-state = "off";
};
- led@5 {
+ led5 {
label = "beaglebone:green:usr3";
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
@@ -58,7 +55,7 @@
};
};
- vmmcsd_fixed: fixedregulator@0 {
+ vmmcsd_fixed: fixedregulator0 {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
@@ -72,112 +69,118 @@
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
- 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
- 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
- 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
- 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
- 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
- 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
+ AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_sda.i2c0_sda */
+ AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
- 0x178 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
- 0x17c (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
+ AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */
+ AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
- 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
- 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+ AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
- 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
+ AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
- 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
- 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
- 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
- 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
- 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
- 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
- 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
- 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
- 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
- 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
- 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
- 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
- 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE0)
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
- 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
- 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
- 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
- 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
- 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
- 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
- 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
- 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
- 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
- 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
- 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
- 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
- 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
- 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
- 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
+ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
- 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
- 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
- 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
+ AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* spio0_cs1.gpio0_6 */
+ AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
>;
};
emmc_pins: pinmux_emmc_pins {
pinctrl-single,pins = <
- 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
- 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
- 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
- 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
- 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
- 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
- 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
- 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
- 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
- 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
>;
};
};
@@ -189,36 +192,16 @@
status = "okay";
};
-&usb {
- status = "okay";
-};
-
-&usb_ctrl_mod {
- status = "okay";
-};
-
-&usb0_phy {
- status = "okay";
-};
-
-&usb1_phy {
- status = "okay";
-};
-
&usb0 {
- status = "okay";
dr_mode = "peripheral";
+ interrupts-extended = <&intc 18 &tps 0>;
+ interrupt-names = "mc", "vbus";
};
&usb1 {
- status = "okay";
dr_mode = "host";
};
-&cppi41dma {
- status = "okay";
-};
-
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
@@ -231,7 +214,7 @@
};
baseboard_eeprom: baseboard_eeprom@50 {
- compatible = "at,24c256";
+ compatible = "atmel,24c256";
reg = <0x50>;
#address-cells = <1>;
@@ -250,7 +233,7 @@
clock-frequency = <100000>;
cape_eeprom0: cape_eeprom0@54 {
- compatible = "at,24c256";
+ compatible = "atmel,24c256";
reg = <0x54>;
#address-cells = <1>;
#size-cells = <1>;
@@ -260,7 +243,7 @@
};
cape_eeprom1: cape_eeprom1@55 {
- compatible = "at,24c256";
+ compatible = "atmel,24c256";
reg = <0x55>;
#address-cells = <1>;
#size-cells = <1>;
@@ -270,7 +253,7 @@
};
cape_eeprom2: cape_eeprom2@56 {
- compatible = "at,24c256";
+ compatible = "atmel,24c256";
reg = <0x56>;
#address-cells = <1>;
#size-cells = <1>;
@@ -280,7 +263,7 @@
};
cape_eeprom3: cape_eeprom3@57 {
- compatible = "at,24c256";
+ compatible = "atmel,24c256";
reg = <0x57>;
#address-cells = <1>;
#size-cells = <1>;
@@ -311,8 +294,20 @@
* by the hardware problems. (Tip: double-check by performing a current
* measurement after shutdown: it should be less than 1 mA.)
*/
+
+ interrupts = <7>; /* NMI */
+ interrupt-parent = <&intc>;
+
ti,pmic-shutdown-controller;
+ charger {
+ status = "okay";
+ };
+
+ pwrbutton {
+ status = "okay";
+ };
+
regulators {
dcdc1_reg: regulator@0 {
regulator-name = "vdds_dpr";
@@ -323,7 +318,7 @@
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>;
- regulator-max-microvolt = <1325000>;
+ regulator-max-microvolt = <1351500>;
regulator-boot-on;
regulator-always-on;
};
diff --git a/arch/arm/dts/am335x-bone.dts b/arch/arm/dts/am335x-bone.dts
index 6b84937..b5d85ef 100644
--- a/arch/arm/dts/am335x-bone.dts
+++ b/arch/arm/dts/am335x-bone.dts
@@ -1,9 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
- * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
diff --git a/arch/arm/dts/am335x-boneblack-common.dtsi b/arch/arm/dts/am335x-boneblack-common.dtsi
new file mode 100644
index 0000000..64c3e92
--- /dev/null
+++ b/arch/arm/dts/am335x-boneblack-common.dtsi
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include <dt-bindings/display/tda998x.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
+
+&mmc2 {
+ vmmc-supply = <&vmmcsd_fixed>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_pins>;
+ bus-width = <8>;
+ status = "okay";
+ non-removable;
+};
+
+&am33xx_pinmux {
+ nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ >;
+ };
+
+ nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
+ >;
+ };
+
+ mcasp0_pins: mcasp0_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
+ >;
+ };
+};
+
+&lcdc {
+ status = "okay";
+
+ /* If you want to get 24 bit RGB and 16 BGR mode instead of
+ * current 16 bit RGB and 24 BGR modes, set the propety
+ * below to "crossed" and uncomment the video-ports -property
+ * in tda19988 node.
+ */
+ blue-and-red-wiring = "straight";
+
+ port {
+ lcdc_0: endpoint@0 {
+ remote-endpoint = <&hdmi_0>;
+ };
+ };
+};
+
+&i2c0 {
+ tda19988: tda19988@70 {
+ compatible = "nxp,tda998x";
+ reg = <0x70>;
+ nxp,calib-gpios = <&gpio1 25 0>;
+ interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>;
+
+ pinctrl-names = "default", "off";
+ pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
+ pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
+
+ /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
+ /* video-ports = <0x234501>; */
+
+ #sound-dai-cells = <0>;
+ audio-ports = < TDA998x_I2S 0x03>;
+
+ ports {
+ port@0 {
+ hdmi_0: endpoint@0 {
+ remote-endpoint = <&lcdc_0>;
+ };
+ };
+ };
+ };
+};
+
+&rtc {
+ system-power-controller;
+};
+
+&mcasp0 {
+ #sound-dai-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcasp0_pins>;
+ status = "okay";
+ op-mode = <0>; /* MCASP_IIS_MODE */
+ tdm-slots = <2>;
+ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
+ 0 0 1 0
+ >;
+ tx-num-evt = <32>;
+ rx-num-evt = <32>;
+};
+
+/ {
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x20000000>; /* 512 MB */
+ };
+
+ clk_mcasp0_fixed: clk_mcasp0_fixed {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24576000>;
+ };
+
+ clk_mcasp0: clk_mcasp0 {
+ #clock-cells = <0>;
+ compatible = "gpio-gate-clock";
+ clocks = <&clk_mcasp0_fixed>;
+ enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "TI BeagleBone Black";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&dailink0_master>;
+ simple-audio-card,frame-master = <&dailink0_master>;
+
+ dailink0_master: simple-audio-card,cpu {
+ sound-dai = <&mcasp0>;
+ clocks = <&clk_mcasp0>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&tda19988>;
+ };
+ };
+};
diff --git a/arch/arm/dts/am335x-boneblack.dts b/arch/arm/dts/am335x-boneblack.dts
index 27ebe4a..e2ee8b8 100644
--- a/arch/arm/dts/am335x-boneblack.dts
+++ b/arch/arm/dts/am335x-boneblack.dts
@@ -1,90 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
- * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
+#include "am335x-boneblack-common.dtsi"
/ {
model = "TI AM335x BeagleBone Black";
compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
- chosen {
- stdout-path = &uart0;
- tick-timer = &timer2;
+};
+
+&cpu0_opp_table {
+ /*
+ * All PG 2.0 silicon may not support 1GHz but some of the early
+ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+ * to support 1GHz OPP so enable it for PG 2.0 on this board.
+ */
+ oppnitro-1000000000 {
+ opp-supported-hw = <0x06 0x0100>;
};
};
-&ldo3_reg {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
+&gpio0 {
+ gpio-line-names =
+ "[mdio_data]",
+ "[mdio_clk]",
+ "P9_22 [spi0_sclk]",
+ "P9_21 [spi0_d0]",
+ "P9_18 [spi0_d1]",
+ "P9_17 [spi0_cs0]",
+ "[mmc0_cd]",
+ "P8_42A [ecappwm0]",
+ "P8_35 [lcd d12]",
+ "P8_33 [lcd d13]",
+ "P8_31 [lcd d14]",
+ "P8_32 [lcd d15]",
+ "P9_20 [i2c2_sda]",
+ "P9_19 [i2c2_scl]",
+ "P9_26 [uart1_rxd]",
+ "P9_24 [uart1_txd]",
+ "[rmii1_txd3]",
+ "[rmii1_txd2]",
+ "[usb0_drvvbus]",
+ "[hdmi cec]",
+ "P9_41B",
+ "[rmii1_txd1]",
+ "P8_19 [ehrpwm2a]",
+ "P8_13 [ehrpwm2b]",
+ "NC",
+ "NC",
+ "P8_14",
+ "P8_17",
+ "[rmii1_txd0]",
+ "[rmii1_refclk]",
+ "P9_11 [uart4_rxd]",
+ "P9_13 [uart4_txd]";
};
-&mmc1 {
- vmmc-supply = <&vmmcsd_fixed>;
+&gpio1 {
+ gpio-line-names =
+ "P8_25 [mmc1_dat0]",
+ "[mmc1_dat1]",
+ "P8_5 [mmc1_dat2]",
+ "P8_6 [mmc1_dat3]",
+ "P8_23 [mmc1_dat4]",
+ "P8_22 [mmc1_dat5]",
+ "P8_3 [mmc1_dat6]",
+ "P8_4 [mmc1_dat7]",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "P8_12",
+ "P8_11",
+ "P8_16",
+ "P8_15",
+ "P9_15A",
+ "P9_23",
+ "P9_14 [ehrpwm1a]",
+ "P9_16 [ehrpwm1b]",
+ "[emmc rst]",
+ "[usr0 led]",
+ "[usr1 led]",
+ "[usr2 led]",
+ "[usr3 led]",
+ "[hdmi irq]",
+ "[usb vbus oc]",
+ "[hdmi audio]",
+ "P9_12",
+ "P8_26",
+ "P8_21 [emmc]",
+ "P8_20 [emmc]";
};
-&mmc2 {
- vmmc-supply = <&vmmcsd_fixed>;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_pins>;
- bus-width = <8>;
- status = "okay";
+&gpio2 {
+ gpio-line-names =
+ "P9_15B",
+ "P8_18",
+ "P8_7",
+ "P8_8",
+ "P8_10",
+ "P8_9",
+ "P8_45 [hdmi]",
+ "P8_46 [hdmi]",
+ "P8_43 [hdmi]",
+ "P8_44 [hdmi]",
+ "P8_41 [hdmi]",
+ "P8_42 [hdmi]",
+ "P8_39 [hdmi]",
+ "P8_40 [hdmi]",
+ "P8_37 [hdmi]",
+ "P8_38 [hdmi]",
+ "P8_36 [hdmi]",
+ "P8_34 [hdmi]",
+ "[rmii1_rxd3]",
+ "[rmii1_rxd2]",
+ "[rmii1_rxd1]",
+ "[rmii1_rxd0]",
+ "P8_27 [hdmi]",
+ "P8_29 [hdmi]",
+ "P8_28 [hdmi]",
+ "P8_30 [hdmi]",
+ "[mmc0_dat3]",
+ "[mmc0_dat2]",
+ "[mmc0_dat1]",
+ "[mmc0_dat0]",
+ "[mmc0_clk]",
+ "[mmc0_cmd]";
};
-&am33xx_pinmux {
- nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
- pinctrl-single,pins = <
- 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
- 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
- 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
- 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
- 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
- 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
- >;
- };
- nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
- pinctrl-single,pins = <
- 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
- >;
- };
-};
-
-&lcdc {
- status = "okay";
-};
-
-/ {
- hdmi {
- compatible = "ti,tilcdc,slave";
- i2c = <&i2c0>;
- pinctrl-names = "default", "off";
- pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
- pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
- status = "okay";
- };
-};
-
-&rtc {
- system-power-controller;
+&gpio3 {
+ gpio-line-names =
+ "[mii col]",
+ "[mii crs]",
+ "[mii rx err]",
+ "[mii tx en]",
+ "[mii rx dv]",
+ "[i2c0 sda]",
+ "[i2c0 scl]",
+ "[jtag emu0]",
+ "[jtag emu1]",
+ "[mii tx clk]",
+ "[mii rx clk]",
+ "NC",
+ "NC",
+ "[usb vbus en]",
+ "P9_31 [spi1_sclk]",
+ "P9_29 [spi1_d0]",
+ "P9_30 [spi1_d1]",
+ "P9_28 [spi1_cs0]",
+ "P9_42B [ecappwm0]",
+ "P9_27",
+ "P9_41A",
+ "P9_25",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC";
};
diff --git a/arch/arm/dts/am335x-bonegreen-common.dtsi b/arch/arm/dts/am335x-bonegreen-common.dtsi
new file mode 100644
index 0000000..9f7fb63
--- /dev/null
+++ b/arch/arm/dts/am335x-bonegreen-common.dtsi
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
+
+&mmc2 {
+ vmmc-supply = <&vmmcsd_fixed>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_pins>;
+ bus-width = <8>;
+ status = "okay";
+};
+
+&am33xx_pinmux {
+ uart2_pins: uart2_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1) /* spi0_sclk.uart2_rxd */
+ AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1) /* spi0_d0.uart2_txd */
+ >;
+ };
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "okay";
+};
+
+&rtc {
+ system-power-controller;
+};
diff --git a/arch/arm/dts/am335x-bonegreen.dts b/arch/arm/dts/am335x-bonegreen.dts
index 9c59da9..18cc0f4 100644
--- a/arch/arm/dts/am335x-bonegreen.dts
+++ b/arch/arm/dts/am335x-bonegreen.dts
@@ -1,57 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
- * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
+#include "am335x-bonegreen-common.dtsi"
/ {
model = "TI AM335x BeagleBone Green";
compatible = "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
- chosen {
- stdout-path = &uart0;
- tick-timer = &timer2;
- };
-};
-
-&ldo3_reg {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
-};
-
-&mmc1 {
- vmmc-supply = <&vmmcsd_fixed>;
-};
-
-&mmc2 {
- vmmc-supply = <&vmmcsd_fixed>;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_pins>;
- bus-width = <8>;
- status = "okay";
-};
-
-&am33xx_pinmux {
- uart2_pins: uart2_pins {
- pinctrl-single,pins = <
- AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */
- AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */
- >;
- };
-};
-
-&uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart2_pins>;
- status = "okay";
-};
-
-&rtc {
- system-power-controller;
};
diff --git a/arch/arm/dts/am335x-sancloud-bbe.dts b/arch/arm/dts/am335x-sancloud-bbe.dts
new file mode 100644
index 0000000..275ba33
--- /dev/null
+++ b/arch/arm/dts/am335x-sancloud-bbe.dts
@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include "am335x-boneblack-common.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+ model = "SanCloud BeagleBone Enhanced";
+ compatible = "sancloud,am335x-boneenhanced", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+};
+
+&am33xx_pinmux {
+ pinctrl-names = "default";
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
+ >;
+ };
+
+ cpsw_sleep: cpsw_sleep {
+ pinctrl-single,pins = <
+ /* Slave 1 reset value */
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
+ >;
+ };
+
+ davinci_mdio_sleep: davinci_mdio_sleep {
+ pinctrl-single,pins = <
+ /* MDIO reset value */
+ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ >;
+ };
+
+ usb_hub_ctrl: usb_hub_ctrl {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* rmii1_refclk.gpio0_29 */
+ >;
+ };
+
+ mpu6050_pins: pinmux_mpu6050_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE7) /* uart0_ctsn.gpio1_8 */
+ >;
+ };
+
+ lps3331ap_pins: pinmux_lps3331ap_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7) /* gpmc_a10.gpio1_26 */
+ >;
+ };
+};
+
+&mac {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cpsw_default>;
+ pinctrl-1 = <&cpsw_sleep>;
+ status = "okay";
+};
+
+&davinci_mdio {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&davinci_mdio_default>;
+ pinctrl-1 = <&davinci_mdio_sleep>;
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&cpsw_emac0 {
+ phy-handle = <ðphy0>;
+ phy-mode = "rgmii-id";
+};
+
+&i2c0 {
+ lps331ap: barometer@5c {
+ compatible = "st,lps331ap-press";
+ st,drdy-int-pin = <1>;
+ reg = <0x5c>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <26 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ mpu6050: accelerometer@68 {
+ compatible = "invensense,mpu6050";
+ reg = <0x68>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <2 IRQ_TYPE_EDGE_RISING>;
+ orientation = <0xff 0 0 0 1 0 0 0 0xff>;
+ };
+
+ usb2512b: usb-hub@2c {
+ compatible = "microchip,usb2512b";
+ reg = <0x2c>;
+ reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+ /* wifi on port 4 */
+ };
+};
diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
index 35b49df..efbcfb3 100644
--- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
@@ -8,6 +8,10 @@
stdout-path = "serial2:115200n8";
tick-timer = &timer1;
};
+
+ aliases {
+ mmc1 = &sdhci1;
+ };
};
&cbass_main{
@@ -79,6 +83,7 @@
};
&sdhci0 {
+ status = "disabled";
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index df850a2..0c1305d 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -76,3 +76,7 @@
&tx_pru2_1 {
remoteproc-name = "tx_pru2_1";
};
+
+&mcu_r5fss0 {
+ ti,cluster-mode = <0>;
+};
diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
index 786cc48..8a3f189 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
@@ -188,3 +188,15 @@
&hbmc_mux {
u-boot,dm-spl;
};
+
+&serdes_ln_ctrl {
+ u-boot,mux-autoprobe;
+};
+
+&usb_serdes_mux {
+ u-boot,mux-autoprobe;
+};
+
+&serdes0 {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/k3-j7200-common-proc-board.dts b/arch/arm/dts/k3-j7200-common-proc-board.dts
index 5120711..f0440cd 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-common-proc-board.dts
@@ -9,6 +9,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/mux/ti-serdes.h>
+#include <dt-bindings/phy/phy.h>
/ {
chosen {
@@ -281,3 +282,25 @@
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
};
+
+&serdes_refclk {
+ clock-frequency = <100000000>;
+};
+
+&serdes0 {
+ serdes0_pcie_link: link@0 {
+ reg = <0>;
+ cdns,num-lanes = <2>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_PCIE>;
+ resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
+ };
+
+ serdes0_qsgmii_link: link@1 {
+ reg = <2>;
+ cdns,num-lanes = <1>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_QSGMII>;
+ resets = <&serdes_wiz0 3>;
+ };
+};
diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi
index 1131464..e1d43ac 100644
--- a/arch/arm/dts/k3-j7200-main.dtsi
+++ b/arch/arm/dts/k3-j7200-main.dtsi
@@ -5,6 +5,13 @@
* Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
*/
+/ {
+ serdes_refclk: serdes-refclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+};
+
&cbass_main {
msmc_ram: sram@70000000 {
compatible = "mmio-sram";
@@ -428,10 +435,14 @@
ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-ddr52 = <0x6>;
ti,otap-del-sel-hs200 = <0x8>;
- ti,otap-del-sel-hs400 = <0x0>;
+ ti,otap-del-sel-hs400 = <0x5>;
+ ti,itap-del-sel-legacy = <0x10>;
+ ti,itap-del-sel-mmc-hs = <0xa>;
ti,strobe-sel = <0x77>;
+ ti,clkbuf-sel = <0x7>;
ti,trm-icp = <0x8>;
bus-width = <8>;
+ mmc-hs400-1_8v;
mmc-hs200-1_8v;
mmc-ddr-1_8v;
dma-coherent;
@@ -451,7 +462,12 @@
ti,otap-del-sel-sdr50 = <0xc>;
ti,otap-del-sel-sdr104 = <0x5>;
ti,otap-del-sel-ddr50 = <0xc>;
+ ti,itap-del-sel-legacy = <0x0>;
+ ti,itap-del-sel-sd-hs = <0x0>;
+ ti,itap-del-sel-sdr12 = <0x0>;
+ ti,itap-del-sel-sdr25 = <0x0>;
ti,clkbuf-sel = <0x7>;
+ ti,trm-icp = <0x8>;
dma-coherent;
};
@@ -554,6 +570,62 @@
clock-names = "gpio";
};
+ serdes_wiz0: wiz@5060000 {
+ compatible = "ti,j721e-wiz-10g";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 292 11>, <&k3_clks 292 85>, <&serdes_refclk>;
+ clock-names = "fck", "core_ref_clk", "ext_ref_clk";
+ num-lanes = <4>;
+ #reset-cells = <1>;
+ ranges = <0x5060000 0x0 0x5060000 0x10000>;
+
+ assigned-clocks = <&k3_clks 292 85>;
+ assigned-clock-parents = <&k3_clks 292 89>;
+
+ wiz0_pll0_refclk: pll0-refclk {
+ clocks = <&k3_clks 292 85>, <&serdes_refclk>;
+ clock-output-names = "wiz0_pll0_refclk";
+ #clock-cells = <0>;
+ assigned-clocks = <&wiz0_pll0_refclk>;
+ assigned-clock-parents = <&k3_clks 292 85>;
+ };
+
+ wiz0_pll1_refclk: pll1-refclk {
+ clocks = <&k3_clks 292 85>, <&serdes_refclk>;
+ clock-output-names = "wiz0_pll1_refclk";
+ #clock-cells = <0>;
+ assigned-clocks = <&wiz0_pll1_refclk>;
+ assigned-clock-parents = <&k3_clks 292 85>;
+ };
+
+ wiz0_refclk_dig: refclk-dig {
+ clocks = <&k3_clks 292 85>, <&serdes_refclk>;
+ clock-output-names = "wiz0_refclk_dig";
+ #clock-cells = <0>;
+ assigned-clocks = <&wiz0_refclk_dig>;
+ assigned-clock-parents = <&k3_clks 292 85>;
+ };
+
+ wiz0_cmn_refclk_dig_div: cmn-refclk-dig-div {
+ clocks = <&wiz0_refclk_dig>;
+ #clock-cells = <0>;
+ };
+
+ serdes0: serdes@5060000 {
+ compatible = "ti,j721e-serdes-10g";
+ reg = <0x05060000 0x00010000>;
+ reg-names = "torrent_phy";
+ resets = <&serdes_wiz0 0>;
+ reset-names = "torrent_reset";
+ clocks = <&wiz0_pll0_refclk>;
+ clock-names = "refclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
usbss0: cdns-usb@4104000 {
compatible = "ti,j721e-usb";
reg = <0x00 0x4104000 0x00 0x100>;
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index 974dae8..85dbf8d 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -129,13 +129,17 @@
u-boot,dm-spl;
};
+&wiz3_pll1_refclk {
+ assigned-clocks = <&wiz3_pll1_refclk>, <&wiz3_pll0_refclk>;
+ assigned-clock-parents = <&k3_clks 295 0>, <&k3_clks 295 9>;
+};
+
&main_usbss0_pins_default {
u-boot,dm-spl;
};
&usbss0 {
u-boot,dm-spl;
- ti,usb2-only;
};
&usb0 {
@@ -215,3 +219,16 @@
&main_r5fss1 {
ti,cluster-mode = <0>;
};
+
+&wiz3_pll1_refclk {
+ assigned-clocks = <&wiz3_pll1_refclk>, <&wiz3_pll0_refclk>;
+ assigned-clock-parents = <&k3_clks 295 0>, <&k3_clks 295 9>;
+};
+
+&serdes_ln_ctrl {
+ u-boot,mux-autoprobe;
+};
+
+&usb_serdes_mux {
+ u-boot,mux-autoprobe;
+};
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi
index f346bb3..48c6ddf 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi
@@ -13,8 +13,6 @@
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a72_0;
- remoteproc2 = &main_r5fss0_core0;
- remoteproc3 = &main_r5fss0_core1;
};
fs_loader0: fs_loader@0 {
@@ -23,18 +21,6 @@
};
};
-&main_r5fss0 {
- u-boot,dm-spl;
-};
-
-&main_r5fss0_core0 {
- u-boot,dm-spl;
-};
-
-&main_r5fss0_core1 {
- u-boot,dm-spl;
-};
-
&tps659413a {
esm: esm {
compatible = "ti,tps659413-esm";
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index 0542b2f..a12607d 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -13,8 +13,6 @@
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a72_0;
- remoteproc2 = &main_r5fss0_core0;
- remoteproc3 = &main_r5fss0_core1;
};
chosen {
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index da7ca05..3675ce7 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -184,7 +184,7 @@
#define TZPC_BASE 0x02200000
#define TZPCDECPROT_0_SET_BASE (TZPC_BASE + 0x804)
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_EARLY_INIT
#endif
#define SRDS_MAX_LANES 8
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index df264a1..36b8403 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -338,6 +338,7 @@
/* Optimized copy functions to read from/write to IO sapce */
#ifdef CONFIG_ARM64
+#include <cpu_func.h>
/*
* Copy data from IO memory space to "real" memory space.
*/
@@ -351,11 +352,13 @@
count--;
}
- while (count >= 8) {
- *(u64 *)to = __raw_readq(from);
- from += 8;
- to += 8;
- count -= 8;
+ if (mmu_status()) {
+ while (count >= 8) {
+ *(u64 *)to = __raw_readq(from);
+ from += 8;
+ to += 8;
+ count -= 8;
+ }
}
while (count) {
@@ -379,11 +382,13 @@
count--;
}
- while (count >= 8) {
- __raw_writeq(*(u64 *)from, to);
- from += 8;
- to += 8;
- count -= 8;
+ if (mmu_status()) {
+ while (count >= 8) {
+ __raw_writeq(*(u64 *)from, to);
+ from += 8;
+ to += 8;
+ count -= 8;
+ }
}
while (count) {
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 14347e7..0b4276c 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -78,7 +78,7 @@
if ARCH_EXYNOS5
-config SPL_GPIO_SUPPORT
+config SPL_GPIO
default y
config SPL_LIBCOMMON_SUPPORT
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index a03eca8..789a50d 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -301,7 +301,7 @@
select PINCTRL
select SPL
select SPL_DM if SPL
- select SPL_GPIO_SUPPORT if SPL
+ select SPL_GPIO if SPL
select SPL_LIBCOMMON_SUPPORT if SPL
select SPL_LIBDISK_SUPPORT if SPL
select SPL_LIBGENERIC_SUPPORT if SPL
@@ -312,9 +312,9 @@
select SPL_SEPARATE_BSS if SPL
select SPL_SERIAL_SUPPORT if SPL
select SPL_USB_GADGET if SPL
- select SPL_USB_HOST_SUPPORT if SPL
+ select SPL_USB_HOST if SPL
select SPL_USB_SDP_SUPPORT if SPL
- select SPL_WATCHDOG_SUPPORT if SPL
+ select SPL_WATCHDOG if SPL
select SUPPORT_SPL
imply CMD_DM
diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
index 0e46d70..533905d 100644
--- a/arch/arm/mach-k3/am642_init.c
+++ b/arch/arm/mach-k3/am642_init.c
@@ -198,7 +198,7 @@
#endif
}
-u32 spl_boot_mode(const u32 boot_device)
+u32 spl_mmc_boot_mode(const u32 boot_device)
{
switch (boot_device) {
case BOOT_DEVICE_MMC1:
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index ab6d9bd..bb0f641 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -193,10 +193,6 @@
}
#endif
-__weak void start_non_linux_remote_cores(void)
-{
-}
-
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
typedef void __noreturn (*image_entry_noargs_t)(void);
@@ -214,7 +210,6 @@
init_env();
if (!fit_image_info[IMAGE_ID_DM_FW].image_start) {
- start_non_linux_remote_cores();
size = load_firmware("name_mcur5f0_0fw", "addr_mcur5f0_0load",
&loadaddr);
}
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index f421ed1..e81b70d 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -22,7 +22,6 @@
int early_console_init(void);
void disable_linefill_optimization(void);
void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size);
-void start_non_linux_remote_cores(void);
int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr);
void k3_sysfw_print_ver(void);
void spl_enable_dcache(void);
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index e9e076c..78d80be 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -370,39 +370,3 @@
}
}
#endif
-
-#ifdef CONFIG_SYS_K3_SPL_ATF
-void start_non_linux_remote_cores(void)
-{
- int size = 0, ret;
- u32 loadaddr = 0;
-
- if (!soc_is_j721e())
- return;
-
- size = load_firmware("name_mainr5f0_0fw", "addr_mainr5f0_0load",
- &loadaddr);
- if (size <= 0)
- goto err_load;
-
- /* assuming remoteproc 2 is aliased for the needed remotecore */
- ret = rproc_load(2, loadaddr, size);
- if (ret) {
- printf("Firmware failed to start on rproc (%d)\n", ret);
- goto err_load;
- }
-
- ret = rproc_start(2);
- if (ret) {
- printf("Firmware init failed on rproc (%d)\n", ret);
- goto err_load;
- }
-
- printf("Remoteproc 2 started successfully\n");
-
- return;
-
-err_load:
- rproc_reset(2);
-}
-#endif
diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h
index f5538f4..a4b5630 100644
--- a/arch/arm/mach-kirkwood/include/mach/config.h
+++ b/arch/arm/mach-kirkwood/include/mach/config.h
@@ -96,7 +96,7 @@
*/
#if defined(CONFIG_CMD_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
#ifndef CONFIG_SYS_I2C_SOFT
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#endif
#define CONFIG_SYS_I2C_SLAVE 0x0
diff --git a/arch/arm/mach-mediatek/mt8183/init.c b/arch/arm/mach-mediatek/mt8183/init.c
index 877f387..7496029 100644
--- a/arch/arm/mach-mediatek/mt8183/init.c
+++ b/arch/arm/mach-mediatek/mt8183/init.c
@@ -48,7 +48,7 @@
return 0;
}
-void reset_cpu(ulong addr)
+void reset_cpu(void)
{
psci_system_reset();
}
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index cda65f7..89737a3 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -253,28 +253,32 @@
config MVEBU_SPL_BOOT_DEVICE_SPI
bool "SPI NOR flash"
imply ENV_IS_IN_SPI_FLASH
- select SPL_DM_SPI
- select SPL_SPI_FLASH_SUPPORT
- select SPL_SPI_LOAD
- select SPL_SPI_SUPPORT
+ imply SPL_DM_SPI
+ imply SPL_SPI_FLASH_SUPPORT
+ imply SPL_SPI_LOAD
+ imply SPL_SPI_SUPPORT
+ select SPL_BOOTROM_SUPPORT
config MVEBU_SPL_BOOT_DEVICE_MMC
bool "SDIO/MMC card"
imply ENV_IS_IN_MMC
# GPIO needed for eMMC/SD card presence detection
- select SPL_DM_GPIO
- select SPL_DM_MMC
- select SPL_GPIO_SUPPORT
- select SPL_LIBDISK_SUPPORT
- select SPL_MMC_SUPPORT
+ imply SPL_DM_GPIO
+ imply SPL_DM_MMC
+ imply SPL_GPIO
+ imply SPL_LIBDISK_SUPPORT
+ imply SPL_MMC_SUPPORT
+ select SPL_BOOTROM_SUPPORT
config MVEBU_SPL_BOOT_DEVICE_SATA
bool "SATA"
- select SPL_SATA_SUPPORT
- select SPL_LIBDISK_SUPPORT
+ imply SPL_SATA_SUPPORT
+ imply SPL_LIBDISK_SUPPORT
+ select SPL_BOOTROM_SUPPORT
config MVEBU_SPL_BOOT_DEVICE_UART
bool "UART"
+ select SPL_BOOTROM_SUPPORT
endchoice
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
index 52473ad..7985885 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -142,7 +142,7 @@
int mvebu_soc_family(void);
u32 mvebu_get_nand_clock(void);
-void return_to_bootrom(void);
+void __noreturn return_to_bootrom(void);
#ifndef CONFIG_DM_MMC
int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks);
diff --git a/arch/arm/mach-mvebu/lowlevel_spl.S b/arch/arm/mach-mvebu/lowlevel_spl.S
index 8718d7a..dde77b7 100644
--- a/arch/arm/mach-mvebu/lowlevel_spl.S
+++ b/arch/arm/mach-mvebu/lowlevel_spl.S
@@ -13,8 +13,9 @@
ENTRY(return_to_bootrom)
ldr r12, =CONFIG_SPL_BOOTROM_SAVE
ldr sp, [r12]
+ ldmfd sp!, {r0 - r12, lr} /* @ restore registers from stack */
mov r0, #0x0 /* @ return value: 0x0 NO_ERR */
- ldmfd sp!, {r0 - r12, pc} /* @ restore regs and return */
+ bx lr /* @ return to bootrom */
ENDPROC(return_to_bootrom)
/*
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 16ebb7a..3b6bc38 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -8,6 +8,7 @@
#include <debug_uart.h>
#include <fdtdec.h>
#include <hang.h>
+#include <image.h>
#include <init.h>
#include <log.h>
#include <spl.h>
@@ -16,6 +17,160 @@
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
+#if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) || defined(CONFIG_SPL_MMC_SUPPORT) || defined(CONFIG_SPL_SATA_SUPPORT)
+
+/*
+ * When loading U-Boot via SPL from SPI NOR, CONFIG_SYS_SPI_U_BOOT_OFFS must
+ * point to the offset of kwbimage main header which is always at offset zero
+ * (defined by BootROM). Therefore other values of CONFIG_SYS_SPI_U_BOOT_OFFS
+ * makes U-Boot non-bootable.
+ */
+#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
+#if defined(CONFIG_SYS_SPI_U_BOOT_OFFS) && CONFIG_SYS_SPI_U_BOOT_OFFS != 0
+#error CONFIG_SYS_SPI_U_BOOT_OFFS must be set to 0
+#endif
+#endif
+
+/*
+ * When loading U-Boot via SPL from eMMC (in Marvell terminology SDIO), the
+ * kwbimage main header is stored at sector 0. U-Boot SPL needs to parse this
+ * header and figure out at which sector the U-Boot proper binary is stored.
+ * Partition booting is therefore not supported and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
+ * and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET need to point to the
+ * kwbimage main header.
+ */
+#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
+#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is unsupported
+#endif
+#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0
+#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0
+#endif
+#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0
+#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0
+#endif
+#endif
+
+/*
+ * When loading U-Boot via SPL from SATA disk, the kwbimage main header is
+ * stored at sector 1. Therefore CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be
+ * set to 1. Otherwise U-Boot SPL would not be able to load U-Boot proper.
+ */
+#ifdef CONFIG_SPL_SATA_SUPPORT
+#if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || !defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1
+#error CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be set to 1
+#endif
+#endif
+
+/* Boot Type - block ID */
+#define IBR_HDR_I2C_ID 0x4D
+#define IBR_HDR_SPI_ID 0x5A
+#define IBR_HDR_NAND_ID 0x8B
+#define IBR_HDR_SATA_ID 0x78
+#define IBR_HDR_PEX_ID 0x9C
+#define IBR_HDR_UART_ID 0x69
+#define IBR_HDR_SDIO_ID 0xAE
+
+/* Structure of the main header, version 1 (Armada 370/38x/XP) */
+struct kwbimage_main_hdr_v1 {
+ uint8_t blockid; /* 0x0 */
+ uint8_t flags; /* 0x1 */
+ uint16_t reserved2; /* 0x2-0x3 */
+ uint32_t blocksize; /* 0x4-0x7 */
+ uint8_t version; /* 0x8 */
+ uint8_t headersz_msb; /* 0x9 */
+ uint16_t headersz_lsb; /* 0xA-0xB */
+ uint32_t srcaddr; /* 0xC-0xF */
+ uint32_t destaddr; /* 0x10-0x13 */
+ uint32_t execaddr; /* 0x14-0x17 */
+ uint8_t options; /* 0x18 */
+ uint8_t nandblocksize; /* 0x19 */
+ uint8_t nandbadblklocation; /* 0x1A */
+ uint8_t reserved4; /* 0x1B */
+ uint16_t reserved5; /* 0x1C-0x1D */
+ uint8_t ext; /* 0x1E */
+ uint8_t checksum; /* 0x1F */
+} __packed;
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+u32 spl_mmc_boot_mode(const u32 boot_device)
+{
+ return MMCSD_MODE_RAW;
+}
+#endif
+
+int spl_parse_board_header(struct spl_image_info *spl_image,
+ const void *image_header, size_t size)
+{
+ const struct kwbimage_main_hdr_v1 *mhdr = image_header;
+
+ if (size < sizeof(*mhdr)) {
+ /* This should be compile time assert */
+ printf("FATAL ERROR: Image header size is too small\n");
+ hang();
+ }
+
+ /*
+ * Very basic check for image validity. We cannot check mhdr->checksum
+ * as it is calculated also from variable length extended headers
+ * (including SPL content) which is not included in U-Boot image_header.
+ */
+ if (mhdr->version != 1 ||
+ ((mhdr->headersz_msb << 16) | mhdr->headersz_lsb) < sizeof(*mhdr) ||
+ (
+#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
+ mhdr->blockid != IBR_HDR_SPI_ID &&
+#endif
+#ifdef CONFIG_SPL_SATA_SUPPORT
+ mhdr->blockid != IBR_HDR_SATA_ID &&
+#endif
+#ifdef CONFIG_SPL_MMC_SUPPORT
+ mhdr->blockid != IBR_HDR_SDIO_ID &&
+#endif
+ 1
+ )) {
+ printf("ERROR: Not valid SPI/NAND/SATA/SDIO kwbimage v1\n");
+ return -EINVAL;
+ }
+
+ spl_image->offset = mhdr->srcaddr;
+
+#ifdef CONFIG_SPL_SATA_SUPPORT
+ /*
+ * For SATA srcaddr is specified in number of sectors.
+ * The main header is must be stored at sector number 1.
+ * This expects that sector size is 512 bytes and recalculates
+ * data offset to bytes relative to the main header.
+ */
+ if (mhdr->blockid == IBR_HDR_SATA_ID) {
+ if (spl_image->offset < 1) {
+ printf("ERROR: Wrong SATA srcaddr in kwbimage\n");
+ return -EINVAL;
+ }
+ spl_image->offset -= 1;
+ spl_image->offset *= 512;
+ }
+#endif
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+ /*
+ * For SDIO (eMMC) srcaddr is specified in number of sectors.
+ * This expects that sector size is 512 bytes and recalculates
+ * data offset to bytes.
+ */
+ if (mhdr->blockid == IBR_HDR_SDIO_ID)
+ spl_image->offset *= 512;
+#endif
+
+ spl_image->size = mhdr->blocksize;
+ spl_image->entry_point = mhdr->execaddr;
+ spl_image->load_addr = mhdr->destaddr;
+ spl_image->os = IH_OS_U_BOOT;
+ spl_image->name = "U-Boot";
+
+ return 0;
+}
+
static u32 get_boot_device(void)
{
u32 val;
@@ -49,11 +204,11 @@
boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
switch (boot_device) {
-#if defined(CONFIG_ARMADA_38X)
+#ifdef BOOT_FROM_NAND
case BOOT_FROM_NAND:
return BOOT_DEVICE_NAND;
#endif
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef BOOT_FROM_MMC
case BOOT_FROM_MMC:
case BOOT_FROM_MMC_ALT:
return BOOT_DEVICE_MMC1;
@@ -69,14 +224,77 @@
return BOOT_DEVICE_SATA;
#endif
case BOOT_FROM_SPI:
- default:
return BOOT_DEVICE_SPI;
+ default:
+ return BOOT_DEVICE_BOOTROM;
};
}
+#else
+
+static u32 get_boot_device(void)
+{
+ return BOOT_DEVICE_BOOTROM;
+}
+
+#endif
+
u32 spl_boot_device(void)
{
- return get_boot_device();
+ u32 boot_device = get_boot_device();
+
+ switch (boot_device) {
+ /*
+ * Return to the BootROM to continue the Marvell xmodem
+ * UART boot protocol. As initiated by the kwboot tool.
+ *
+ * This can only be done by the BootROM since the beginning
+ * of the image is already read and interpreted by the BootROM.
+ * SPL has no chance to receive this information. So we
+ * need to return to the BootROM to enable this xmodem
+ * UART download. Use SPL infrastructure to return to BootROM.
+ */
+ case BOOT_DEVICE_UART:
+ return BOOT_DEVICE_BOOTROM;
+
+ /*
+ * If SPL is compiled with chosen boot_device support
+ * then use SPL driver for loading U-Boot proper.
+ */
+#ifdef CONFIG_SPL_MMC_SUPPORT
+ case BOOT_DEVICE_MMC1:
+ return BOOT_DEVICE_MMC1;
+#endif
+#ifdef CONFIG_SPL_SATA_SUPPORT
+ case BOOT_FROM_SATA:
+ return BOOT_FROM_SATA;
+#endif
+#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
+ case BOOT_DEVICE_SPI:
+ return BOOT_DEVICE_SPI;
+#endif
+
+ /*
+ * If SPL is not compiled with chosen boot_device support
+ * then return to the BootROM. BootROM supports loading
+ * U-Boot proper from any valid boot_device present in SAR
+ * register.
+ */
+ default:
+ return BOOT_DEVICE_BOOTROM;
+ }
+}
+
+int board_return_to_bootrom(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
+{
+ u32 *regs = *(u32 **)CONFIG_SPL_BOOTROM_SAVE;
+
+ printf("Returning to BootROM (return address 0x%08x)...\n", regs[13]);
+ return_to_bootrom();
+
+ /* NOTREACHED - return_to_bootrom() does not return */
+ hang();
}
void board_init_f(ulong dummy)
@@ -135,26 +353,4 @@
/* Update read timing control for PCIe */
mv_rtc_config();
-
- /*
- * Return to the BootROM to continue the Marvell xmodem
- * UART boot protocol. As initiated by the kwboot tool.
- *
- * This can only be done by the BootROM and not by the
- * U-Boot SPL infrastructure, since the beginning of the
- * image is already read and interpreted by the BootROM.
- * SPL has no chance to receive this information. So we
- * need to return to the BootROM to enable this xmodem
- * UART download.
- *
- * If booting from NAND lets let the BootROM load the
- * rest of the bootloader.
- */
- switch (get_boot_device()) {
- case BOOT_DEVICE_UART:
-#if defined(CONFIG_ARMADA_38X)
- case BOOT_DEVICE_NAND:
-#endif
- return_to_bootrom();
- }
}
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 48bc80a..0863965 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -15,15 +15,15 @@
imply NAND_OMAP_GPMC
imply SPL_FS_EXT4
imply SPL_FS_FAT
- imply SPL_GPIO_SUPPORT
- imply SPL_I2C_SUPPORT
+ imply SPL_GPIO
+ imply SPL_I2C
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_MMC_SUPPORT
imply SPL_NAND_SUPPORT
imply SPL_OMAP3_ID_NAND
- imply SPL_POWER_SUPPORT
+ imply SPL_POWER
imply SPL_SERIAL_SUPPORT
imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
@@ -37,15 +37,15 @@
imply SPL_DISPLAY_PRINT
imply SPL_FS_EXT4
imply SPL_FS_FAT
- imply SPL_GPIO_SUPPORT
- imply SPL_I2C_SUPPORT
+ imply SPL_GPIO
+ imply SPL_I2C
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_MMC_SUPPORT
imply SPL_NAND_SIMPLE
imply SPL_NAND_SUPPORT
- imply SPL_POWER_SUPPORT
+ imply SPL_POWER
imply SPL_SERIAL_SUPPORT
imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
@@ -61,8 +61,8 @@
imply SPL_ENV_SUPPORT
imply SPL_FS_EXT4
imply SPL_FS_FAT
- imply SPL_GPIO_SUPPORT
- imply SPL_I2C_SUPPORT
+ imply SPL_GPIO
+ imply SPL_I2C
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
@@ -70,7 +70,7 @@
imply SPL_NAND_AM33XX_BCH
imply SPL_NAND_AM33XX_BCH
imply SPL_NAND_SUPPORT
- imply SPL_POWER_SUPPORT
+ imply SPL_POWER
imply SPL_SERIAL_SUPPORT
imply SYS_I2C_OMAP24XX
diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig
index 88cb957..4268419 100644
--- a/arch/arm/mach-omap2/am33xx/Kconfig
+++ b/arch/arm/mach-omap2/am33xx/Kconfig
@@ -41,19 +41,19 @@
imply SPL_ENV_SUPPORT
imply SPL_FS_EXT4
imply SPL_FS_FAT
- imply SPL_GPIO_SUPPORT
- imply SPL_I2C_SUPPORT
+ imply SPL_GPIO
+ imply SPL_I2C
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_MMC_SUPPORT
imply SPL_NAND_SUPPORT
imply SPL_OF_LIBFDT
- imply SPL_POWER_SUPPORT
+ imply SPL_POWER
imply SPL_SEPARATE_BSS
imply SPL_SERIAL_SUPPORT
imply SPL_SYS_MALLOC_SIMPLE
- imply SPL_WATCHDOG_SUPPORT
+ imply SPL_WATCHDOG
imply SPL_YMODEM_SUPPORT
help
This option specifies support for the AM335x
@@ -225,16 +225,16 @@
imply SPL_ENV_SUPPORT
imply SPL_FS_EXT4
imply SPL_FS_FAT
- imply SPL_GPIO_SUPPORT
- imply SPL_I2C_SUPPORT
+ imply SPL_GPIO
+ imply SPL_I2C
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBDISK_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_MMC_SUPPORT
imply SPL_NAND_SUPPORT
- imply SPL_POWER_SUPPORT
+ imply SPL_POWER
imply SPL_SERIAL_SUPPORT
- imply SPL_WATCHDOG_SUPPORT
+ imply SPL_WATCHDOG
imply SPL_YMODEM_SUPPORT
help
This option specifies support for the AM43xx
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index 4bf0535..d390f2e 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -209,7 +209,7 @@
#if (defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)) && \
(defined(CONFIG_AM335X_USB0) || defined(CONFIG_AM335X_USB1)) && \
(!CONFIG_IS_ENABLED(DM_USB) || !CONFIG_IS_ENABLED(OF_CONTROL)) && \
- (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_MUSB_NEW_SUPPORT))
+ (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_MUSB_NEW))
static struct musb_hdrc_config musb_config = {
.multipoint = 1,
diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c
index 1268a32..7cdf7f1 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -104,7 +104,7 @@
sys_boot_device = 1;
break;
#endif
-#if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH_SUPPORT)
+#if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH)
case BOOT_DEVICE_CPGMAC:
sys_boot_device = 1;
break;
@@ -202,10 +202,10 @@
#if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
gpmc_init();
#endif
-#if defined(CONFIG_SPL_I2C_SUPPORT) && !CONFIG_IS_ENABLED(DM_I2C)
+#if defined(CONFIG_SPL_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
-#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
+#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW)
arch_misc_init();
#endif
#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 35bdef2..b164afb 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -56,7 +56,7 @@
select SPL_REGMAP
select SPL_SYSCON
select SPL_RAM
- select SPL_DRIVERS_MISC_SUPPORT
+ select SPL_DRIVERS_MISC
select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
select SPL_ROCKCHIP_BACK_TO_BROM
select BOARD_LATE_INIT
@@ -82,7 +82,7 @@
select TPL_OF_LIBFDT
select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
select TPL_NEEDS_SEPARATE_STACK if TPL
- select SPL_DRIVERS_MISC_SUPPORT
+ select SPL_DRIVERS_MISC
imply ROCKCHIP_COMMON_BOARD
imply SPL_SERIAL_SUPPORT
imply SPL_ROCKCHIP_COMMON_BOARD
@@ -108,7 +108,7 @@
imply SPL_ROCKCHIP_COMMON_BOARD
imply TPL_CLK
imply TPL_DM
- imply TPL_DRIVERS_MISC_SUPPORT
+ imply TPL_DRIVERS_MISC
imply TPL_LIBCOMMON_SUPPORT
imply TPL_LIBGENERIC_SUPPORT
imply TPL_NEEDS_SEPARATE_TEXT_BASE
@@ -219,7 +219,7 @@
select TPL_NEEDS_SEPARATE_STACK if TPL
select SPL_SEPARATE_BSS
select SPL_SERIAL_SUPPORT
- select SPL_DRIVERS_MISC_SUPPORT
+ select SPL_DRIVERS_MISC
select CLK
select FIT
select PINCTRL
@@ -238,7 +238,7 @@
imply TPL_LIBCOMMON_SUPPORT
imply TPL_LIBGENERIC_SUPPORT
imply TPL_SYS_MALLOC_SIMPLE
- imply TPL_DRIVERS_MISC_SUPPORT
+ imply TPL_DRIVERS_MISC
imply TPL_OF_CONTROL
imply TPL_DM
imply TPL_REGMAP
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 20a00c5..a5db59a 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -154,7 +154,7 @@
config SYS_MALLOC_F_LEN
default 0x2000
-config SPL_DRIVERS_MISC_SUPPORT
+config SPL_DRIVERS_MISC
default y
config SPL_LIBCOMMON_SUPPORT
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 869d215..311d7b1 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -218,7 +218,7 @@
"u-boot,spl-boot-device", boot_ofpath);
}
-#if defined(SPL_GPIO_SUPPORT)
+#if defined(SPL_GPIO)
static void rk3399_force_power_on_reset(void)
{
ofnode node;
@@ -250,7 +250,7 @@
{
led_setup();
-#if defined(SPL_GPIO_SUPPORT)
+#if defined(SPL_GPIO)
struct rockchip_cru *cru = rockchip_get_cru();
/*
diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index b42b056..2f1e7d3 100644
--- a/arch/arm/mach-stm32/Kconfig
+++ b/arch/arm/mach-stm32/Kconfig
@@ -31,8 +31,8 @@
select SPL_DM
select SPL_DM_RESET
select SPL_DM_SEQ_ALIAS
- select SPL_DRIVERS_MISC_SUPPORT
- select SPL_GPIO_SUPPORT
+ select SPL_DRIVERS_MISC
+ select SPL_GPIO
select SPL_LIBCOMMON_SUPPORT
select SPL_LIBGENERIC_SUPPORT
select SPL_MTD_SUPPORT
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index 0e59931..ace07fd 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -5,9 +5,9 @@
select SPL_CLK
select SPL_DM
select SPL_DM_SEQ_ALIAS
- select SPL_DRIVERS_MISC_SUPPORT
+ select SPL_DRIVERS_MISC
select SPL_FRAMEWORK
- select SPL_GPIO_SUPPORT
+ select SPL_GPIO
select SPL_LIBCOMMON_SUPPORT
select SPL_LIBGENERIC_SUPPORT
select SPL_OF_CONTROL
@@ -17,7 +17,7 @@
select SPL_DM_RESET
select SPL_SERIAL_SUPPORT
select SPL_SYSCON
- select SPL_WATCHDOG_SUPPORT if WATCHDOG
+ select SPL_WATCHDOG if WATCHDOG
imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
imply SPL_BOOTSTAGE if BOOTSTAGE
imply SPL_DISPLAY_PRINT
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index e979e42..d9b04f7 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -339,7 +339,7 @@
spl_init();
preloader_console_init();
-#ifdef CONFIG_SPL_I2C_SUPPORT
+#ifdef CONFIG_SPL_I2C
/* Needed early by sunxi_board_init if PMU is enabled */
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index a397748..478c7a9 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -1,6 +1,6 @@
if ARCH_TEGRA
-config SPL_GPIO_SUPPORT
+config SPL_GPIO
default y
config SPL_LIBCOMMON_SUPPORT
diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 1d57048..083febe 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -122,7 +122,7 @@
config MPC83XX_SATA_SUPPORT
bool
-config MPC83XX_SECOND_I2C_SUPPORT
+config MPC83XX_SECOND_I2C
bool
config MPC83XX_LDP_PIN
@@ -138,14 +138,14 @@
select MPC83XX_TSEC1_SUPPORT
select MPC83XX_TSEC2_SUPPORT
select MPC83XX_PCIE1_SUPPORT
- select MPC83XX_SECOND_I2C_SUPPORT
+ select MPC83XX_SECOND_I2C
config ARCH_MPC8309
bool
select ARCH_MPC830X
select MPC83XX_QUICC_ENGINE
select MPC83XX_PCI_SUPPORT
- select MPC83XX_SECOND_I2C_SUPPORT
+ select MPC83XX_SECOND_I2C
select SYS_FSL_ERRATUM_ESDHC111
select FSL_ELBC
@@ -158,7 +158,7 @@
config ARCH_MPC8313
bool
select ARCH_MPC831X
- select MPC83XX_SECOND_I2C_SUPPORT
+ select MPC83XX_SECOND_I2C
select FSL_ELBC
config ARCH_MPC832X
@@ -176,14 +176,14 @@
select MPC83XX_TSEC1_SUPPORT
select MPC83XX_TSEC2_SUPPORT
select MPC83XX_LDP_PIN
- select MPC83XX_SECOND_I2C_SUPPORT
+ select MPC83XX_SECOND_I2C
config ARCH_MPC8360
bool
select MPC83XX_QUICC_ENGINE
select MPC83XX_PCI_SUPPORT
select MPC83XX_LDP_PIN
- select MPC83XX_SECOND_I2C_SUPPORT
+ select MPC83XX_SECOND_I2C
config ARCH_MPC837X
bool
@@ -195,7 +195,7 @@
select MPC83XX_SDHC_SUPPORT
select MPC83XX_SATA_SUPPORT
select MPC83XX_LDP_PIN
- select MPC83XX_SECOND_I2C_SUPPORT
+ select MPC83XX_SECOND_I2C
select FSL_ELBC
config SYS_IMMR
diff --git a/arch/riscv/cpu/fu740/Kconfig b/arch/riscv/cpu/fu740/Kconfig
index 8e54310..408195f 100644
--- a/arch/riscv/cpu/fu740/Kconfig
+++ b/arch/riscv/cpu/fu740/Kconfig
@@ -37,4 +37,4 @@
imply PWM_SIFIVE
imply DM_I2C
imply SYS_I2C_OCORES
- imply SPL_I2C_SUPPORT
+ imply SPL_I2C
diff --git a/board/Arcturus/ucp1020/spl.c b/board/Arcturus/ucp1020/spl.c
index 437e975..f7c4960 100644
--- a/board/Arcturus/ucp1020/spl.c
+++ b/board/Arcturus/ucp1020/spl.c
@@ -106,7 +106,7 @@
env_relocate();
#endif
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
i2c_init_all();
#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c
index e1c64b5..d5b6b22 100644
--- a/board/Marvell/dreamplug/dreamplug.c
+++ b/board/Marvell/dreamplug/dreamplug.c
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
+ * Copyright (C) 2021 Tony Dinh <mibodhi@gmail.com>
* (C) Copyright 2011
* Jason Cooper <u-boot@lakedaemon.net>
*
@@ -97,42 +98,75 @@
return 0;
}
+static int fdt_get_phy_addr(const char *path)
+{
+ const void *fdt = gd->fdt_blob;
+ const u32 *reg;
+ const u32 *val;
+ int node, phandle, addr;
+
+ /* Find the node by its full path */
+ node = fdt_path_offset(fdt, path);
+ if (node >= 0) {
+ /* Look up phy-handle */
+ val = fdt_getprop(fdt, node, "phy-handle", NULL);
+ if (val) {
+ phandle = fdt32_to_cpu(*val);
+ if (!phandle)
+ return -1;
+ /* Follow it to its node */
+ node = fdt_node_offset_by_phandle(fdt, phandle);
+ if (node) {
+ /* Look up reg */
+ reg = fdt_getprop(fdt, node, "reg", NULL);
+ if (reg) {
+ addr = fdt32_to_cpu(*reg);
+ return addr;
+ }
+ }
+ }
+ }
+ return -1;
+}
+
#ifdef CONFIG_RESET_PHY_R
-void mv_phy_88e1116_init(char *name)
+void mv_phy_88e1116_init(const char *name, const char *path)
{
u16 reg;
- u16 devadr;
+ int phyaddr;
if (miiphy_set_current_dev(name))
return;
- /* command to read PHY dev address */
- if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
- printf("Err..%s could not read PHY dev address\n",
- __func__);
+ phyaddr = fdt_get_phy_addr(path);
+ if (phyaddr < 0)
return;
- }
/*
* Enable RGMII delay on Tx and Rx for CPU port
* Ref: sec 4.7.2 of chip datasheet
*/
- miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
- miiphy_read(name, devadr, MV88E1116_MAC_CTRL2_REG, ®);
+ miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
+ miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL2_REG, ®);
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
- miiphy_write(name, devadr, MV88E1116_MAC_CTRL2_REG, reg);
- miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
+ miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL2_REG, reg);
+ miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
/* reset the phy */
- miiphy_reset(name, devadr);
+ miiphy_reset(name, phyaddr);
printf("88E1116 Initialized on %s\n", name);
}
void reset_phy(void)
{
+ char *eth0_name = "ethernet-controller@72000";
+ char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
+ char *eth1_name = "ethernet-controller@76000";
+ char *eth1_path = "/ocp@f1000000/ethernet-controller@72000/ethernet1-port@0";
+
/* configure and initialize both PHY's */
- mv_phy_88e1116_init("egiga0");
- mv_phy_88e1116_init("egiga1");
+ mv_phy_88e1116_init(eth0_name, eth0_path);
+ mv_phy_88e1116_init(eth1_name, eth1_path);
}
#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/compulab/common/Makefile b/board/compulab/common/Makefile
index 7ba92f5..842fb3b 100644
--- a/board/compulab/common/Makefile
+++ b/board/compulab/common/Makefile
@@ -5,6 +5,6 @@
# Author: Igor Grinberg <grinberg@compulab.co.il>
obj-y += common.o
-obj-$(CONFIG_SYS_I2C) += eeprom.o
+obj-$(CONFIG_SYS_I2C_LEGACY) += eeprom.o
obj-$(CONFIG_LCD) += omap3_display.o
obj-$(CONFIG_SMC911X) += omap3_smc911x.o
diff --git a/board/compulab/common/eeprom.h b/board/compulab/common/eeprom.h
index a9c0203..51c8acf 100644
--- a/board/compulab/common/eeprom.h
+++ b/board/compulab/common/eeprom.h
@@ -10,7 +10,7 @@
#define _EEPROM_
#include <errno.h>
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus);
u32 cl_eeprom_get_board_rev(uint eeprom_bus);
int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus);
diff --git a/board/congatec/cgtqmx8/cgtqmx8.c b/board/congatec/cgtqmx8/cgtqmx8.c
index fb0cf09..a50a052 100644
--- a/board/congatec/cgtqmx8/cgtqmx8.c
+++ b/board/congatec/cgtqmx8/cgtqmx8.c
@@ -374,7 +374,7 @@
/*
* Board specific reset that is system reset.
*/
-void reset_cpu(ulong addr)
+void reset_cpu(void)
{
/* TODO */
}
diff --git a/board/engicam/stm32mp1/spl.c b/board/engicam/stm32mp1/spl.c
index 79adb5f..3aa738b 100644
--- a/board/engicam/stm32mp1/spl.c
+++ b/board/engicam/stm32mp1/spl.c
@@ -13,7 +13,7 @@
void board_vddcore_init(u32 voltage_mv)
{
- if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER_SUPPORT))
+ if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER))
opp_voltage_mv = voltage_mv;
}
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index fcbde2c..711d8c2 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -213,7 +213,7 @@
preloader_console_init();
-#ifdef CONFIG_SPL_I2C_SUPPORT
+#ifdef CONFIG_SPL_I2C
i2c_init_all();
#endif
diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c
index 010f463..90188b0 100644
--- a/board/freescale/p1_p2_rdb_pc/spl.c
+++ b/board/freescale/p1_p2_rdb_pc/spl.c
@@ -99,7 +99,7 @@
env_relocate();
#endif
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
i2c_init_all();
#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
diff --git a/board/gdsys/a38x/Makefile b/board/gdsys/a38x/Makefile
index 32fffab..4b13859 100644
--- a/board/gdsys/a38x/Makefile
+++ b/board/gdsys/a38x/Makefile
@@ -4,7 +4,7 @@
# Copyright (C) 2015 Reinhard Pfau <reinhard.pfau@gdsys.cc>
# Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
-obj-$(CONFIG_TARGET_CONTROLCENTERDC) += controlcenterdc.o hre.o spl.o keyprogram.o dt_helpers.o
+obj-$(CONFIG_TARGET_CONTROLCENTERDC) += controlcenterdc.o hre.o keyprogram.o dt_helpers.o
ifeq ($(CONFIG_SPL_BUILD),)
obj-$(CONFIG_TARGET_CONTROLCENTERDC) += hydra.o ihs_phys.o
diff --git a/board/gdsys/a38x/spl.c b/board/gdsys/a38x/spl.c
deleted file mode 100644
index 84864d1..0000000
--- a/board/gdsys/a38x/spl.c
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2016
- * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
- */
-
-#include <common.h>
-#include <config.h>
-#include <asm/arch/cpu.h>
-
-void spl_board_init(void)
-{
-#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
- u32 *bootrom_save = (u32 *)CONFIG_SPL_BOOTROM_SAVE;
- u32 *regs = (u32 *)(*bootrom_save);
-
- printf("Returning to BootROM (return address %08x)...\n", regs[13]);
- return_to_bootrom();
-#endif
-}
diff --git a/board/hoperun/hihope-rzg2/hihope-rzg2.c b/board/hoperun/hihope-rzg2/hihope-rzg2.c
index c1bfdcb..c1db387 100644
--- a/board/hoperun/hihope-rzg2/hihope-rzg2.c
+++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c
@@ -65,7 +65,7 @@
return 0;
}
-void reset_cpu(ulong addr)
+void reset_cpu(void)
{
unsigned long midr, cputype;
diff --git a/board/kobol/helios4/Kconfig b/board/kobol/helios4/Kconfig
index cad51c1..81a2199 100644
--- a/board/kobol/helios4/Kconfig
+++ b/board/kobol/helios4/Kconfig
@@ -16,9 +16,4 @@
# Use optimistic 64 KiB erase block, will vary between actual media
default 0x10000 if MVEBU_SPL_BOOT_DEVICE_MMC || MVEBU_SPL_BOOT_DEVICE_UART
-config SYS_SPI_U_BOOT_OFFS
- hex "address of u-boot payload in SPI flash"
- default 0x20000
- depends on MVEBU_SPL_BOOT_DEVICE_SPI
-
endmenu
diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
index f588fc3..17b987f 100644
--- a/board/phytec/phycore_rk3288/phycore-rk3288.c
+++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
@@ -89,7 +89,7 @@
if (ret)
return ret;
-#if defined(CONFIG_SPL_POWER_SUPPORT)
+#if defined(CONFIG_SPL_POWER)
/* Increase USB input current to 2A */
ret = rk818_spl_configure_usb_input_current(pmic, 2000);
if (ret)
diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c
index 1d76f95..0aaae81 100644
--- a/board/renesas/draak/draak.c
+++ b/board/renesas/draak/draak.c
@@ -38,7 +38,7 @@
int board_early_init_f(void)
{
-#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
+#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif
diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c
index 071076a..1802547 100644
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -37,7 +37,7 @@
int board_early_init_f(void)
{
-#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
+#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif
@@ -78,7 +78,7 @@
void reset_cpu(void)
{
-#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
+#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
#else
/* only CA57 ? */
diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c
index 7ba1948..ffc4eb9 100644
--- a/board/renesas/ulcb/ulcb.c
+++ b/board/renesas/ulcb/ulcb.c
@@ -35,7 +35,7 @@
int board_early_init_f(void)
{
-#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
+#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif
diff --git a/board/siemens/draco/board.c b/board/siemens/draco/board.c
index 01fdfb5..af35bc1 100644
--- a/board/siemens/draco/board.c
+++ b/board/siemens/draco/board.c
@@ -288,7 +288,7 @@
#endif
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
- (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
+ (defined(CONFIG_SPL_ETH) && defined(CONFIG_SPL_BUILD))
static void cpsw_control(int enabled)
{
/* VTP can be added here */
diff --git a/board/siemens/pxm2/board.c b/board/siemens/pxm2/board.c
index b5e9b42..de52838 100644
--- a/board/siemens/pxm2/board.c
+++ b/board/siemens/pxm2/board.c
@@ -171,7 +171,7 @@
}
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
- (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
+ (defined(CONFIG_SPL_ETH) && defined(CONFIG_SPL_BUILD))
static void cpsw_control(int enabled)
{
/* VTP can be added here */
@@ -220,7 +220,7 @@
{
int n = 0;
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
- (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
+ (defined(CONFIG_SPL_ETH) && defined(CONFIG_SPL_BUILD))
struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
#ifdef CONFIG_FACTORYSET
int rv;
diff --git a/board/silinux/ek874/ek874.c b/board/silinux/ek874/ek874.c
index 5a219cd..1e94848 100644
--- a/board/silinux/ek874/ek874.c
+++ b/board/silinux/ek874/ek874.c
@@ -24,7 +24,7 @@
return 0;
}
-void reset_cpu(ulong addr)
+void reset_cpu(void)
{
writel(RST_CA53_CODE, RST_CA53RESCNT);
}
diff --git a/board/solidrun/clearfog/Kconfig b/board/solidrun/clearfog/Kconfig
index cf95258..60d3921 100644
--- a/board/solidrun/clearfog/Kconfig
+++ b/board/solidrun/clearfog/Kconfig
@@ -54,9 +54,4 @@
# Use optimistic 64 KiB erase block, will vary between actual media
default 0x10000 if MVEBU_SPL_BOOT_DEVICE_MMC || MVEBU_SPL_BOOT_DEVICE_UART
-config SYS_SPI_U_BOOT_OFFS
- hex "address of u-boot payload in SPI flash"
- default 0x20000
- depends on MVEBU_SPL_BOOT_DEVICE_SPI
-
endmenu
diff --git a/board/somlabs/visionsom-6ull/visionsom-6ull.c b/board/somlabs/visionsom-6ull/visionsom-6ull.c
index 076c641..c26e7b0 100644
--- a/board/somlabs/visionsom-6ull/visionsom-6ull.c
+++ b/board/somlabs/visionsom-6ull/visionsom-6ull.c
@@ -104,7 +104,7 @@
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
#endif
diff --git a/board/st/stm32mp1/spl.c b/board/st/stm32mp1/spl.c
index a6a4178..8e4549a 100644
--- a/board/st/stm32mp1/spl.c
+++ b/board/st/stm32mp1/spl.c
@@ -17,13 +17,13 @@
void board_vddcore_init(u32 voltage_mv)
{
- if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER_SUPPORT))
+ if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER))
opp_voltage_mv = voltage_mv;
}
int board_early_init_f(void)
{
- if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER_SUPPORT))
+ if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER))
stpmic1_init(opp_voltage_mv);
return 0;
diff --git a/board/tcl/sl50/board.c b/board/tcl/sl50/board.c
index 4821925..d213608 100644
--- a/board/tcl/sl50/board.c
+++ b/board/tcl/sl50/board.c
@@ -250,7 +250,7 @@
#endif
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
- (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
+ (defined(CONFIG_SPL_ETH) && defined(CONFIG_SPL_BUILD))
static void cpsw_control(int enabled)
{
/* VTP can be added here */
@@ -302,7 +302,7 @@
* Build in only these cases to avoid warnings about unused variables
* when we build an SPL that has neither option but full U-Boot will.
*/
-#if ((defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USB_ETHER)) \
+#if ((defined(CONFIG_SPL_ETH) || defined(CONFIG_SPL_USB_ETHER)) \
&& defined(CONFIG_SPL_BUILD)) || \
((defined(CONFIG_DRIVER_TI_CPSW) || \
defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)) && \
@@ -324,7 +324,7 @@
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
- (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
+ (defined(CONFIG_SPL_ETH) && defined(CONFIG_SPL_BUILD))
if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 5c156a5..2e4f3d1 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -588,7 +588,7 @@
#endif
#if defined(CONFIG_CLOCK_SYNTHESIZER) && (!defined(CONFIG_SPL_BUILD) || \
- (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)))
+ (defined(CONFIG_SPL_ETH) && defined(CONFIG_SPL_BUILD)))
static void request_and_set_gpio(int gpio, char *name, int val)
{
int ret;
@@ -724,7 +724,7 @@
#endif
#if defined(CONFIG_CLOCK_SYNTHESIZER) && (!defined(CONFIG_SPL_BUILD) || \
- (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)))
+ (defined(CONFIG_SPL_ETH) && defined(CONFIG_SPL_BUILD)))
if (board_is_icev2()) {
int rv;
u32 reg;
@@ -954,6 +954,8 @@
return 0;
else if (board_is_icev2() && !strcmp(name, "am335x-icev2"))
return 0;
+ else if (board_is_bben() && !strcmp(name, "am335x-sancloud-bbe"))
+ return 0;
else
return -1;
}
diff --git a/board/ti/j721e/README b/board/ti/j721e/README
deleted file mode 100644
index b1c9145..0000000
--- a/board/ti/j721e/README
+++ /dev/null
@@ -1,277 +0,0 @@
-Introduction:
--------------
-The J721e family of SoCs are part of K3 Multicore SoC architecture platform
-targeting automotive applications. They are designed as a low power, high
-performance and highly integrated device architecture, adding significant
-enhancement on processing power, graphics capability, video and imaging
-processing, virtualization and coherent memory support.
-
-The device is partitioned into three functional domains, each containing
-specific processing cores and peripherals:
-1. Wake-up (WKUP) domain:
- - Device Management and Security Controller (DMSC)
-2. Microcontroller (MCU) domain:
- - Dual Core ARM Cortex-R5F processor
-3. MAIN domain:
- - Dual core 64-bit ARM Cortex-A72
- - 2 x Dual cortex ARM Cortex-R5 subsystem
- - 2 x C66x Digital signal processor sub system
- - C71x Digital signal processor sub-system with MMA.
-
-More info can be found in TRM: http://www.ti.com/lit/pdf/spruil1
-
-Boot Flow:
-----------
-Boot flow is similar to that of AM65x SoC and extending it with remoteproc
-support. Below is the pictorial representation of boot flow:
-
-+------------------------------------------------------------------------+-----------------------+
-| DMSC | MCU R5 | A72 | MAIN R5/C66x/C7x |
-+------------------------------------------------------------------------+-----------------------+
-| +--------+ | | | |
-| | Reset | | | | |
-| +--------+ | | | |
-| : | | | |
-| +--------+ | +-----------+ | | |
-| | *ROM* |----------|-->| Reset rls | | | |
-| +--------+ | +-----------+ | | |
-| | | | : | | |
-| | ROM | | : | | |
-| |services| | : | | |
-| | | | +-------------+ | | |
-| | | | | *R5 ROM* | | | |
-| | | | +-------------+ | | |
-| | |<---------|---|Load and auth| | | |
-| | | | | tiboot3.bin | | | |
-| | | | +-------------+ | | |
-| | | | : | | |
-| | | | : | | |
-| | | | : | | |
-| | | | +-------------+ | | |
-| | | | | *R5 SPL* | | | |
-| | | | +-------------+ | | |
-| | | | | Load | | | |
-| | | | | sysfw.itb | | | |
-| | Start | | +-------------+ | | |
-| | System |<---------|---| Start | | | |
-| |Firmware| | | SYSFW | | | |
-| +--------+ | +-------------+ | | |
-| : | | | | | |
-| +---------+ | | Load | | | |
-| | *SYSFW* | | | system | | | |
-| +---------+ | | Config data | | | |
-| | |<--------|---| | | | |
-| | | | +-------------+ | | |
-| | | | | DDR | | | |
-| | | | | config | | | |
-| | | | +-------------+ | | |
-| | | | | Load | | | |
-| | | | | tispl.bin | | | |
-| | | | +-------------+ | | |
-| | | | | Load R5 | | | |
-| | | | | firmware | | | |
-| | | | +-------------+ | | |
-| | |<--------|---| Start A72 | | | |
-| | | | | and jump to | | | |
-| | | | | DM fw image | | | |
-| | | | +-------------+ | | |
-| | | | | +-----------+ | |
-| | |---------|-----------------------|---->| Reset rls | | |
-| | | | | +-----------+ | |
-| | TIFS | | | : | |
-| |Services | | | +-----------+ | |
-| | |<--------|-----------------------|---->|*ATF/OPTEE*| | |
-| | | | | +-----------+ | |
-| | | | | : | |
-| | | | | +-----------+ | |
-| | |<--------|-----------------------|---->| *A72 SPL* | | |
-| | | | | +-----------+ | |
-| | | | | | Load | | |
-| | | | | | u-boot.img| | |
-| | | | | +-----------+ | |
-| | | | | : | |
-| | | | | +-----------+ | |
-| | |<--------|-----------------------|---->| *U-Boot* | | |
-| | | | | +-----------+ | |
-| | | | | | prompt | | |
-| | | | | +-----------+ | |
-| | | | | | Load R5 | | |
-| | | | | | Firmware | | |
-| | | | | +-----------+ | |
-| | |<--------|-----------------------|-----| Start R5 | | +-----------+ |
-| | |---------|-----------------------|-----+-----------+-----|----->| R5 starts | |
-| | | | | | Load C6 | | +-----------+ |
-| | | | | | Firmware | | |
-| | | | | +-----------+ | |
-| | |<--------|-----------------------|-----| Start C6 | | +-----------+ |
-| | |---------|-----------------------|-----+-----------+-----|----->| C6 starts | |
-| | | | | | Load C7 | | +-----------+ |
-| | | | | | Firmware | | |
-| | | | | +-----------+ | |
-| | |<--------|-----------------------|-----| Start C7 | | +-----------+ |
-| | |---------|-----------------------|-----+-----------+-----|----->| C7 starts | |
-| +---------+ | | | +-----------+ |
-| | | | |
-+------------------------------------------------------------------------+-----------------------+
-
-- Here DMSC acts as master and provides all the critical services. R5/A72
-requests DMSC to get these services done as shown in the above diagram.
-
-Sources:
---------
-1. SYSFW:
- Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git
- Branch: master
-
-2. ATF:
- Tree: https://github.com/ARM-software/arm-trusted-firmware.git
- Branch: master
-
-3. OPTEE:
- Tree: https://github.com/OP-TEE/optee_os.git
- Branch: master
-
-4. U-Boot:
- Tree: https://source.denx.de/u-boot/u-boot
- Branch: master
-
-Build procedure:
-----------------
-1. SYSFW:
-$ make CROSS_COMPILE=arm-linux-gnueabihf-
-
-2. ATF:
-$ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed
-
-3. OPTEE:
-$ make PLATFORM=k3-j721e CFG_ARM64_core=y
-
-4. U-Boot:
-
-4.1. R5:
-$ make CROSS_COMPILE=arm-linux-gnueabihf- j721e_evm_r5_defconfig O=/tmp/r5
-$ make CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5
-
-4.2. A72:
-$ make CROSS_COMPILE=aarch64-linux-gnu- j721e_evm_a72_defconfig O=/tmp/a72
-$ make CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin DM=<path to DM firmware image> O=/tmp/a72
-
-Target Images
---------------
-Copy the below images to an SD card and boot:
-- sysfw.itb from step 1
-- tiboot3.bin from step 4.1
-- tispl.bin, u-boot.img from 4.2
-
-Image formats:
---------------
-
-- tiboot3.bin:
- +-----------------------+
- | X.509 |
- | Certificate |
- | +-------------------+ |
- | | | |
- | | R5 | |
- | | u-boot-spl.bin | |
- | | | |
- | +-------------------+ |
- | | | |
- | | FIT header | |
- | | +---------------+ | |
- | | | | | |
- | | | DTB 1...N | | |
- | | +---------------+ | |
- | +-------------------+ |
- +-----------------------+
-
-- tispl.bin
- +-----------------------+
- | |
- | FIT HEADER |
- | +-------------------+ |
- | | | |
- | | A72 ATF | |
- | +-------------------+ |
- | | | |
- | | A72 OPTEE | |
- | +-------------------+ |
- | | | |
- | | R5 DM FW | |
- | +-------------------+ |
- | | | |
- | | A72 SPL | |
- | +-------------------+ |
- | | | |
- | | SPL DTB 1...N | |
- | +-------------------+ |
- +-----------------------+
-
-- sysfw.itb
- +-----------------------+
- | |
- | FIT HEADER |
- | +-------------------+ |
- | | | |
- | | sysfw.bin | |
- | +-------------------+ |
- | | | |
- | | board config | |
- | +-------------------+ |
- | | | |
- | | PM config | |
- | +-------------------+ |
- | | | |
- | | RM config | |
- | +-------------------+ |
- | | | |
- | | Secure config | |
- | +-------------------+ |
- +-----------------------+
-
-OSPI:
------
-ROM supports booting from OSPI from offset 0x0.
-
-Flashing images to OSPI:
-
-Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img,
-and sysfw.itb over tftp and then flash those to OSPI at their respective
-addresses.
-
-=> sf probe
-=> tftp ${loadaddr} tiboot3.bin
-=> sf update $loadaddr 0x0 $filesize
-=> tftp ${loadaddr} tispl.bin
-=> sf update $loadaddr 0x80000 $filesize
-=> tftp ${loadaddr} u-boot.img
-=> sf update $loadaddr 0x280000 $filesize
-=> tftp ${loadaddr} sysfw.itb
-=> sf update $loadaddr 0x6C0000 $filesize
-
-Flash layout for OSPI:
-
- 0x0 +----------------------------+
- | ospi.tiboot3(512K) |
- | |
- 0x80000 +----------------------------+
- | ospi.tispl(2M) |
- | |
- 0x280000 +----------------------------+
- | ospi.u-boot(4M) |
- | |
- 0x680000 +----------------------------+
- | ospi.env(128K) |
- | |
- 0x6A0000 +----------------------------+
- | ospi.env.backup (128K) |
- | |
- 0x6C0000 +----------------------------+
- | ospi.sysfw(1M) |
- | |
- 0x7C0000 +----------------------------+
- | padding (256k) |
- 0x800000 +----------------------------+
- | ospi.rootfs(UBIFS) |
- | |
- +----------------------------+
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index b9a9f19..580f13c 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -10,6 +10,7 @@
#include <common.h>
#include <env.h>
#include <fdt_support.h>
+#include <generic-phy.h>
#include <image.h>
#include <init.h>
#include <log.h>
@@ -29,7 +30,8 @@
#define board_is_j721e_som() (board_ti_k3_is("J721EX-PM1-SOM") || \
board_ti_k3_is("J721EX-PM2-SOM"))
-#define board_is_j7200_som() board_ti_k3_is("J7200X-PM1-SOM")
+#define board_is_j7200_som() (board_ti_k3_is("J7200X-PM1-SOM") || \
+ board_ti_k3_is("J7200X-PM2-SOM"))
/* Max number of MAC addresses that are parsed/processed per daughter card */
#define DAUGHTER_CARD_NO_OF_MAC_ADDR 8
@@ -384,6 +386,33 @@
}
#endif
+void configure_serdes_torrent(void)
+{
+ struct udevice *dev;
+ struct phy serdes;
+ int ret;
+
+ if (!IS_ENABLED(CONFIG_PHY_CADENCE_TORRENT))
+ return;
+
+ ret = uclass_get_device_by_driver(UCLASS_PHY,
+ DM_DRIVER_GET(torrent_phy_provider),
+ &dev);
+ if (ret)
+ printf("Torrent init failed:%d\n", ret);
+
+ serdes.dev = dev;
+ serdes.id = 0;
+
+ ret = generic_phy_init(&serdes);
+ if (ret)
+ printf("phy_init failed!!\n");
+
+ ret = generic_phy_power_on(&serdes);
+ if (ret)
+ printf("phy_power_on failed !!\n");
+}
+
int board_late_init(void)
{
if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
@@ -394,6 +423,9 @@
probe_daughtercards();
}
+ if (board_is_j7200_som())
+ configure_serdes_torrent();
+
return 0;
}
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index fa6c92c..f24e628 100644
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -368,6 +368,9 @@
{ 98, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_DATA */
{ 99, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_CLK */
+ /* ICSS1 Padconf Workaround */
+ { 202, MODE(1) | PIN_PDIS }, /* PR1_PRU1_GPO1.PR1_PRU1_GPI1 (PR1_MII1_RXD1) */
+
{ MAX_PIN_N, }
};
diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c
index 26d557c..4f86a92 100644
--- a/board/tqc/tqma6/tqma6.c
+++ b/board/tqc/tqma6/tqma6.c
@@ -171,7 +171,7 @@
#endif
#endif
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
static struct i2c_pads_info tqma6_i2c3_pads = {
/* I2C3: on board LM75, M24C64, */
.scl = {
@@ -216,7 +216,7 @@
#ifndef CONFIG_DM_SPI
tqma6_iomuxc_spi();
#endif
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
tqma6_setup_i2c();
#endif
diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c
index 4175d41..0007cac 100644
--- a/board/vscom/baltos/board.c
+++ b/board/vscom/baltos/board.c
@@ -379,7 +379,7 @@
#endif
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
- (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
+ (defined(CONFIG_SPL_ETH) && defined(CONFIG_SPL_BUILD))
static void cpsw_control(int enabled)
{
/* VTP can be added here */
@@ -421,7 +421,7 @@
};
#endif
-#if ((defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USB_ETHER)) \
+#if ((defined(CONFIG_SPL_ETH) || defined(CONFIG_SPL_USB_ETHER)) \
&& defined(CONFIG_SPL_BUILD)) || \
((defined(CONFIG_DRIVER_TI_CPSW) || \
defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)) && \
@@ -450,7 +450,7 @@
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
- (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
+ (defined(CONFIG_SPL_ETH) && defined(CONFIG_SPL_BUILD))
if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
diff --git a/cmd/Kconfig b/cmd/Kconfig
index f1bcf9e..ffef3cc 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -167,7 +167,7 @@
config SPL_CMD_TLV_EEPROM
bool "tlv_eeprom for SPL"
depends on SPL_I2C_EEPROM
- select SPL_DRIVERS_MISC_SUPPORT
+ select SPL_DRIVERS_MISC
help
Read system EEPROM data block in ONIE Tlvinfo format from SPL.
diff --git a/cmd/date.c b/cmd/date.c
index 0e11894..e377cfe 100644
--- a/cmd/date.c
+++ b/cmd/date.c
@@ -46,7 +46,7 @@
printf("Cannot find RTC: err=%d\n", rcode);
return CMD_RET_FAILURE;
}
-#elif defined(CONFIG_SYS_I2C)
+#elif defined(CONFIG_SYS_I2C_LEGACY)
old_bus = i2c_get_bus_num();
i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM);
#else
@@ -119,7 +119,7 @@
}
/* switch back to original I2C bus */
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
i2c_set_bus_num(old_bus);
#elif !defined(CONFIG_DM_RTC)
I2C_SET_BUS(old_bus);
diff --git a/cmd/eeprom.c b/cmd/eeprom.c
index b3fd37c..efd6f3a 100644
--- a/cmd/eeprom.c
+++ b/cmd/eeprom.c
@@ -75,7 +75,7 @@
/* I2C EEPROM */
#if CONFIG_IS_ENABLED(DM_I2C)
eeprom_i2c_bus = bus;
-#elif defined(CONFIG_SYS_I2C)
+#elif defined(CONFIG_SYS_I2C_LEGACY)
if (bus >= 0)
i2c_set_bus_num(bus);
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
diff --git a/cmd/i2c.c b/cmd/i2c.c
index 5d0e207..0e1895a 100644
--- a/cmd/i2c.c
+++ b/cmd/i2c.c
@@ -98,7 +98,7 @@
* pairs. The following macros take care of this */
#if defined(CONFIG_SYS_I2C_NOPROBES)
-#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
+#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
static struct
{
uchar bus;
@@ -114,7 +114,7 @@
#define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
#define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
-#endif /* defined(CONFIG_SYS_I2C) */
+#endif /* defined(CONFIG_SYS_I2C_LEGACY) */
#endif
#define DISP_LINE_LEN 16
@@ -209,7 +209,7 @@
*
* Returns I2C bus speed in Hz.
*/
-#if !defined(CONFIG_SYS_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
+#if !defined(CONFIG_SYS_I2C_LEGACY) && !CONFIG_IS_ENABLED(DM_I2C)
/*
* TODO: Implement architecture-specific get/set functions
* Should go away, if we switched completely to new multibus support
@@ -1725,7 +1725,7 @@
*
* Returns zero always.
*/
-#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@@ -1811,7 +1811,7 @@
* Returns zero on success, CMD_RET_USAGE in case of misuse and negative
* on error.
*/
-#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \
+#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) || \
CONFIG_IS_ENABLED(DM_I2C)
static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
@@ -1834,7 +1834,7 @@
printf("Current bus is %d\n", bus_no);
} else {
bus_no = simple_strtoul(argv[1], NULL, 10);
-#if defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY)
if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) {
printf("Invalid bus %d\n", bus_no);
return -1;
@@ -1852,7 +1852,7 @@
return ret ? CMD_RET_FAILURE : 0;
}
-#endif /* defined(CONFIG_SYS_I2C) */
+#endif /* defined(CONFIG_SYS_I2C_LEGACY) */
/**
* do_i2c_bus_speed() - Handle the "i2c speed" command-line command
@@ -1951,7 +1951,7 @@
printf("Error: Not supported by the driver\n");
return CMD_RET_FAILURE;
}
-#elif defined(CONFIG_SYS_I2C)
+#elif defined(CONFIG_SYS_I2C_LEGACY)
i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
@@ -1960,11 +1960,11 @@
}
static struct cmd_tbl cmd_i2c_sub[] = {
-#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
#endif
U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
-#if defined(CONFIG_SYS_I2C) || \
+#if defined(CONFIG_SYS_I2C_LEGACY) || \
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
#endif /* CONFIG_I2C_MULTI_BUS */
@@ -2036,12 +2036,12 @@
/***************************************************/
#ifdef CONFIG_SYS_LONGHELP
static char i2c_help_text[] =
-#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
"bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
"i2c " /* That's the prefix for the crc32 command below. */
#endif
"crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
-#if defined(CONFIG_SYS_I2C) || \
+#if defined(CONFIG_SYS_I2C_LEGACY) || \
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
"i2c dev [dev] - show or set current I2C bus\n"
#endif /* CONFIG_I2C_MULTI_BUS */
diff --git a/common/Kconfig.boot b/common/Kconfig.boot
index 642dd9b..f39df04 100644
--- a/common/Kconfig.boot
+++ b/common/Kconfig.boot
@@ -184,7 +184,7 @@
depends on SPL_LOAD_FIT || SPL_LOAD_FIT_FULL
select FIT_SIGNATURE
select SPL_FIT
- select SPL_CRYPTO_SUPPORT
+ select SPL_CRYPTO
select SPL_HASH_SUPPORT
select SPL_RSA
select SPL_RSA_VERIFY
diff --git a/common/Makefile b/common/Makefile
index 829ea5f..9063ed9 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -72,7 +72,7 @@
obj-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o
obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o
-ifdef CONFIG_SPL_USB_HOST_SUPPORT
+ifdef CONFIG_SPL_USB_HOST
obj-y += usb.o
obj-y += usb_hub.o
obj-$(CONFIG_SPL_USB_STORAGE) += usb_storage.o
diff --git a/common/board_f.c b/common/board_f.c
index c1b8e63..f274653 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -244,7 +244,7 @@
return 0;
}
-#if defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY)
static int init_func_i2c(void)
{
puts("I2C: ");
@@ -871,7 +871,7 @@
misc_init_f,
#endif
INIT_FUNC_WATCHDOG_RESET
-#if defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY)
init_func_i2c,
#endif
#if defined(CONFIG_VID) && !defined(CONFIG_SPL)
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index c018352..c155a3b 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -344,7 +344,7 @@
default 0x75 if ARCH_DAVINCI
default 0x8a if ARCH_MX6 || ARCH_MX7
default 0x100 if ARCH_UNIPHIER
- default 0x140 if ARCH_MVEBU
+ default 0x0 if ARCH_MVEBU
default 0x200 if ARCH_SOCFPGA || ARCH_AT91
default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
OMAP54XX || AM33XX || AM43XX || ARCH_K3
@@ -511,7 +511,7 @@
may improve boot performance. Enable this option to build the
drivers in drivers/cpu as part of an SPL build.
-config SPL_CRYPTO_SUPPORT
+config SPL_CRYPTO
bool "Support crypto drivers"
help
Enable crypto drivers in SPL. These drivers can be used to
@@ -548,7 +548,7 @@
the CPU moving the data. Enable this option to build the drivers
in drivers/dma as part of an SPL build.
-config SPL_DRIVERS_MISC_SUPPORT
+config SPL_DRIVERS_MISC
bool "Support misc drivers"
help
Enable miscellaneous drivers in SPL. These drivers perform various
@@ -582,7 +582,7 @@
"reboot_image" and act accordingly and change the reboot_image
to default mode using setenv and save the environment.
-config SPL_ETH_SUPPORT
+config SPL_ETH
bool "Support Ethernet"
depends on SPL_ENV_SUPPORT
help
@@ -636,7 +636,7 @@
as early as possible during boot, and this option can enable that
within SPL.
-config SPL_GPIO_SUPPORT
+config SPL_GPIO
bool "Support GPIO in SPL"
help
Enable support for GPIOs (General-purpose Input/Output) in SPL.
@@ -647,7 +647,7 @@
for example. Enable this option to build the drivers in
drivers/gpio as part of an SPL build.
-config SPL_I2C_SUPPORT
+config SPL_I2C
bool "Support I2C"
help
Enable support for the I2C (Inter-Integrated Circuit) bus in SPL.
@@ -761,7 +761,7 @@
devices. See SPL_NAND_SUPPORT and SPL_ONENAND_SUPPORT for how
to enable specific MTD drivers.
-config SPL_MUSB_NEW_SUPPORT
+config SPL_MUSB_NEW
bool "Support new Mentor Graphics USB"
help
Enable support for Mentor Graphics USB in SPL. This is a new
@@ -926,7 +926,7 @@
This permits SPL to load U-Boot over a network link rather than
from an on-board peripheral. Environment support is required since
the network stack uses a number of environment variables. See also
- SPL_ETH_SUPPORT.
+ SPL_ETH.
if SPL_NET_SUPPORT
config SPL_NET_VCI_STRING
@@ -1034,7 +1034,7 @@
by using the generic reset API provided by driver model.
This enables the drivers in drivers/reset as part of an SPL build.
-config SPL_POWER_SUPPORT
+config SPL_POWER
bool "Support power drivers"
help
Enable support for power control in SPL. This includes support
@@ -1099,6 +1099,7 @@
config SPL_SATA_RAW_U_BOOT_USE_SECTOR
bool "SATA raw mode: by sector"
depends on SPL_SATA_SUPPORT
+ default y if ARCH_MVEBU
help
Use sector number for specifying U-Boot location on SATA disk in
raw mode.
@@ -1106,6 +1107,7 @@
config SPL_SATA_RAW_U_BOOT_SECTOR
hex "Sector on the SATA disk to load U-Boot from"
depends on SPL_SATA_RAW_U_BOOT_USE_SECTOR
+ default 0x1 if ARCH_MVEBU
help
Sector on the SATA disk to load U-Boot from, when the SATA disk is being
used in raw mode. Units: SATA disk sectors (1 sector = 512 bytes).
@@ -1192,7 +1194,7 @@
automatic power-off when the temperature gets too high or low. Other
devices may be discrete but connected on a suitable bus.
-config SPL_USB_HOST_SUPPORT
+config SPL_USB_HOST
bool "Support USB host drivers"
select HAVE_BLOCK_DEVICE
help
@@ -1205,7 +1207,7 @@
config SPL_USB_STORAGE
bool "Support loading from USB"
- depends on SPL_USB_HOST_SUPPORT && !(BLK && !DM_USB)
+ depends on SPL_USB_HOST && !(BLK && !DM_USB)
help
Enable support for USB devices in SPL. This allows use of USB
devices such as hard drives and flash drivers for loading U-Boot.
@@ -1229,7 +1231,7 @@
USB-connected Ethernet link (such as a USB Ethernet dongle) rather
than from an onboard peripheral. Environment support is required
since the network stack uses a number of environment variables.
- See also SPL_NET_SUPPORT and SPL_ETH_SUPPORT.
+ See also SPL_NET_SUPPORT and SPL_ETH.
config SPL_DFU
bool "Support DFU (Device Firmware Upgrade)"
@@ -1275,7 +1277,7 @@
so it can be used in compiled environment.
endif
-config SPL_WATCHDOG_SUPPORT
+config SPL_WATCHDOG
bool "Support watchdog drivers"
imply SPL_WDT if !HW_WATCHDOG
help
@@ -1477,7 +1479,7 @@
BOOT_DEVICE_BOOTROM (or fall-through to the next boot device in the
boot device list, if not implemented for a given board)
-config TPL_DRIVERS_MISC_SUPPORT
+config TPL_DRIVERS_MISC
bool "Support misc drivers in TPL"
help
Enable miscellaneous drivers in TPL. These drivers perform various
@@ -1490,7 +1492,7 @@
help
Enable environment support in TPL. See SPL_ENV_SUPPORT for details.
-config TPL_GPIO_SUPPORT
+config TPL_GPIO
bool "Support GPIO in TPL"
help
Enable support for GPIOs (General-purpose Input/Output) in TPL.
@@ -1501,10 +1503,10 @@
for example. Enable this option to build the drivers in
drivers/gpio as part of an TPL build.
-config TPL_I2C_SUPPORT
+config TPL_I2C
bool "Support I2C"
help
- Enable support for the I2C bus in TPL. See SPL_I2C_SUPPORT for
+ Enable support for the I2C bus in TPL. See SPL_I2C for
details.
config TPL_LIBCOMMON_SUPPORT
diff --git a/common/spl/spl.c b/common/spl/spl.c
index d1b072d..d55d3c2 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -300,6 +300,12 @@
}
#endif
+__weak int spl_parse_board_header(struct spl_image_info *spl_image,
+ const void *image_header, size_t size)
+{
+ return -EINVAL;
+}
+
__weak int spl_parse_legacy_header(struct spl_image_info *spl_image,
const struct image_header *header)
{
@@ -352,6 +358,9 @@
}
#endif
+ if (!spl_parse_board_header(spl_image, (const void *)header, sizeof(*header)))
+ return 0;
+
#ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT
/* Signature not found - assume u-boot.bin */
debug("mkimage signature not found - ih_magic = %x\n",
@@ -707,7 +716,7 @@
spl_board_init();
#endif
-#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) && CONFIG_IS_ENABLED(WDT)
+#if defined(CONFIG_SPL_WATCHDOG) && CONFIG_IS_ENABLED(WDT)
initr_watchdog();
#endif
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 4dff9bf..212a2b0 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -20,26 +20,40 @@
static int mmc_load_legacy(struct spl_image_info *spl_image, struct mmc *mmc,
ulong sector, struct image_header *header)
{
+ u32 image_offset_sectors;
u32 image_size_sectors;
unsigned long count;
+ u32 image_offset;
int ret;
ret = spl_parse_image_header(spl_image, header);
if (ret)
return ret;
+ /* convert offset to sectors - round down */
+ image_offset_sectors = spl_image->offset / mmc->read_bl_len;
+ /* calculate remaining offset */
+ image_offset = spl_image->offset % mmc->read_bl_len;
+
/* convert size to sectors - round up */
image_size_sectors = (spl_image->size + mmc->read_bl_len - 1) /
mmc->read_bl_len;
/* Read the header too to avoid extra memcpy */
- count = blk_dread(mmc_get_blk_desc(mmc), sector, image_size_sectors,
+ count = blk_dread(mmc_get_blk_desc(mmc),
+ sector + image_offset_sectors,
+ image_size_sectors,
(void *)(ulong)spl_image->load_addr);
debug("read %x sectors to %lx\n", image_size_sectors,
spl_image->load_addr);
if (count != image_size_sectors)
return -EIO;
+ if (image_offset)
+ memmove((void *)(ulong)spl_image->load_addr,
+ (void *)(ulong)spl_image->load_addr + image_offset,
+ spl_image->size);
+
return 0;
}
diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c
index e140a63..d23b395 100644
--- a/common/spl/spl_net.c
+++ b/common/spl/spl_net.c
@@ -15,7 +15,7 @@
#include <net.h>
#include <linux/libfdt.h>
-#if defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USB_ETHER)
+#if defined(CONFIG_SPL_ETH) || defined(CONFIG_SPL_USB_ETHER)
static ulong spl_net_load_read(struct spl_load_info *load, ulong sector,
ulong count, void *buf)
{
@@ -69,7 +69,7 @@
}
#endif
-#ifdef CONFIG_SPL_ETH_SUPPORT
+#ifdef CONFIG_SPL_ETH
int spl_net_load_image_cpgmac(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c
index e108af0..535a921 100644
--- a/common/spl/spl_sata.c
+++ b/common/spl/spl_sata.c
@@ -36,6 +36,8 @@
struct image_header *header;
unsigned long count;
u32 image_size_sectors;
+ u32 image_offset_sectors;
+ u32 image_offset;
int ret;
header = spl_get_load_buffer(-sizeof(*header), stor_dev->blksz);
@@ -48,11 +50,19 @@
return ret;
image_size_sectors = DIV_ROUND_UP(spl_image->size, stor_dev->blksz);
- count = blk_dread(stor_dev, sector, image_size_sectors,
+ image_offset_sectors = spl_image->offset / stor_dev->blksz;
+ image_offset = spl_image->offset % stor_dev->blksz;
+ count = blk_dread(stor_dev, sector + image_offset_sectors,
+ image_size_sectors,
(void *)spl_image->load_addr);
if (count != image_size_sectors)
return -EIO;
+ if (image_offset)
+ memmove((void *)spl_image->load_addr,
+ (void *)spl_image->load_addr + image_offset,
+ spl_image->size);
+
return 0;
}
diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c
index 6a4e033..9884e7c 100644
--- a/common/spl/spl_spi.c
+++ b/common/spl/spl_spi.c
@@ -159,7 +159,7 @@
err = spl_parse_image_header(spl_image, header);
if (err)
return err;
- err = spi_flash_read(flash, payload_offs,
+ err = spi_flash_read(flash, payload_offs + spl_image->offset,
spl_image->size,
(void *)spl_image->load_addr);
}
diff --git a/common/stdio.c b/common/stdio.c
index d4acc52..4083e4e 100644
--- a/common/stdio.c
+++ b/common/stdio.c
@@ -336,7 +336,7 @@
dev->name);
}
}
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
i2c_init_all();
#endif
if (IS_ENABLED(CONFIG_DM_VIDEO)) {
diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig
index 6a9d0a4..caa0bbf 100644
--- a/configs/A10-OLinuXino-Lime_defconfig
+++ b/configs/A10-OLinuXino-Lime_defconfig
@@ -11,7 +11,7 @@
CONFIG_SATAPWR="PC3"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig
index 798f879..aea7e9b 100644
--- a/configs/A10s-OLinuXino-M_defconfig
+++ b/configs/A10s-OLinuXino-M_defconfig
@@ -9,7 +9,7 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=1
CONFIG_USB1_VBUS_PIN="PB10"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
CONFIG_AXP152_POWER=y
diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig
index 401cce0..a26064c 100644
--- a/configs/A13-OLinuXino_defconfig
+++ b/configs/A13-OLinuXino_defconfig
@@ -15,7 +15,7 @@
CONFIG_VIDEO_LCD_POWER="AXP0-0"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_DFU_RAM=y
diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
index 014f68e..3936da1 100644
--- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig
+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
@@ -13,7 +13,7 @@
CONFIG_SPL_SPI_SUNXI=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SCSI_AHCI=y
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
index df3c99a..a8200da 100644
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -11,7 +11,7 @@
CONFIG_SATAPWR="PC3"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SCSI_AHCI=y
diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig
index b5e61aa..c949922 100644
--- a/configs/A20-OLinuXino-Lime_defconfig
+++ b/configs/A20-OLinuXino-Lime_defconfig
@@ -9,7 +9,7 @@
CONFIG_SATAPWR="PC3"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
index a6ed8b5..9679f44 100644
--- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig
+++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
@@ -11,7 +11,7 @@
CONFIG_SATAPWR="PB8"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig
index 6adee59..9c8eae1 100644
--- a/configs/A20-OLinuXino_MICRO_defconfig
+++ b/configs/A20-OLinuXino_MICRO_defconfig
@@ -12,7 +12,7 @@
CONFIG_SATAPWR="PB8"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig
index 5259997..a3a701e 100644
--- a/configs/A20-Olimex-SOM-EVB_defconfig
+++ b/configs/A20-Olimex-SOM-EVB_defconfig
@@ -13,7 +13,7 @@
CONFIG_SATAPWR="PC3"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
index 010e8c2..6f2ab1b 100644
--- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
+++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
@@ -13,7 +13,7 @@
CONFIG_GMAC_TX_DELAY=4
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_PHY_ADDR=3
diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig
index df7b5b4..e2388b7 100644
--- a/configs/A20-Olimex-SOM204-EVB_defconfig
+++ b/configs/A20-Olimex-SOM204-EVB_defconfig
@@ -12,7 +12,7 @@
CONFIG_GMAC_TX_DELAY=4
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_PHY_ADDR=3
diff --git a/configs/Ainol_AW1_defconfig b/configs/Ainol_AW1_defconfig
index 51341c0..7952200 100644
--- a/configs/Ainol_AW1_defconfig
+++ b/configs/Ainol_AW1_defconfig
@@ -14,5 +14,5 @@
CONFIG_VIDEO_LCD_BL_EN="PH7"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig
index 4972352..638411e 100644
--- a/configs/Ampe_A76_defconfig
+++ b/configs/Ampe_A76_defconfig
@@ -15,6 +15,6 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Auxtek-T003_defconfig b/configs/Auxtek-T003_defconfig
index 768d230..1ac80a1 100644
--- a/configs/Auxtek-T003_defconfig
+++ b/configs/Auxtek-T003_defconfig
@@ -8,7 +8,7 @@
CONFIG_USB1_VBUS_PIN="PB10"
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_AXP152_POWER=y
CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig
index cd35d05..d1a1de7 100644
--- a/configs/Auxtek-T004_defconfig
+++ b/configs/Auxtek-T004_defconfig
@@ -6,7 +6,7 @@
CONFIG_DRAM_CLK=432
CONFIG_USB1_VBUS_PIN="PG13"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_AXP152_POWER=y
CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig
index e0adffd..4073b4d 100644
--- a/configs/Bananapi_M2_Ultra_defconfig
+++ b/configs/Bananapi_M2_Ultra_defconfig
@@ -11,7 +11,7 @@
CONFIG_USB2_VBUS_PIN="PH23"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_RGMII=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
index 50c8adc..41d356b 100644
--- a/configs/Bananapi_defconfig
+++ b/configs/Bananapi_defconfig
@@ -9,7 +9,7 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_NETCONSOLE=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig
index 5447bea..ad75ac4 100644
--- a/configs/Bananapro_defconfig
+++ b/configs/Bananapro_defconfig
@@ -11,7 +11,7 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_NETCONSOLE=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig
index 9e2c7cc..5347d32 100644
--- a/configs/CHIP_defconfig
+++ b/configs/CHIP_defconfig
@@ -7,7 +7,7 @@
CONFIG_USB0_VBUS_PIN="PB10"
CONFIG_VIDEO_COMPOSITE=y
CONFIG_CHIP_DIP_SCAN=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CMD_DFU=y
CONFIG_DFU_RAM=y
# CONFIG_MMC is not set
diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig
index 845a429..d013081 100644
--- a/configs/CHIP_pro_defconfig
+++ b/configs/CHIP_pro_defconfig
@@ -5,7 +5,7 @@
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
CONFIG_USB0_VBUS_PIN="PB10"
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=sunxi-nand.0"
diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig
index 6d5ea16..4ac95a6 100644
--- a/configs/Chuwi_V7_CW0825_defconfig
+++ b/configs/Chuwi_V7_CW0825_defconfig
@@ -14,7 +14,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_PANEL_HITACHI_TX18D42VM=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_MUSB_HOST=y
CONFIG_VIDEO_LCD_SPI_CS="PA0"
CONFIG_VIDEO_LCD_SPI_SCLK="PA1"
diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig
index 65cf621..d4fc7a5 100644
--- a/configs/Cubieboard2_defconfig
+++ b/configs/Cubieboard2_defconfig
@@ -8,7 +8,7 @@
CONFIG_SATAPWR="PB8"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig
index b5a28ab..2a22bc0 100644
--- a/configs/Cubieboard_defconfig
+++ b/configs/Cubieboard_defconfig
@@ -8,7 +8,7 @@
CONFIG_SATAPWR="PB8"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index 0929997..8ec2449 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -13,7 +13,7 @@
CONFIG_GMAC_TX_DELAY=1
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SCSI_AHCI=y
diff --git a/configs/Empire_electronix_d709_defconfig b/configs/Empire_electronix_d709_defconfig
index eb6a316..3811808 100644
--- a/configs/Empire_electronix_d709_defconfig
+++ b/configs/Empire_electronix_d709_defconfig
@@ -16,6 +16,6 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig
index 773f1a9..8482d8f 100644
--- a/configs/Empire_electronix_m712_defconfig
+++ b/configs/Empire_electronix_m712_defconfig
@@ -15,6 +15,6 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig
index dcd22ac..62c0eda 100644
--- a/configs/Hyundai_A7HD_defconfig
+++ b/configs/Hyundai_A7HD_defconfig
@@ -15,5 +15,5 @@
# CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig
index 4f67274..4609347 100644
--- a/configs/Itead_Ibox_A20_defconfig
+++ b/configs/Itead_Ibox_A20_defconfig
@@ -8,7 +8,7 @@
CONFIG_SATAPWR="PB8"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig
index c7bea1c..d949f55 100644
--- a/configs/Lamobo_R1_defconfig
+++ b/configs/Lamobo_R1_defconfig
@@ -10,7 +10,7 @@
CONFIG_GMAC_TX_DELAY=4
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_B53_SWITCH=y
CONFIG_B53_PHY_PORTS=0x1f
diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig
index 25e371f..f7151fc 100644
--- a/configs/Linksprite_pcDuino3_Nano_defconfig
+++ b/configs/Linksprite_pcDuino3_Nano_defconfig
@@ -10,7 +10,7 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig
index e278e27..467e517 100644
--- a/configs/Linksprite_pcDuino3_defconfig
+++ b/configs/Linksprite_pcDuino3_defconfig
@@ -8,7 +8,7 @@
CONFIG_SATAPWR="PH2"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig
index 9a70d7e..dd81e2a 100644
--- a/configs/Linksprite_pcDuino_defconfig
+++ b/configs/Linksprite_pcDuino_defconfig
@@ -6,7 +6,7 @@
CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/MK808C_defconfig b/configs/MK808C_defconfig
index f2c1019..6f003f8 100644
--- a/configs/MK808C_defconfig
+++ b/configs/MK808C_defconfig
@@ -5,6 +5,6 @@
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/MSI_Primo73_defconfig b/configs/MSI_Primo73_defconfig
index 6481f6f..901e500 100644
--- a/configs/MSI_Primo73_defconfig
+++ b/configs/MSI_Primo73_defconfig
@@ -10,4 +10,4 @@
CONFIG_VIDEO_LCD_BL_EN="PH7"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig
index dd441ef..21165f0 100644
--- a/configs/Mele_A1000_defconfig
+++ b/configs/Mele_A1000_defconfig
@@ -8,7 +8,7 @@
CONFIG_VIDEO_COMPOSITE=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig
index eb3458c..ebe2430 100644
--- a/configs/Mele_M3_defconfig
+++ b/configs/Mele_M3_defconfig
@@ -9,7 +9,7 @@
CONFIG_VIDEO_VGA=y
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig
index 133bb6d..a6a0e6e 100644
--- a/configs/Mele_M5_defconfig
+++ b/configs/Mele_M5_defconfig
@@ -9,7 +9,7 @@
CONFIG_VIDEO_COMPOSITE=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig
index 3353d09..89c633c 100644
--- a/configs/Mini-X_defconfig
+++ b/configs/Mini-X_defconfig
@@ -6,7 +6,7 @@
CONFIG_USB0_VBUS_PIN="PB9"
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig
index a6f4270..737978f 100644
--- a/configs/Orangepi_defconfig
+++ b/configs/Orangepi_defconfig
@@ -12,7 +12,7 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig
index cf0b95b..f0ea0fc 100644
--- a/configs/Orangepi_mini_defconfig
+++ b/configs/Orangepi_mini_defconfig
@@ -14,7 +14,7 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index d75eab8..9625719 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -7,7 +7,7 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PA=y
@@ -26,9 +26,9 @@
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
-CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC=y
CONFIG_TPL_ENV_SUPPORT=y
-CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_I2C=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index 584cae5..efb696d 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PA=y
@@ -25,7 +25,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 749be89..75ab1f6 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -8,7 +8,7 @@
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
@@ -27,7 +27,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 1c8fe09..827ec0c 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -7,7 +7,7 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PA=y
@@ -25,9 +25,9 @@
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
-CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC=y
CONFIG_TPL_ENV_SUPPORT=y
-CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_I2C=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index 0300932..1c725b9 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PA=y
@@ -24,7 +24,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index d448856..0798d3b 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -8,7 +8,7 @@
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
@@ -26,7 +26,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index 16282b0..ce16c19 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -7,7 +7,7 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PB=y
@@ -26,9 +26,9 @@
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
-CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC=y
CONFIG_TPL_ENV_SUPPORT=y
-CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_I2C=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 9004c44..967d7af 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PB=y
@@ -25,7 +25,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index 88c22c0..2d3154e 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -8,7 +8,7 @@
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
@@ -27,7 +27,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 42169ec..1d4d0fe 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -7,7 +7,7 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PB=y
@@ -25,9 +25,9 @@
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
-CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC=y
CONFIG_TPL_ENV_SUPPORT=y
-CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_I2C=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index 641e6a7..f1b19f0 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1010RDB_PB=y
@@ -24,7 +24,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index 4d689df..261c120 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -8,7 +8,7 @@
CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
CONFIG_SPL_TEXT_BASE=0xD0001000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
@@ -26,7 +26,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index e01025f..5a4cc22 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -27,7 +27,7 @@
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
-CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_I2C=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index 1d5c4fe..c24a57f 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -25,7 +25,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 6f31dac..6bf0dd6 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -27,7 +27,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 0d4a296..8ef9170 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -26,7 +26,7 @@
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
-CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_I2C=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index eba1906..708db07 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -24,7 +24,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 12fd335..96bce81 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -26,7 +26,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index f393caf..27402f6 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -26,7 +26,7 @@
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
-CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_I2C=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 3d469a3..51ceb84 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -24,7 +24,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index bec1b90..f95daa1 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -26,7 +26,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index e0c64f0..85fe2f3 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -27,7 +27,7 @@
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
-CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_I2C=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index d07fa39..61ac850 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -25,7 +25,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index ef8cb68..b011006 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -27,7 +27,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index f674b39..7d81ce6 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -26,7 +26,7 @@
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_ENV_SUPPORT=y
-CONFIG_TPL_I2C_SUPPORT=y
+CONFIG_TPL_I2C=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_TPL_SERIAL_SUPPORT=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index e9793db..fd98748 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -24,7 +24,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index eb61686..0bc6cb5 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -26,7 +26,7 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index 9288204..0a3cc7b 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -9,7 +9,7 @@
CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1024RDB=y
@@ -29,7 +29,7 @@
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index 5f7511d..814cde6 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -10,7 +10,7 @@
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1024RDB=y
@@ -28,7 +28,7 @@
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index e49da10..825d910 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -10,7 +10,7 @@
CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
@@ -30,7 +30,7 @@
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 7fee660..c15c5a2 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -7,7 +7,7 @@
CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1042D4RDB=y
@@ -27,7 +27,7 @@
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index 8df9d7e..2bd3528 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1042D4RDB=y
@@ -26,7 +26,7 @@
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index b80fb9a..d56e5a8 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -8,7 +8,7 @@
CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
@@ -28,7 +28,7 @@
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index 170400a..06d4f66 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080QDS=y
@@ -25,7 +25,7 @@
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index b11da8e..45a3bbb 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -9,7 +9,7 @@
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080QDS=y
@@ -24,7 +24,7 @@
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index c1ee34d..921760c 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -9,7 +9,7 @@
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
@@ -26,7 +26,7 @@
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index 13ec9d5..95a2c77 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -9,7 +9,7 @@
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080RDB=y
@@ -26,7 +26,7 @@
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 6b032d2..21d22df 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -10,7 +10,7 @@
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080RDB=y
@@ -25,7 +25,7 @@
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index b65067a..393b6db 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -10,7 +10,7 @@
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
@@ -27,7 +27,7 @@
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig
index 1b383fd..250c2d5 100644
--- a/configs/T2080RDB_revD_NAND_defconfig
+++ b/configs/T2080RDB_revD_NAND_defconfig
@@ -9,7 +9,7 @@
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080RDB=y
@@ -27,7 +27,7 @@
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig
index 7026256..d5eea40 100644
--- a/configs/T2080RDB_revD_SDCARD_defconfig
+++ b/configs/T2080RDB_revD_SDCARD_defconfig
@@ -10,7 +10,7 @@
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080RDB=y
@@ -26,7 +26,7 @@
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig
index 650158b..4d38f4b 100644
--- a/configs/T2080RDB_revD_SPIFLASH_defconfig
+++ b/configs/T2080RDB_revD_SPIFLASH_defconfig
@@ -10,7 +10,7 @@
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
@@ -28,7 +28,7 @@
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index 76c7906..2230e67 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_TEXT_BASE=0xFFFD8000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240RDB=y
@@ -23,7 +23,7 @@
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig
index 954d197..78c40c0 100644
--- a/configs/UTOO_P66_defconfig
+++ b/configs/UTOO_P66_defconfig
@@ -20,7 +20,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_TL059WV5C0=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Wexler_TAB7200_defconfig b/configs/Wexler_TAB7200_defconfig
index b001d82..ee7d486 100644
--- a/configs/Wexler_TAB7200_defconfig
+++ b/configs/Wexler_TAB7200_defconfig
@@ -13,7 +13,7 @@
CONFIG_VIDEO_LCD_BL_EN="PH7"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig
index dbd6bd7..4c4d3be 100644
--- a/configs/Wits_Pro_A20_DKT_defconfig
+++ b/configs/Wits_Pro_A20_DKT_defconfig
@@ -12,7 +12,7 @@
CONFIG_VIDEO_LCD_PANEL_LVDS=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig
index 7433727..6fdb152 100644
--- a/configs/Wobo_i5_defconfig
+++ b/configs/Wobo_i5_defconfig
@@ -7,7 +7,7 @@
CONFIG_MMC0_CD_PIN="PB3"
CONFIG_USB1_VBUS_PIN="PG12"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_AXP_ALDO3_VOLT=3300
CONFIG_AXP_ALDO4_VOLT=3300
CONFIG_CONS_INDEX=2
diff --git a/configs/Yones_Toptech_BD1078_defconfig b/configs/Yones_Toptech_BD1078_defconfig
index 84302ff..4f89d71 100644
--- a/configs/Yones_Toptech_BD1078_defconfig
+++ b/configs/Yones_Toptech_BD1078_defconfig
@@ -19,5 +19,5 @@
# CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig
index 26c73d9..2155092 100644
--- a/configs/am335x_baltos_defconfig
+++ b/configs/am335x_baltos_defconfig
@@ -18,13 +18,13 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index 3ffc4a9..e720e1d 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -19,7 +19,7 @@
CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_bootcmd"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_MUSB_NEW_SUPPORT=y
+CONFIG_SPL_MUSB_NEW=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_NET_SUPPORT=y
CONFIG_SPL_NET_VCI_STRING="AM33xx U-Boot SPL"
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index c48be6b..ef8de59 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -14,10 +14,10 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_FIT_IMAGE_TINY=y
-CONFIG_SPL_ETH_SUPPORT=y
+CONFIG_SPL_ETH=y
# CONFIG_SPL_FS_EXT4 is not set
CONFIG_SPL_MTD_SUPPORT=y
-CONFIG_SPL_MUSB_NEW_SUPPORT=y
+CONFIG_SPL_MUSB_NEW=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
@@ -37,7 +37,7 @@
CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:128k(NAND.SPL),128k(NAND.SPL.backup1),128k(NAND.SPL.backup2),128k(NAND.SPL.backup3),256k(NAND.u-boot-spl-os),1m(NAND.u-boot),128k(NAND.u-boot-env),128k(NAND.u-boot-env.backup1),8m(NAND.kernel),-(NAND.file-system)"
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
-CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2 am335x-pocketbeagle"
+CONFIG_OF_LIST="am335x-evm am335x-bone am335x-sancloud-bbe am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2 am335x-pocketbeagle"
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
@@ -67,6 +67,7 @@
CONFIG_PHY_ATHEROS=y
CONFIG_PHY_SMSC=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_MII=y
CONFIG_DRIVER_TI_CPSW=y
CONFIG_SPI=y
diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig
index 3921aac..fd495f2 100644
--- a/configs/am335x_guardian_defconfig
+++ b/configs/am335x_guardian_defconfig
@@ -11,7 +11,7 @@
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_GUARDIAN=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL=y
CONFIG_BOOTSTAGE_STASH_ADDR=0x0
@@ -29,15 +29,15 @@
CONFIG_SPL_SEPARATE_BSS=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_ETH_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_MUSB_NEW_SUPPORT=y
+CONFIG_SPL_ETH=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_MUSB_NEW=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_NET_SUPPORT=y
CONFIG_SPL_NET_VCI_STRING="Guardian U-Boot SPL"
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_ETHER=y
CONFIG_CMD_ASKENV=y
diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig
index 5b9b370..0ec6851 100644
--- a/configs/am335x_igep003x_defconfig
+++ b/configs/am335x_igep003x_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -20,7 +20,7 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
@@ -38,8 +38,8 @@
CONFIG_SPL_UBI_LOAD_KERNEL_ID=3
CONFIG_SPL_UBI_LOAD_ARGS_ID=4
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig
index 6315d44..0033879 100644
--- a/configs/am335x_pdu001_defconfig
+++ b/configs/am335x_pdu001_defconfig
@@ -22,9 +22,9 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_LATE_INIT=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_SPL_NAND_SUPPORT is not set
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig
index 1f6c7b7..0c4186d 100644
--- a/configs/am335x_shc_defconfig
+++ b/configs/am335x_shc_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x1000
@@ -27,11 +27,11 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_SYS_PROMPT="U-Boot# "
diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig
index 8d963b1..354586b 100644
--- a/configs/am335x_shc_ict_defconfig
+++ b/configs/am335x_shc_ict_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x1000
@@ -28,11 +28,11 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_SYS_PROMPT="U-Boot# "
diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig
index 6ac5485..43fef20 100644
--- a/configs/am335x_shc_netboot_defconfig
+++ b/configs/am335x_shc_netboot_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x1000
@@ -29,11 +29,11 @@
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_SYS_PROMPT="U-Boot# "
diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig
index c2f1f57..4010d83 100644
--- a/configs/am335x_shc_sdboot_defconfig
+++ b/configs/am335x_shc_sdboot_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x1000
@@ -28,11 +28,11 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_SYS_PROMPT="U-Boot# "
diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index 3df8c97..1f3b680 100644
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_OFFSET=0x0
@@ -23,7 +23,7 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MTD_SUPPORT=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_NAND_DRIVERS=y
@@ -32,8 +32,8 @@
CONFIG_SPL_NET_SUPPORT=y
CONFIG_SPL_NET_VCI_STRING="AM335x U-Boot SPL"
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index 504b38c..1234aa2 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -20,14 +20,14 @@
CONFIG_SPL_SEPARATE_BSS=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
-# CONFIG_SPL_I2C_SUPPORT is not set
+# CONFIG_SPL_I2C is not set
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_OS_BOOT=y
-# CONFIG_SPL_POWER_SUPPORT is not set
+# CONFIG_SPL_POWER is not set
CONFIG_SYS_PROMPT="AM3517_EVM # "
# CONFIG_CMD_IMI is not set
CONFIG_CMD_SPL=y
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index ae1fffd..5d35176 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -7,7 +7,7 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
CONFIG_AM43XX=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_LOAD_FIT=y
@@ -15,7 +15,7 @@
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_MISC_INIT_R is not set
-CONFIG_SPL_ETH_SUPPORT=y
+CONFIG_SPL_ETH=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
@@ -23,7 +23,7 @@
CONFIG_SPL_NET_SUPPORT=y
CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_ETHER=y
CONFIG_CMD_SPL=y
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig
index a3e55ce..98b07b9 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -19,7 +19,7 @@
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_STORAGE=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_ETHER=y
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 62c1ecb..43f4738 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -13,7 +13,7 @@
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000
CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
@@ -24,14 +24,14 @@
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_MISC_INIT_R is not set
-CONFIG_SPL_ETH_SUPPORT=y
+CONFIG_SPL_ETH=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_NET_SUPPORT=y
CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_ETHER=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig
index f766a11..eba6d33 100644
--- a/configs/am64x_evm_a53_defconfig
+++ b/configs/am64x_evm_a53_defconfig
@@ -8,13 +8,14 @@
CONFIG_K3_ATF_LOAD_ADDR=0x701c0000
CONFIG_TARGET_AM642_A53_EVM=y
CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0x680000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am642-evm"
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -29,16 +30,18 @@
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_STORAGE=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_DFU=y
@@ -46,6 +49,7 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
CONFIG_CMD_DM=y
+CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -56,10 +60,10 @@
CONFIG_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
-CONFIG_ENV_IS_NOWHERE=y
-CONFIG_ENV_IS_IN_FAT=y
-CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_MMC_ENV_DEV=0
+CONFIG_SYS_MMC_ENV_PART=1
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
@@ -81,6 +85,12 @@
CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_DM_MAILBOX=y
CONFIG_K3_SEC_PROXY=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_SPL_MMC_HS200_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_SPL_MMC_HS400_SUPPORT=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
@@ -130,4 +140,6 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0x6165
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_MASS_STORAGE=y
+CONFIG_FAT_WRITE=y
+CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig
index c207cdf..98e9aa4 100644
--- a/configs/am64x_evm_r5_defconfig
+++ b/configs/am64x_evm_r5_defconfig
@@ -1,20 +1,24 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x80000
CONFIG_SOC_K3_AM642=y
CONFIG_TARGET_AM642_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0x680000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am642-r5-evm"
-CONFIG_SPL_TEXT_BASE=0x70020000
+CONFIG_SPL_TEXT_BASE=0x70000000
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_MMC_ENV_DEV=0
+CONFIG_SYS_MMC_ENV_PART=1
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SIZE_LIMIT=0x190000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000
@@ -29,22 +33,24 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_BOARD_INIT=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_EARLY_BSS=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_REMOTEPROC=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_STORAGE=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_DFU=y
@@ -52,6 +58,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
+CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_USB=y
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 2d580f7..a92f0bf 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -15,7 +15,7 @@
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x6A0000
CONFIG_SPL_FS_FAT=y
@@ -39,7 +39,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
@@ -49,7 +49,7 @@
# CONFIG_SPL_SPI_FLASH_TINY is not set
CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_STORAGE=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_DFU=y
diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig
index 739ced8..637499f 100644
--- a/configs/am65x_evm_r5_defconfig
+++ b/configs/am65x_evm_r5_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x55000
@@ -16,7 +16,7 @@
CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SIZE_LIMIT=0x7ec00
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000
@@ -38,11 +38,11 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
CONFIG_SPL_DMA=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig
index 5bc713f..be68a4f 100644
--- a/configs/am65x_evm_r5_usbdfu_defconfig
+++ b/configs/am65x_evm_r5_usbdfu_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x55000
@@ -13,7 +13,7 @@
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -27,10 +27,10 @@
CONFIG_SPL_EARLY_BSS=y
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig
index e75852d..b8bee2f 100644
--- a/configs/am65x_evm_r5_usbmsc_defconfig
+++ b/configs/am65x_evm_r5_usbmsc_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x55000
@@ -13,7 +13,7 @@
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -26,15 +26,15 @@
CONFIG_SPL_EARLY_BSS=y
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_REMOTEPROC=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_STORAGE=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_YMODEM_SUPPORT=y
diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig
index 4e32eab..0b308ec 100644
--- a/configs/am65x_hs_evm_a53_defconfig
+++ b/configs/am65x_hs_evm_a53_defconfig
@@ -16,7 +16,7 @@
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x6A0000
CONFIG_SPL_FS_FAT=y
@@ -40,7 +40,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_DMA=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig
index 8f587ed..1dcf487 100644
--- a/configs/am65x_hs_evm_r5_defconfig
+++ b/configs/am65x_hs_evm_r5_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
CONFIG_TI_SECURE_DEVICE=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x55000
@@ -17,7 +17,7 @@
CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -35,11 +35,11 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
CONFIG_SPL_DMA=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index 0fc7cf0..a0e85ba 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -28,8 +28,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_DMA=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_SYS_PROMPT="Apalis iMX6 # "
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index cb64296..aa9197f 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_LDSCRIPT="arch/arm/cpu/u-boot-spl.lds"
CONFIG_SYS_TEXT_BASE=0x21000000
CONFIG_TARGET_TAURUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig
index b35f9ec..8311556 100644
--- a/configs/ba10_tv_box_defconfig
+++ b/configs/ba10_tv_box_defconfig
@@ -9,7 +9,7 @@
CONFIG_USB2_VBUS_PIN="PH12"
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig
index 777a249..4d95373 100644
--- a/configs/bananapi_m1_plus_defconfig
+++ b/configs/bananapi_m1_plus_defconfig
@@ -9,7 +9,7 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_NETCONSOLE=y
CONFIG_SCSI_AHCI=y
CONFIG_PHY_REALTEK=y
diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig
index e7d4076..16dd7fd 100644
--- a/configs/bananapi_m2_berry_defconfig
+++ b/configs/bananapi_m2_berry_defconfig
@@ -8,7 +8,7 @@
CONFIG_USB1_VBUS_PIN="PH23"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SCSI_AHCI=y
CONFIG_RGMII=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig
index dc7058e..d5aeb97 100644
--- a/configs/bg0900_defconfig
+++ b/configs/bg0900_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX28=y
CONFIG_SYS_TEXT_BASE=0x40002000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig
index bd4c4e5..683d0e7 100644
--- a/configs/brppt1_mmc_defconfig
+++ b/configs/brppt1_mmc_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
@@ -31,10 +31,10 @@
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_SPL_NAND_SUPPORT is not set
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig
index 9a01582..5bd5845 100644
--- a/configs/brppt1_nand_defconfig
+++ b/configs/brppt1_nand_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -30,12 +30,12 @@
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig
index e8699a9..2259edc 100644
--- a/configs/brppt1_spi_defconfig
+++ b/configs/brppt1_spi_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
@@ -37,12 +37,12 @@
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig
index f362aea..b01aa19 100644
--- a/configs/brppt2_defconfig
+++ b/configs/brppt2_defconfig
@@ -4,7 +4,7 @@
CONFIG_ARCH_MX6=y
CONFIG_SPL_LDSCRIPT="arch/arm/cpu/u-boot-spl.lds"
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x1000
@@ -33,7 +33,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig
index 830cd44..4a18eb8 100644
--- a/configs/brsmarc1_defconfig
+++ b/configs/brsmarc1_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -37,10 +37,10 @@
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig
index 757585e..bc8c5db 100644
--- a/configs/brxre1_defconfig
+++ b/configs/brxre1_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -31,9 +31,9 @@
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_SPL_NAND_SUPPORT is not set
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig
index 6373512..34aca6e 100644
--- a/configs/cgtqmx8_defconfig
+++ b/configs/cgtqmx8_defconfig
@@ -3,7 +3,7 @@
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_ARCH_IMX8=y
CONFIG_SYS_TEXT_BASE=0x80020000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=3
@@ -14,7 +14,7 @@
CONFIG_TARGET_CONGA_QMX8=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
@@ -25,9 +25,9 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=0
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_BOOTM_NETBSD is not set
diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig
index 3ab76d5..85302ad 100644
--- a/configs/chiliboard_defconfig
+++ b/configs/chiliboard_defconfig
@@ -21,12 +21,12 @@
CONFIG_DEFAULT_FDT_FILE="am335x-chiliboard.dtb"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
index 12cc3cc..271ae77 100644
--- a/configs/chromebook_bob_defconfig
+++ b/configs/chromebook_bob_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig
index b37292a..b48505a 100644
--- a/configs/chromebook_link64_defconfig
+++ b/configs/chromebook_link64_defconfig
@@ -33,7 +33,7 @@
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_CPU=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NET_SUPPORT=y
CONFIG_SPL_PCI=y
diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig
index 447e4e9..c2efe39 100644
--- a/configs/ci20_mmc_defconfig
+++ b/configs/ci20_mmc_defconfig
@@ -1,6 +1,6 @@
CONFIG_MIPS=y
CONFIG_SYS_TEXT_BASE=0x80010000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig
index 9fb1d67..f5d1460 100644
--- a/configs/cl-som-imx7_defconfig
+++ b/configs/cl-som-imx7_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -24,7 +24,7 @@
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CL-SOM-iMX7 # "
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index ad943a3..d8edc45 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -24,8 +24,7 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x1
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CMD_TLV_EEPROM=y
CONFIG_SPL_CMD_TLV_EEPROM=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig
index ee70188..c94d63e 100644
--- a/configs/clearfog_gt_8k_defconfig
+++ b/configs/clearfog_gt_8k_defconfig
@@ -58,6 +58,7 @@
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MVEBU=y
+CONFIG_PHY=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_8K=y
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index 2ef935d..2b7345e 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
@@ -29,9 +29,9 @@
CONFIG_PREBOOT="usb start;sf probe"
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="CM-FX6 # "
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_GREPENV=y
diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig
index 3112915..af8e786 100644
--- a/configs/cm_t335_defconfig
+++ b/configs/cm_t335_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x4000
@@ -17,13 +17,13 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_SYS_PROMPT="CM-T335 # "
CONFIG_CMD_ASKENV=y
diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig
index 3752ff5..1d2fba9 100644
--- a/configs/cm_t43_defconfig
+++ b/configs/cm_t43_defconfig
@@ -28,14 +28,14 @@
# CONFIG_MISC_INIT_R is not set
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x480
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MTD_SUPPORT=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_PROMPT="CM-T43 # "
CONFIG_CMD_ASKENV=y
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index 23cdea9..47b1cfb 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -27,8 +27,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_DMA=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_SYS_PROMPT="Colibri iMX6 # "
diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig
index 14577a4..bb1e095 100644
--- a/configs/controlcenterdc_defconfig
+++ b/configs/controlcenterdc_defconfig
@@ -2,14 +2,13 @@
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_CONTROLCENTERDC=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x30000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc"
CONFIG_SPL_TEXT_BASE=0x40000030
@@ -28,7 +27,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_LAST_STAGE_INIT=y
-CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_ELF is not set
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 9210493..42c0a48 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -5,7 +5,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x72000000
CONFIG_TARGET_CORVUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x800
diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig
index 2d07ddf..7f9d65f 100644
--- a/configs/db-88f6720_defconfig
+++ b/configs/db-88f6720_defconfig
@@ -10,7 +10,6 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_DEFAULT_DEVICE_TREE="armada-375-db"
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL_SUPPORT=y
@@ -24,7 +23,7 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CMD_I2C=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig
index 5eec998..96841d7 100644
--- a/configs/db-88f6820-amc_defconfig
+++ b/configs/db-88f6820-amc_defconfig
@@ -10,7 +10,6 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc"
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL_SUPPORT=y
@@ -25,7 +24,7 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index 74c9634..0ab8722 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -10,7 +10,6 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp"
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL_SUPPORT=y
@@ -24,8 +23,7 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index 0149290..a4345ba 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -10,7 +10,6 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp"
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL_SUPPORT=y
@@ -24,7 +23,7 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig
index 5318d7d..bd8064a 100644
--- a/configs/deneb_defconfig
+++ b/configs/deneb_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
CONFIG_SYS_TEXT_BASE=0x80020000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
@@ -16,7 +16,7 @@
CONFIG_TARGET_DENEB=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2000
CONFIG_OF_BOARD_SETUP=y
@@ -32,9 +32,9 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_CMD_CPU=y
diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig
index ef905ec..ed789b9 100644
--- a/configs/dh_imx6_defconfig
+++ b/configs/dh_imx6_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x1000
@@ -38,7 +38,7 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
CONFIG_CMD_DFU=y
diff --git a/configs/difrnce_dit4350_defconfig b/configs/difrnce_dit4350_defconfig
index 1679c08..24f4608 100644
--- a/configs/difrnce_dit4350_defconfig
+++ b/configs/difrnce_dit4350_defconfig
@@ -15,6 +15,6 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/display5_defconfig b/configs/display5_defconfig
index 53fe37c..744dbb5 100644
--- a/configs/display5_defconfig
+++ b/configs/display5_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x1000
@@ -40,10 +40,10 @@
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_SAVEENV=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="display5 > "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig
index d5fb73d..61ee4d2 100644
--- a/configs/display5_factory_defconfig
+++ b/configs/display5_factory_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x1000
@@ -37,13 +37,13 @@
CONFIG_MISC_INIT_R=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_DMA=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="display5 factory > "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/draco_defconfig b/configs/draco_defconfig
index 5d9a6aa..ef0136d 100644
--- a/configs/draco_defconfig
+++ b/configs/draco_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -31,13 +31,13 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_HUSH_PARSER=y
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 288182a..020d8b9 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -49,3 +49,7 @@
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
+CONFIG_DM_ETH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CMD_SATA=y
+CONFIG_SATA_MV=y
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index 030a85d..bfe2e5f 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -10,7 +10,6 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x7E0000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414"
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL_SUPPORT=y
@@ -24,7 +23,7 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
diff --git a/configs/dserve_dsrv9703c_defconfig b/configs/dserve_dsrv9703c_defconfig
index a232b90..8c6df75 100644
--- a/configs/dserve_dsrv9703c_defconfig
+++ b/configs/dserve_dsrv9703c_defconfig
@@ -14,5 +14,5 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig
index 36d96e5..42b7240 100644
--- a/configs/etamin_defconfig
+++ b/configs/etamin_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -32,13 +32,13 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_HUSH_PARSER=y
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index d3b52c1..f4b30ed 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -10,7 +10,7 @@
CONFIG_ROCKCHIP_PX30=y
CONFIG_TARGET_EVB_PX30=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index 3a5f1e7..50a4bc1 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -8,7 +8,7 @@
CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_TARGET_EVB_PX5=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL=y
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index f34f349..bd4a03a 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -7,7 +7,7 @@
CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
CONFIG_ROCKCHIP_RK3308=y
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_TARGET_EVB_RK3308=y
CONFIG_SPL_STACK_R_ADDR=0xc00000
CONFIG_DEBUG_UART_BASE=0xFF0C0000
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index fffabd6..7cc828f 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -8,7 +8,7 @@
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x4000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
CONFIG_DEBUG_UART_BASE=0xFF130000
@@ -28,7 +28,7 @@
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig
index 1f24f92..64744d5 100644
--- a/configs/firefly-px30_defconfig
+++ b/configs/firefly-px30_defconfig
@@ -11,7 +11,7 @@
CONFIG_TARGET_EVB_PX30=y
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig
index 89e9c2c..ae6dbfd 100644
--- a/configs/gardena-smart-gateway-at91sam_defconfig
+++ b/configs/gardena-smart-gateway-at91sam_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x22900000
CONFIG_TARGET_GARDENA_SMART_GATEWAY_AT91SAM=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig
index d3a628c..10d0187 100644
--- a/configs/ge_b1x5v2_defconfig
+++ b/configs/ge_b1x5v2_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
@@ -37,7 +37,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig
index 8b653be..61dfefd 100644
--- a/configs/giedi_defconfig
+++ b/configs/giedi_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
CONFIG_SYS_TEXT_BASE=0x80020000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
@@ -16,7 +16,7 @@
CONFIG_TARGET_GIEDI=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2000
CONFIG_OF_BOARD_SETUP=y
@@ -32,9 +32,9 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_CMD_CPU=y
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index 3190fbe..4017467 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -38,10 +38,10 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_FIT_IMAGE_TINY=y
CONFIG_SPL_DMA=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Ventana > "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig
index b11dc90..cbf1d3d 100644
--- a/configs/gwventana_gw5904_defconfig
+++ b/configs/gwventana_gw5904_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -38,10 +38,10 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_FIT_IMAGE_TINY=y
CONFIG_SPL_DMA=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Ventana > "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index 2b39f90..baeef2b 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -38,11 +38,11 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_FIT_IMAGE_TINY=y
CONFIG_SPL_DMA=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Ventana > "
CONFIG_CMD_BOOTZ=y
diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig
index c70787a..4e59360 100644
--- a/configs/helios4_defconfig
+++ b/configs/helios4_defconfig
@@ -24,8 +24,7 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x1
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CMD_TLV_EEPROM=y
CONFIG_SPL_CMD_TLV_EEPROM=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig
index 6347481..8f99db7 100644
--- a/configs/i12-tvbox_defconfig
+++ b/configs/i12-tvbox_defconfig
@@ -7,7 +7,7 @@
CONFIG_MACPWR="PH21"
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/iNet_3F_defconfig b/configs/iNet_3F_defconfig
index f8a95db..5efbf21 100644
--- a/configs/iNet_3F_defconfig
+++ b/configs/iNet_3F_defconfig
@@ -14,5 +14,5 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/iNet_3W_defconfig b/configs/iNet_3W_defconfig
index 019c5a8..4aeb19b 100644
--- a/configs/iNet_3W_defconfig
+++ b/configs/iNet_3W_defconfig
@@ -14,5 +14,5 @@
CONFIG_VIDEO_LCD_BL_EN="PH7"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/iNet_86VS_defconfig b/configs/iNet_86VS_defconfig
index b2462a3..b85df7f 100644
--- a/configs/iNet_86VS_defconfig
+++ b/configs/iNet_86VS_defconfig
@@ -13,6 +13,6 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig
index d33c390..e69c79f 100644
--- a/configs/icnova-a20-swac_defconfig
+++ b/configs/icnova-a20-swac_defconfig
@@ -13,7 +13,7 @@
CONFIG_VIDEO_LCD_POWER="PH22"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CMD_UNZIP=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig
index 7247ed9..970c265 100644
--- a/configs/imx28_xea_defconfig
+++ b/configs/imx28_xea_defconfig
@@ -2,7 +2,7 @@
CONFIG_SPL_SYS_THUMB_BUILD=y
CONFIG_ARCH_MX28=y
CONFIG_SYS_TEXT_BASE=0x40002000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x800
diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig
index 7b20d2b..fed8793 100644
--- a/configs/imx6dl_icore_nand_defconfig
+++ b/configs/imx6dl_icore_nand_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -23,7 +23,7 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl> "
CONFIG_CMD_MEMTEST=y
diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig
index bc5b9a7..3064a13 100644
--- a/configs/imx6q_icore_nand_defconfig
+++ b/configs/imx6q_icore_nand_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -24,7 +24,7 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl> "
CONFIG_CMD_MEMTEST=y
diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig
index c1abe70..ed8db74 100644
--- a/configs/imx6q_logic_defconfig
+++ b/configs/imx6q_logic_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -30,13 +30,13 @@
CONFIG_SPL_SEPARATE_BSS=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_DMA=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="i.MX6 Logic # "
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x1500000
diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig
index 3d931d1..d3191a2 100644
--- a/configs/imx6qdl_icore_mipi_defconfig
+++ b/configs/imx6qdl_icore_mipi_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -30,7 +30,7 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl-mipi> "
CONFIG_CMD_SPL=y
diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig
index 854a812..76375ae 100644
--- a/configs/imx6qdl_icore_mmc_defconfig
+++ b/configs/imx6qdl_icore_mmc_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -33,7 +33,7 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl> "
CONFIG_CMD_SPL=y
diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig
index bc5b9a7..3064a13 100644
--- a/configs/imx6qdl_icore_nand_defconfig
+++ b/configs/imx6qdl_icore_nand_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -24,7 +24,7 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl> "
CONFIG_CMD_MEMTEST=y
diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig
index c48260d..328e68d 100644
--- a/configs/imx6qdl_icore_rqs_defconfig
+++ b/configs/imx6qdl_icore_rqs_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -27,7 +27,7 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl-rqs> "
CONFIG_CMD_SPL=y
diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig
index 536e236..ebcccdd 100644
--- a/configs/imx6ul_geam_mmc_defconfig
+++ b/configs/imx6ul_geam_mmc_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -24,7 +24,7 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="geam6ul> "
CONFIG_CRC32_VERIFY=y
diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig
index 1b7be3b..8f9583d 100644
--- a/configs/imx6ul_geam_nand_defconfig
+++ b/configs/imx6ul_geam_nand_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -24,7 +24,7 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="geam6ul> "
CONFIG_CRC32_VERIFY=y
diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig
index a3e7768..18850f6 100644
--- a/configs/imx6ul_isiot_emmc_defconfig
+++ b/configs/imx6ul_isiot_emmc_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -24,7 +24,7 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="isiotmx6ul> "
CONFIG_CRC32_VERIFY=y
diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig
index 9631823..a29dac0 100644
--- a/configs/imx6ul_isiot_nand_defconfig
+++ b/configs/imx6ul_isiot_nand_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -24,7 +24,7 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="isiotmx6ul> "
CONFIG_CRC32_VERIFY=y
diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig
index 6220ebf..72a1dc2 100644
--- a/configs/imx7_cm_defconfig
+++ b/configs/imx7_cm_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -24,8 +24,8 @@
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="ask"
# CONFIG_BOARD_EARLY_INIT_F is not set
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig
index af584cd..79e4bde 100644
--- a/configs/imx8mm-cl-iot-gate_defconfig
+++ b/configs/imx8mm-cl-iot-gate_defconfig
@@ -3,7 +3,7 @@
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -18,7 +18,7 @@
CONFIG_TARGET_IMX8MM_CL_IOT_GATE=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
@@ -31,9 +31,9 @@
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_NVEDIT_EFI=y
diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
index 4b60fc8..abc4d65 100644
--- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -13,7 +13,7 @@
CONFIG_TARGET_IMX8MM_ICORE_MX8MM=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
@@ -25,7 +25,7 @@
CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb"
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
index 99c0179..5f45e33 100644
--- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -13,7 +13,7 @@
CONFIG_TARGET_IMX8MM_ICORE_MX8MM=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
@@ -25,7 +25,7 @@
CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb"
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig
index 6f272ef..78334c4 100644
--- a/configs/imx8mm_beacon_defconfig
+++ b/configs/imx8mm_beacon_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -16,7 +16,7 @@
CONFIG_TARGET_IMX8MM_BEACON=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_LTO=y
CONFIG_FIT=y
@@ -28,9 +28,9 @@
CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb"
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_CMD_EXPORTENV is not set
diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig
index a06c6f9..f7f39b8 100644
--- a/configs/imx8mm_evk_defconfig
+++ b/configs/imx8mm_evk_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -16,7 +16,7 @@
CONFIG_TARGET_IMX8MM_EVK=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
@@ -28,9 +28,9 @@
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig
index 49affcc..e10f1b2 100644
--- a/configs/imx8mm_venice_defconfig
+++ b/configs/imx8mm_venice_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -18,7 +18,7 @@
CONFIG_TARGET_IMX8MM_VENICE=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0xff8000
CONFIG_LTO=y
@@ -35,9 +35,9 @@
CONFIG_PREBOOT="gsc wd-disable"
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig
index 5fbcf70..8fec003 100644
--- a/configs/imx8mn_beacon_2g_defconfig
+++ b/configs/imx8mn_beacon_2g_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -19,7 +19,7 @@
CONFIG_TARGET_IMX8MN_BEACON=y
CONFIG_IMX8MN_BEACON_2GB_LPDDR=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
@@ -35,8 +35,8 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_BOOTM_NETBSD is not set
diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig
index bc5ce39..5296204 100644
--- a/configs/imx8mn_beacon_defconfig
+++ b/configs/imx8mn_beacon_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -18,7 +18,7 @@
CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BEACON=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
@@ -34,8 +34,8 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_BOOTM_NETBSD is not set
diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig
index 205757d..78943dd 100644
--- a/configs/imx8mn_ddr4_evk_defconfig
+++ b/configs/imx8mn_ddr4_evk_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -16,7 +16,7 @@
CONFIG_TARGET_IMX8MN_DDR4_EVK=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_DISTRO_DEFAULTS=y
@@ -31,8 +31,8 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig
index 469bef0..4b4a0d0 100644
--- a/configs/imx8mn_evk_defconfig
+++ b/configs/imx8mn_evk_defconfig
@@ -3,7 +3,7 @@
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -17,7 +17,7 @@
CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_EVK=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_DISTRO_DEFAULTS=y
@@ -33,9 +33,9 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig
index d0f390e..2c6fc16 100644
--- a/configs/imx8mp_evk_defconfig
+++ b/configs/imx8mp_evk_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -16,7 +16,7 @@
CONFIG_TARGET_IMX8MP_EVK=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_DISTRO_DEFAULTS=y
@@ -33,9 +33,9 @@
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig
index e11122e..e0a038b 100644
--- a/configs/imx8mq_cm_defconfig
+++ b/configs/imx8mq_cm_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x1000
@@ -26,7 +26,7 @@
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig
index 7589967..5c9e3e3 100644
--- a/configs/imx8qm_mek_defconfig
+++ b/configs/imx8qm_mek_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
CONFIG_SYS_TEXT_BASE=0x80020000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
@@ -16,7 +16,7 @@
CONFIG_TARGET_IMX8QM_MEK=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qm_mek/imximage.cfg"
@@ -26,9 +26,9 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_BOOTM_NETBSD is not set
diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig
index 7e1070f..3355635 100644
--- a/configs/imx8qm_rom7720_a1_4G_defconfig
+++ b/configs/imx8qm_rom7720_a1_4G_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
CONFIG_SYS_TEXT_BASE=0x80020000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
@@ -12,7 +12,7 @@
CONFIG_TARGET_IMX8QM_ROM7720_A1=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
@@ -23,9 +23,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_BOOTM_NETBSD is not set
diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig
index a8e8df7..888e84d 100644
--- a/configs/imx8qxp_mek_defconfig
+++ b/configs/imx8qxp_mek_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
CONFIG_SYS_TEXT_BASE=0x80020000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
@@ -16,7 +16,7 @@
CONFIG_TARGET_IMX8QXP_MEK=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qxp_mek/imximage.cfg"
@@ -26,7 +26,7 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig
index 79b25be..e53c5ca 100644
--- a/configs/imxrt1020-evk_defconfig
+++ b/configs/imxrt1020-evk_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMXRT=y
CONFIG_SYS_TEXT_BASE=0x80002000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig
index bbcbb98..6b302a7 100644
--- a/configs/imxrt1050-evk_defconfig
+++ b/configs/imxrt1050-evk_defconfig
@@ -3,7 +3,7 @@
# CONFIG_SPL_SYS_DCACHE_OFF is not set
CONFIG_ARCH_IMXRT=y
CONFIG_SYS_TEXT_BASE=0x80002000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
diff --git a/configs/inet1_defconfig b/configs/inet1_defconfig
index e267847..f9905d7 100644
--- a/configs/inet1_defconfig
+++ b/configs/inet1_defconfig
@@ -14,7 +14,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/inet97fv2_defconfig b/configs/inet97fv2_defconfig
index 69bd0f8..ebe5268 100644
--- a/configs/inet97fv2_defconfig
+++ b/configs/inet97fv2_defconfig
@@ -13,5 +13,5 @@
CONFIG_VIDEO_LCD_BL_EN="PH7"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/inet98v_rev2_defconfig b/configs/inet98v_rev2_defconfig
index 152b8a6..ad6f944 100644
--- a/configs/inet98v_rev2_defconfig
+++ b/configs/inet98v_rev2_defconfig
@@ -15,6 +15,6 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/inet9f_rev03_defconfig b/configs/inet9f_rev03_defconfig
index 049830b..b309d7f 100644
--- a/configs/inet9f_rev03_defconfig
+++ b/configs/inet9f_rev03_defconfig
@@ -13,5 +13,5 @@
CONFIG_VIDEO_LCD_BL_EN="PH7"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig
index 160c36d..b7578f8 100644
--- a/configs/j7200_evm_a72_defconfig
+++ b/configs/j7200_evm_a72_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
@@ -16,7 +16,7 @@
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x6A0000
CONFIG_SPL_FS_FAT=y
@@ -30,6 +30,7 @@
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_BOARD_SETUP=y
+CONFIG_PREBOOT="run main_cpsw0_qsgmii_phyinit;"
CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern"
CONFIG_LOGLEVEL=7
CONFIG_SPL_BOARD_INIT=y
@@ -40,13 +41,13 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
@@ -96,6 +97,7 @@
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_TI_SCI=y
+CONFIG_CLK_CCF=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
@@ -118,8 +120,8 @@
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
-CONFIG_MMC_HS200_SUPPORT=y
-CONFIG_SPL_MMC_HS200_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_SPL_MMC_HS400_SUPPORT=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
@@ -137,9 +139,15 @@
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_SPI_FLASH_MTD=y
+CONFIG_MULTIPLEXER=y
+CONFIG_MUX_MMIO=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_TI_AM65_CPSW_NUSS=y
+CONFIG_PHY=y
+CONFIG_SPL_PHY=y
+CONFIG_PHY_CADENCE_TORRENT=y
+CONFIG_PHY_J721E_WIZ=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig
index 8b14cea..74571cf 100644
--- a/configs/j7200_evm_r5_defconfig
+++ b/configs/j7200_evm_r5_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x70000
@@ -15,7 +15,7 @@
CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -37,13 +37,13 @@
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
@@ -92,7 +92,7 @@
CONFIG_FS_LOADER=y
CONFIG_K3_AVS0=y
CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_SPL_MMC_HS200_SUPPORT=y
+CONFIG_SPL_MMC_HS400_SUPPORT=y
CONFIG_MMC_SDHCI=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index 7f2eb1e..a8c6ab7 100644
--- a/configs/j721e_evm_a72_defconfig
+++ b/configs/j721e_evm_a72_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
@@ -16,7 +16,7 @@
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x6A0000
CONFIG_SPL_FS_FAT=y
@@ -39,11 +39,11 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
@@ -135,9 +135,15 @@
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_TI_DP83867=y
+CONFIG_MULTIPLEXER=y
+CONFIG_MUX_MMIO=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_TI_AM65_CPSW_NUSS=y
+CONFIG_PHY=y
+CONFIG_SPL_PHY=y
+CONFIG_PHY_CADENCE_SIERRA=y
+CONFIG_PHY_J721E_WIZ=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig
index 26775b3..0651fd3 100644
--- a/configs/j721e_evm_r5_defconfig
+++ b/configs/j721e_evm_r5_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x70000
@@ -15,7 +15,7 @@
CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -37,11 +37,11 @@
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
@@ -113,7 +113,6 @@
CONFIG_DM_REGULATOR_TPS65941=y
CONFIG_K3_SYSTEM_CONTROLLER=y
CONFIG_REMOTEPROC_TI_K3_ARM64=y
-CONFIG_REMOTEPROC_TI_K3_R5F=y
CONFIG_DM_RESET=y
CONFIG_RESET_TI_SCI=y
CONFIG_DM_SERIAL=y
diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig
index 8782551..53a24f4 100644
--- a/configs/j721e_hs_evm_a72_defconfig
+++ b/configs/j721e_hs_evm_a72_defconfig
@@ -15,7 +15,7 @@
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x700000
CONFIG_SPL_FS_FAT=y
@@ -37,11 +37,11 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
# CONFIG_SPL_SPI_FLASH_TINY is not set
CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig
index 7842df9..d713f42 100644
--- a/configs/j721e_hs_evm_r5_defconfig
+++ b/configs/j721e_hs_evm_r5_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
CONFIG_TI_SECURE_DEVICE=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x55000
@@ -16,7 +16,7 @@
CONFIG_SPL_TEXT_BASE=0x41c00000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x700000
CONFIG_SPL_FS_FAT=y
@@ -35,11 +35,11 @@
CONFIG_SPL_EARLY_BSS=y
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig
index c4b5d0c..1e252ea 100644
--- a/configs/jesurun_q5_defconfig
+++ b/configs/jesurun_q5_defconfig
@@ -8,7 +8,7 @@
CONFIG_USB0_VBUS_PIN="PB9"
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_MII=y
CONFIG_SUN4I_EMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index f095f97..e74b055 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -23,12 +23,12 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_CMD_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 01df882..0afddb9 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -22,11 +22,11 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_CMD_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index 312e392..d8c060d 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -23,12 +23,12 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_CMD_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 35b9396..73e96fe 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -23,12 +23,12 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_CMD_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig
index ed72d59..96c1061 100644
--- a/configs/kp_imx6q_tpc_defconfig
+++ b/configs/kp_imx6q_tpc_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2200
@@ -30,8 +30,8 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
# CONFIG_CMD_ELF is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index a1c01d3..5f7d101 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -9,7 +9,7 @@
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xFF180000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -35,7 +35,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
CONFIG_SPL_ATF=y
CONFIG_TPL=y
-CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig
index dbad009..a04cfdb 100644
--- a/configs/liteboard_defconfig
+++ b/configs/liteboard_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -22,7 +22,7 @@
CONFIG_BOOTDELAY=1
CONFIG_DEFAULT_FDT_FILE="imx6ul-liteboard.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index a1c1847..072a1e6 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -13,7 +13,7 @@
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_FIT=y
@@ -30,10 +30,10 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index 738ddcd..50ba009 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -14,7 +14,7 @@
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_FIT=y
@@ -29,9 +29,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index 280c231..0c74e9b 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -14,7 +14,7 @@
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_FIT=y
@@ -29,9 +29,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig
index 34a48b4..8cc0360 100644
--- a/configs/ls1021atsn_sdcard_defconfig
+++ b/configs/ls1021atsn_sdcard_defconfig
@@ -25,9 +25,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DM=y
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index 24d6193..78196e6 100644
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -13,7 +13,7 @@
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
@@ -30,12 +30,12 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
-CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_CRYPTO=y
CONFIG_SPL_HASH_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index f44d72c..67b83b7 100644
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -32,9 +32,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index 12a5ab8..c82c297 100644
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -32,9 +32,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index 3fde330..0bc4327 100644
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -14,7 +14,7 @@
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -31,10 +31,10 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index 24e7442..8e780b3 100644
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -15,7 +15,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -32,9 +32,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index 3c798dd..2cb088c 100644
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -15,7 +15,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -32,9 +32,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index 82ae5a1..3736445 100644
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -11,7 +11,7 @@
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
@@ -26,12 +26,12 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
-CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_CRYPTO=y
CONFIG_SPL_HASH_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index e412ff0..7bc186a 100644
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -11,7 +11,7 @@
CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
@@ -28,10 +28,10 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index 833cad7..b879a0c 100644
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -12,7 +12,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
@@ -26,11 +26,11 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
-CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_CRYPTO=y
CONFIG_SPL_HASH_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_SPL=y
CONFIG_CMD_DM=y
diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index f065752..c91f9df 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -12,7 +12,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
@@ -29,7 +29,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_SPL=y
CONFIG_CMD_DM=y
diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig
index b4017368..15f8d45 100644
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@@ -15,7 +15,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -33,9 +33,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig
index 2e4bcd8..3278cd2 100644
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ b/configs/ls1046aqds_sdcard_qspi_defconfig
@@ -15,7 +15,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -33,9 +33,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig
index 19e178a..eeb6e93 100644
--- a/configs/ls1046ardb_emmc_defconfig
+++ b/configs/ls1046ardb_emmc_defconfig
@@ -12,7 +12,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -30,9 +30,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig
index feabaa1..45ee904 100644
--- a/configs/ls1046ardb_qspi_spl_defconfig
+++ b/configs/ls1046ardb_qspi_spl_defconfig
@@ -14,7 +14,7 @@
CONFIG_SPL_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -29,12 +29,12 @@
CONFIG_MISC_INIT_R=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_OS_BASE=0x40980000
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_SPL=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
index e415aed..c46d0db 100644
--- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
@@ -12,7 +12,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
@@ -26,12 +26,12 @@
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
-CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_CRYPTO=y
CONFIG_SPL_HASH_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig
index a441d15..cd53d48 100644
--- a/configs/ls1046ardb_sdcard_defconfig
+++ b/configs/ls1046ardb_sdcard_defconfig
@@ -12,7 +12,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -29,9 +29,9 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig
index e33ede2..10e1fec 100644
--- a/configs/ls1088aqds_sdcard_ifc_defconfig
+++ b/configs/ls1088aqds_sdcard_ifc_defconfig
@@ -16,7 +16,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_F is not set
@@ -30,7 +30,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig
index edb8f56..a802311 100644
--- a/configs/ls1088aqds_sdcard_qspi_defconfig
+++ b/configs/ls1088aqds_sdcard_qspi_defconfig
@@ -16,7 +16,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -33,7 +33,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
index bdbccdd..96d4479 100644
--- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
@@ -16,7 +16,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_F is not set
@@ -32,10 +32,10 @@
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
-CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_CRYPTO=y
CONFIG_SPL_HASH_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig
index 27437fc..28affca 100644
--- a/configs/ls1088ardb_sdcard_qspi_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_defconfig
@@ -16,7 +16,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -34,7 +34,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index c39fc37..e4c7a30 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -11,7 +11,7 @@
CONFIG_SPL_TEXT_BASE=0x1800a000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_FIT=y
@@ -24,7 +24,7 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig
index 155cfa3..29df680 100644
--- a/configs/ls2080aqds_sdcard_defconfig
+++ b/configs/ls2080aqds_sdcard_defconfig
@@ -13,7 +13,7 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_FIT_VERBOSE=y
@@ -28,7 +28,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_I2C=y
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index 07dd149..6615958 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -11,7 +11,7 @@
CONFIG_SPL_TEXT_BASE=0x1800a000
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_FIT=y
@@ -25,7 +25,7 @@
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_CMD_IMLS=y
diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig
index ba9ec7b..505dd07 100644
--- a/configs/m53menlo_defconfig
+++ b/configs/m53menlo_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
CONFIG_SYS_TEXT_BASE=0x71000000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
@@ -30,7 +30,7 @@
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_NAND_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index e754108..f4e493c 100644
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -10,7 +10,6 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm"
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL_SUPPORT=y
@@ -23,7 +22,7 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CMD_I2C=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig
index 4dfd516..2c82e3c 100644
--- a/configs/mccmon6_nor_defconfig
+++ b/configs/mccmon6_nor_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig
index a2d3e44..5c1aea8 100644
--- a/configs/mccmon6_sd_defconfig
+++ b/configs/mccmon6_sd_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000
diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig
index 12e053c..082f461 100644
--- a/configs/mk802_a10s_defconfig
+++ b/configs/mk802_a10s_defconfig
@@ -7,7 +7,7 @@
CONFIG_DRAM_EMR1=0
CONFIG_USB1_VBUS_PIN="PB10"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_AXP152_POWER=y
CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig
index 5fa93c1..38b00b2 100644
--- a/configs/mk802ii_defconfig
+++ b/configs/mk802ii_defconfig
@@ -4,6 +4,6 @@
CONFIG_SPL=y
CONFIG_MACH_SUN4I=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig
index cc0e263..43e7070 100644
--- a/configs/mt7629_rfb_defconfig
+++ b/configs/mt7629_rfb_defconfig
@@ -10,7 +10,7 @@
CONFIG_SPL_TEXT_BASE=0x201000
CONFIG_TARGET_MT7629=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x40800000
CONFIG_SPL_PAYLOAD="u-boot-lzma.img"
CONFIG_BUILD_TARGET="u-boot-mtk.bin"
@@ -24,7 +24,7 @@
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_NOR_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTMENU=y
diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig
index 7acb8fe..e1075d7 100644
--- a/configs/mvebu_crb_cn9130_defconfig
+++ b/configs/mvebu_crb_cn9130_defconfig
@@ -64,6 +64,7 @@
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MVEBU=y
+CONFIG_PHY=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_8K=y
diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig
index a957857..bc92fdb 100644
--- a/configs/mvebu_db-88f3720_defconfig
+++ b/configs/mvebu_db-88f3720_defconfig
@@ -59,6 +59,7 @@
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_PCI_AARDVARK=y
+CONFIG_PHY=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_37XX=y
diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig
index 1ae7ea7..adcc5d1 100644
--- a/configs/mvebu_db_armada8k_defconfig
+++ b/configs/mvebu_db_armada8k_defconfig
@@ -53,6 +53,7 @@
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MVEBU=y
+CONFIG_PHY=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_8K=y
diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig
index 73e778c..0ab1cc8 100644
--- a/configs/mvebu_db_cn9130_defconfig
+++ b/configs/mvebu_db_cn9130_defconfig
@@ -68,6 +68,7 @@
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MVEBU=y
+CONFIG_PHY=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_8K=y
diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig
index 8ddc08d..c8ae0cf 100644
--- a/configs/mvebu_espressobin-88f3720_defconfig
+++ b/configs/mvebu_espressobin-88f3720_defconfig
@@ -72,6 +72,7 @@
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCI_AARDVARK=y
+CONFIG_PHY=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_37XX=y
diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig
index cc45999..7fd9e25 100644
--- a/configs/mvebu_mcbin-88f8040_defconfig
+++ b/configs/mvebu_mcbin-88f8040_defconfig
@@ -58,6 +58,7 @@
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MVEBU=y
+CONFIG_PHY=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_8K=y
diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig
index c682216..5653f92 100644
--- a/configs/mvebu_puzzle-m801-88f8040_defconfig
+++ b/configs/mvebu_puzzle-m801-88f8040_defconfig
@@ -62,6 +62,7 @@
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_DW_MVEBU=y
+CONFIG_PHY=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_8K=y
diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig
index bfaa4a2..5805205 100644
--- a/configs/mx23_olinuxino_defconfig
+++ b/configs/mx23_olinuxino_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX23=y
CONFIG_SYS_TEXT_BASE=0x40002000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig
index 47fa059..ab45a9c 100644
--- a/configs/mx23evk_defconfig
+++ b/configs/mx23evk_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX23=y
CONFIG_SYS_TEXT_BASE=0x40002000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig
index 3b916ad..1f61dda 100644
--- a/configs/mx28evk_auart_console_defconfig
+++ b/configs/mx28evk_auart_console_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX28=y
CONFIG_SYS_TEXT_BASE=0x40002000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig
index 3128af7..300ab08 100644
--- a/configs/mx28evk_defconfig
+++ b/configs/mx28evk_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX28=y
CONFIG_SYS_TEXT_BASE=0x40002000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig
index 7a96d7d..e40f83f 100644
--- a/configs/mx28evk_nand_defconfig
+++ b/configs/mx28evk_nand_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX28=y
CONFIG_SYS_TEXT_BASE=0x40002000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig
index 7caefa8..577515e 100644
--- a/configs/mx28evk_spi_defconfig
+++ b/configs/mx28evk_spi_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX28=y
CONFIG_SYS_TEXT_BASE=0x40002000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index c2b8671..dd2710f 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -28,8 +28,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig
index a860fbe..a1ee10f 100644
--- a/configs/mx6memcal_defconfig
+++ b/configs/mx6memcal_defconfig
@@ -15,8 +15,8 @@
CONFIG_SPL=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL"
-CONFIG_SPL_USB_HOST_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index 6c2997e..1059c5a 100644
--- a/configs/mx6sabreauto_defconfig
+++ b/configs/mx6sabreauto_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
@@ -31,11 +31,11 @@
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_FIT_IMAGE_TINY=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DFU=y
diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig
index 8df4afd..61e9054 100644
--- a/configs/mx6sabresd_defconfig
+++ b/configs/mx6sabresd_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
@@ -29,10 +29,10 @@
CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_FIT_IMAGE_TINY=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig
index c67eb4b..987573f 100644
--- a/configs/mx6slevk_spl_defconfig
+++ b/configs/mx6slevk_spl_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -21,8 +21,8 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig
index 26280fb..d28b6f6 100644
--- a/configs/mx6ul_14x14_evk_defconfig
+++ b/configs/mx6ul_14x14_evk_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -24,11 +24,11 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig
index 150dbaf..1425724 100644
--- a/configs/mx6ul_9x9_evk_defconfig
+++ b/configs/mx6ul_9x9_evk_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -24,8 +24,8 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig
index 3c93f58..d7a68d6 100644
--- a/configs/myir_mys_6ulx_defconfig
+++ b/configs/myir_mys_6ulx_defconfig
@@ -22,9 +22,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig
index 5299626..0dfac0a 100644
--- a/configs/nanopi-r2s-rk3328_defconfig
+++ b/configs/nanopi-r2s-rk3328_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s"
@@ -9,7 +9,7 @@
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_DEBUG_UART_BASE=0xFF130000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -26,8 +26,8 @@
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_TPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index b24ac93..2efa144 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -29,8 +29,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPIO=y
diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig
index 7cb32f1..aafec84 100644
--- a/configs/odroid-go2_defconfig
+++ b/configs/odroid-go2_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_ODROID_GO2=y
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -34,8 +34,8 @@
CONFIG_SPL_STACK_R=y
# CONFIG_TPL_BANNER_PRINT is not set
CONFIG_SPL_CRC32=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_ATF=y
# CONFIG_TPL_FRAMEWORK is not set
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig
index aed1f6f..8b0c943 100644
--- a/configs/omap35_logic_defconfig
+++ b/configs/omap35_logic_defconfig
@@ -4,7 +4,7 @@
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TI_COMMON_CMD_OPTIONS=y
-# CONFIG_SPL_GPIO_SUPPORT is not set
+# CONFIG_SPL_GPIO is not set
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-35xx-devkit"
@@ -23,7 +23,7 @@
CONFIG_SPL_SEPARATE_BSS=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
-# CONFIG_SPL_I2C_SUPPORT is not set
+# CONFIG_SPL_I2C is not set
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig
index e300b2c..2ab9255 100644
--- a/configs/omap35_logic_somlv_defconfig
+++ b/configs/omap35_logic_somlv_defconfig
@@ -4,7 +4,7 @@
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TI_COMMON_CMD_OPTIONS=y
-# CONFIG_SPL_GPIO_SUPPORT is not set
+# CONFIG_SPL_GPIO is not set
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-35xx-devkit"
@@ -23,14 +23,14 @@
CONFIG_SPL_SEPARATE_BSS=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
-# CONFIG_SPL_I2C_SUPPORT is not set
+# CONFIG_SPL_I2C is not set
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_OS_BOOT=y
-# CONFIG_SPL_POWER_SUPPORT is not set
+# CONFIG_SPL_POWER is not set
CONFIG_SYS_PROMPT="OMAP Logic # "
# CONFIG_CMD_IMI is not set
CONFIG_CMD_SPL=y
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index b3f7638..ec7a8a6 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -4,7 +4,7 @@
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TI_COMMON_CMD_OPTIONS=y
-# CONFIG_SPL_GPIO_SUPPORT is not set
+# CONFIG_SPL_GPIO is not set
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit"
@@ -23,7 +23,7 @@
CONFIG_SPL_SEPARATE_BSS=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
-# CONFIG_SPL_I2C_SUPPORT is not set
+# CONFIG_SPL_I2C is not set
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig
index aa8d4ce..f2e9d20 100644
--- a/configs/omap3_logic_somlv_defconfig
+++ b/configs/omap3_logic_somlv_defconfig
@@ -4,7 +4,7 @@
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TI_COMMON_CMD_OPTIONS=y
-# CONFIG_SPL_GPIO_SUPPORT is not set
+# CONFIG_SPL_GPIO is not set
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-37xx-devkit"
@@ -23,14 +23,14 @@
CONFIG_SPL_SEPARATE_BSS=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_FS_EXT4 is not set
-# CONFIG_SPL_I2C_SUPPORT is not set
+# CONFIG_SPL_I2C is not set
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_OS_BOOT=y
-# CONFIG_SPL_POWER_SUPPORT is not set
+# CONFIG_SPL_POWER is not set
CONFIG_SYS_PROMPT="OMAP Logic # "
# CONFIG_CMD_IMI is not set
CONFIG_CMD_SPL=y
diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig
index 60ea53a..3585566 100644
--- a/configs/omap4_panda_defconfig
+++ b/configs/omap4_panda_defconfig
@@ -12,7 +12,7 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_SPL_FS_EXT4 is not set
-# CONFIG_SPL_I2C_SUPPORT is not set
+# CONFIG_SPL_I2C is not set
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_OS_BOOT=y
CONFIG_CMD_SPL=y
diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig
index 4231bf3..1710277 100644
--- a/configs/omap4_sdp4430_defconfig
+++ b/configs/omap4_sdp4430_defconfig
@@ -15,7 +15,7 @@
CONFIG_DEFAULT_FDT_FILE="omap4-sdp.dtb"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_SPL_I2C_SUPPORT is not set
+# CONFIG_SPL_I2C is not set
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GPIO=y
diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig
index 458cf5c..1e8d56e 100644
--- a/configs/opos6uldev_defconfig
+++ b/configs/opos6uldev_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -29,7 +29,7 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="BIOS> "
diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig
index 6f8ceb0..efb7e8c 100644
--- a/configs/orangepi_2_defconfig
+++ b/configs/orangepi_2_defconfig
@@ -7,7 +7,7 @@
CONFIG_DRAM_CLK=672
CONFIG_USB1_VBUS_PIN="PG13"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig
index 528e5f3..f17241f 100644
--- a/configs/orangepi_pc2_defconfig
+++ b/configs/orangepi_pc2_defconfig
@@ -8,7 +8,7 @@
CONFIG_MACPWR="PD6"
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_SY8106A_VOUT1_VOLT=1100
diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig
index f971ed1..622cac0 100644
--- a/configs/orangepi_pc_defconfig
+++ b/configs/orangepi_pc_defconfig
@@ -5,7 +5,7 @@
CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=624
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig
index 04ecf15..3aeb2de 100644
--- a/configs/orangepi_pc_plus_defconfig
+++ b/configs/orangepi_pc_plus_defconfig
@@ -6,7 +6,7 @@
CONFIG_DRAM_CLK=624
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig
index 21f3c73..bce2f5f 100644
--- a/configs/orangepi_plus2e_defconfig
+++ b/configs/orangepi_plus2e_defconfig
@@ -7,7 +7,7 @@
CONFIG_MACPWR="PD6"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig
index b17f640..7f778c7 100644
--- a/configs/orangepi_plus_defconfig
+++ b/configs/orangepi_plus_defconfig
@@ -9,7 +9,7 @@
CONFIG_USB1_VBUS_PIN="PG13"
CONFIG_SATAPWR="PG11"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig
index 72574a8..5334ff7 100644
--- a/configs/orangepi_zero2_defconfig
+++ b/configs/orangepi_zero2_defconfig
@@ -10,6 +10,6 @@
CONFIG_MMC0_CD_PIN="PF6"
CONFIG_R_I2C_ENABLE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_PHY_REALTEK=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig
index 3f14326..40ff3f2 100644
--- a/configs/pcm058_defconfig
+++ b/configs/pcm058_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -37,7 +37,7 @@
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig
index ec885dc..966fc1f 100644
--- a/configs/phycore-am335x-r2-regor_defconfig
+++ b/configs/phycore-am335x-r2-regor_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_OFFSET=0xA0000
@@ -21,12 +21,12 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig
index 77ce723..4718359 100644
--- a/configs/phycore-am335x-r2-wega_defconfig
+++ b/configs/phycore-am335x-r2-wega_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_OFFSET=0xA0000
@@ -21,12 +21,12 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig
index 21514fa..7892cd4 100644
--- a/configs/phycore-imx8mm_defconfig
+++ b/configs/phycore-imx8mm_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -16,7 +16,7 @@
CONFIG_TARGET_PHYCORE_IMX8MM=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x3E0000
CONFIG_FIT=y
@@ -29,9 +29,9 @@
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_CMD_EXPORTENV is not set
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index 32d538c..84a0a5c 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -14,7 +14,7 @@
CONFIG_TARGET_PHYCORE_IMX8MP=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_FIT=y
@@ -29,9 +29,9 @@
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_CMD_EXPORTENV is not set
diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig
index 346fae0..a74a7a3 100644
--- a/configs/phycore_pcl063_defconfig
+++ b/configs/phycore_pcl063_defconfig
@@ -19,8 +19,8 @@
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig
index 2520c89..c2a83d4 100644
--- a/configs/phycore_pcl063_ull_defconfig
+++ b/configs/phycore_pcl063_ull_defconfig
@@ -18,8 +18,8 @@
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig
index 77208a3..673911c 100644
--- a/configs/pico-dwarf-imx6ul_defconfig
+++ b/configs/pico-dwarf-imx6ul_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -23,7 +23,7 @@
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-dwarf.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_CMD_BOOTMENU=y
diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig
index 169a0da..1ef415f 100644
--- a/configs/pico-dwarf-imx7d_defconfig
+++ b/configs/pico-dwarf-imx7d_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -19,8 +19,8 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb"
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig
index 49cfc09..0c11d0c 100644
--- a/configs/pico-hobbit-imx6ul_defconfig
+++ b/configs/pico-hobbit-imx6ul_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -24,7 +24,7 @@
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-hobbit.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_CMD_BOOTMENU=y
diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig
index 7aecb7c..64a76a9 100644
--- a/configs/pico-hobbit-imx7d_defconfig
+++ b/configs/pico-hobbit-imx7d_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -19,8 +19,8 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx7d-pico-hobbit.dtb"
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig
index ad9221e..c3cd660 100644
--- a/configs/pico-imx6_defconfig
+++ b/configs/pico-imx6_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -28,10 +28,10 @@
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_FIT_IMAGE_TINY=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_WRITE_SIZE=0x20000
diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig
index 34cdf85..f027c86 100644
--- a/configs/pico-imx6ul_defconfig
+++ b/configs/pico-imx6ul_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -24,7 +24,7 @@
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="ask"
CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_CMD_BOOTMENU=y
diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig
index 9970eeb..4657d51 100644
--- a/configs/pico-imx7d_bl33_defconfig
+++ b/configs/pico-imx7d_bl33_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MEMTEST_START=0x80000000
@@ -18,8 +18,8 @@
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig
index f8a80f2..c682948 100644
--- a/configs/pico-imx7d_defconfig
+++ b/configs/pico-imx7d_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -19,8 +19,8 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="ask"
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig
index 169a0da..1ef415f 100644
--- a/configs/pico-nymph-imx7d_defconfig
+++ b/configs/pico-nymph-imx7d_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -19,8 +19,8 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb"
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig
index be161e0..93606bf 100644
--- a/configs/pico-pi-imx6ul_defconfig
+++ b/configs/pico-pi-imx6ul_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -24,7 +24,7 @@
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-pi.dtb"
CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_CMD_BOOTMENU=y
diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig
index 3f62372..8d66893 100644
--- a/configs/pico-pi-imx7d_defconfig
+++ b/configs/pico-pi-imx7d_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -19,8 +19,8 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx7d-pico-pi.dtb"
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig
index 4b7b410..abe2997 100644
--- a/configs/pinecube_defconfig
+++ b/configs/pinecube_defconfig
@@ -7,7 +7,7 @@
CONFIG_DRAM_CLK=504
CONFIG_DRAM_ODT_EN=y
CONFIG_I2C0_ENABLE=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
# CONFIG_NETDEVICES is not set
CONFIG_AXP209_POWER=y
CONFIG_AXP_DCDC2_VOLT=1250
diff --git a/configs/pov_protab2_ips9_defconfig b/configs/pov_protab2_ips9_defconfig
index 46dc6b9..1f9b3e0 100644
--- a/configs/pov_protab2_ips9_defconfig
+++ b/configs/pov_protab2_ips9_defconfig
@@ -14,5 +14,5 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 1466090..71536b0 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
@@ -22,8 +22,8 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig
index 0b30ef6..aed790b 100644
--- a/configs/px30-core-ctouch2-px30_defconfig
+++ b/configs/px30-core-ctouch2-px30_defconfig
@@ -11,7 +11,7 @@
CONFIG_TARGET_PX30_CORE=y
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig
index 46a4fb9..0340039 100644
--- a/configs/px30-core-edimm2.2-px30_defconfig
+++ b/configs/px30-core-edimm2.2-px30_defconfig
@@ -11,7 +11,7 @@
CONFIG_TARGET_PX30_CORE=y
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index 44e9dc7..c8c0f8b 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -31,13 +31,13 @@
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig
index 1fc5194..3319f38 100644
--- a/configs/q8_a13_tablet_defconfig
+++ b/configs/q8_a13_tablet_defconfig
@@ -15,6 +15,6 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CONS_INDEX=2
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig
index 500a454..cad22615 100644
--- a/configs/r7-tv-dongle_defconfig
+++ b/configs/r7-tv-dongle_defconfig
@@ -6,7 +6,7 @@
CONFIG_DRAM_CLK=384
CONFIG_USB1_VBUS_PIN="PG13"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_AXP152_POWER=y
CONFIG_CONS_INDEX=2
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig
index 5401892..9393f27 100644
--- a/configs/rastaban_defconfig
+++ b/configs/rastaban_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -31,13 +31,13 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_HUSH_PARSER=y
diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig
index 0e487b9..2f45536 100644
--- a/configs/riotboard_defconfig
+++ b/configs/riotboard_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig
index 77eaefc..257893e 100644
--- a/configs/roc-cc-rk3308_defconfig
+++ b/configs/roc-cc-rk3308_defconfig
@@ -7,7 +7,7 @@
CONFIG_DEFAULT_DEVICE_TREE="rk3308-roc-cc"
CONFIG_ROCKCHIP_RK3308=y
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_TARGET_ROC_RK3308_CC=y
CONFIG_SPL_STACK_R_ADDR=0xc00000
CONFIG_DEBUG_UART_BASE=0xFF0C0000
diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
index 8ddde6b..4351a5f 100644
--- a/configs/roc-cc-rk3328_defconfig
+++ b/configs/roc-cc-rk3328_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3328-roc-cc"
@@ -9,7 +9,7 @@
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_DEBUG_UART_BASE=0xFF130000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -26,8 +26,8 @@
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_TPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig
index d2372cb..8d0f570 100644
--- a/configs/roc-pc-mezzanine-rk3399_defconfig
+++ b/configs/roc-pc-mezzanine-rk3399_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x3F8000
diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index 0c647e0..4e5c904 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x3F8000
diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig
index ce932ac..4816b1e 100644
--- a/configs/rock-pi-e-rk3328_defconfig
+++ b/configs/rock-pi-e-rk3328_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e"
@@ -9,7 +9,7 @@
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x4000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
CONFIG_DEBUG_UART_BASE=0xFF130000
@@ -28,11 +28,11 @@
CONFIG_TPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig
index 14740df..e5df677 100644
--- a/configs/rock-pi-n10-rk3399pro_defconfig
+++ b/configs/rock-pi-n10-rk3399pro_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-rock-pi-n10"
diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
index 9653848..f0ef1e5 100644
--- a/configs/rock64-rk3328_defconfig
+++ b/configs/rock64-rk3328_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64"
@@ -9,7 +9,7 @@
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_DEBUG_UART_BASE=0xFF130000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -26,8 +26,8 @@
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_TPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index 91da734..4c2328a 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -31,13 +31,13 @@
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig
index 34f259f..2d13dc2 100644
--- a/configs/sama5d27_giantboard_defconfig
+++ b/configs/sama5d27_giantboard_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAMA5D27_SOM1_EK=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -14,7 +14,7 @@
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf8020000
diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig
index 4d00bb0..0326cd3 100644
--- a/configs/sama5d27_som1_ek_mmc1_defconfig
+++ b/configs/sama5d27_som1_ek_mmc1_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAMA5D27_SOM1_EK=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -13,7 +13,7 @@
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf8020000
diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig
index 920e351..c606c8a 100644
--- a/configs/sama5d27_som1_ek_mmc_defconfig
+++ b/configs/sama5d27_som1_ek_mmc_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAMA5D27_SOM1_EK=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -14,7 +14,7 @@
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf8020000
diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig
index e832c90..33a0cad 100644
--- a/configs/sama5d27_som1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_som1_ek_qspiflash_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAMA5D27_SOM1_EK=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -14,7 +14,7 @@
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf8020000
diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig
index 5bcf671..e88b079 100644
--- a/configs/sama5d27_wlsom1_ek_mmc_defconfig
+++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig
@@ -2,7 +2,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D27_WLSOM1_EK=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -12,7 +12,7 @@
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf801c000
diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
index 61189d6..63c8535 100644
--- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
@@ -2,7 +2,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D27_WLSOM1_EK=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -13,7 +13,7 @@
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek"
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf801c000
diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig
index d4d2d05..54f5a31 100644
--- a/configs/sama5d2_icp_mmc_defconfig
+++ b/configs/sama5d2_icp_mmc_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_ICP=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -12,7 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_icp"
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf801c000
diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig
index 69b3062..9bf34b8 100644
--- a/configs/sama5d2_xplained_emmc_defconfig
+++ b/configs/sama5d2_xplained_emmc_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_XPLAINED=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -13,7 +13,7 @@
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf8020000
diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
index d1e8a5b..5871e7b 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_XPLAINED=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -14,7 +14,7 @@
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf8020000
diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig
index 5280dec..16534fb 100644
--- a/configs/sama5d2_xplained_qspiflash_defconfig
+++ b/configs/sama5d2_xplained_qspiflash_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_XPLAINED=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -14,7 +14,7 @@
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf8020000
diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
index 051dab1..45f7344 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_XPLAINED=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -17,7 +17,7 @@
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xf8020000
diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index b07eebd..1045758 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3_XPLAINED=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -14,7 +14,7 @@
CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xffffee00
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index 4666dd0..594424d 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3_XPLAINED=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -12,7 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xffffee00
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index 65b6d75..106e91d 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -14,7 +14,7 @@
CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xffffee00
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index a1852a4..2d7d349 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -12,7 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xffffee00
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index e1706d9..088fa03 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -17,7 +17,7 @@
CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek"
CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xffffee00
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index e763863..68747d8 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4_XPLAINED=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -14,7 +14,7 @@
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index b717e2e..c6ff96b 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4_XPLAINED=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -12,7 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index 2885d6c..38922a3 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4_XPLAINED=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -17,7 +17,7 @@
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index 972038a..098e6ba 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4EK=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -14,7 +14,7 @@
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index 4de5e01..fd285a7 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4EK=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -12,7 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index ec9fdd8..83c4450 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -3,7 +3,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4EK=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -17,7 +17,7 @@
CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek"
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig
index d837029..88443f5 100644
--- a/configs/sandbox_noinst_defconfig
+++ b/configs/sandbox_noinst_defconfig
@@ -7,7 +7,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL=y
CONFIG_BOOTSTAGE_STASH_ADDR=0x0
@@ -30,7 +30,7 @@
CONFIG_HANDOFF=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_RTC_SUPPORT=y
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index edb2103..6741cd0 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -7,7 +7,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL=y
CONFIG_BOOTSTAGE_STASH_ADDR=0x0
@@ -31,7 +31,7 @@
CONFIG_HANDOFF=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_RTC_SUPPORT=y
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig
index 46daa03..dbe0171 100644
--- a/configs/seeed_npi_imx6ull_defconfig
+++ b/configs/seeed_npi_imx6ull_defconfig
@@ -23,9 +23,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig
index d665c8f..fd686df 100644
--- a/configs/sifive_unleashed_defconfig
+++ b/configs/sifive_unleashed_defconfig
@@ -1,5 +1,5 @@
CONFIG_RISCV=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_DM_SPI=y
diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig
index c90b7bb..38b7acd 100644
--- a/configs/sifive_unmatched_defconfig
+++ b/configs/sifive_unmatched_defconfig
@@ -1,5 +1,5 @@
CONFIG_RISCV=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_DM_SPI=y
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index 6ef61ef..c171cca 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -7,7 +7,7 @@
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23000000
CONFIG_TARGET_SMARTWEB=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
index 01ebb0e..ef9bbb9 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -5,7 +5,7 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
CONFIG_SPL_TEXT_BASE=0xFFE00000
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
CONFIG_IDENT_STRING="socfpga_arria10"
CONFIG_SPL_FS_FAT=y
diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig
index 313c5ac..854efe3 100644
--- a/configs/socfpga_secu1_defconfig
+++ b/configs/socfpga_secu1_defconfig
@@ -7,7 +7,7 @@
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
# CONFIG_SPL_MMC_SUPPORT is not set
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_TARGET_SOCFPGA_ARRIA5_SECU1=y
CONFIG_ENV_OFFSET_REDUND=0x120000
# CONFIG_SPL_LIBDISK_SUPPORT is not set
diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
index da78532..a7e5f566 100644
--- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
+++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
@@ -17,8 +17,8 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
index 9e7a1a9..4860ae4 100644
--- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
+++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
@@ -17,8 +17,8 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
index b23b051..b075365 100644
--- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
+++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
@@ -17,8 +17,8 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
index 82dc57a..be68c8a 100644
--- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
+++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
@@ -17,8 +17,8 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig
index e6d50b7..125e671 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -28,10 +28,10 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_FLASH_MTD=y
CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_CMD_ADTIMG=y
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig
index d054d94..266fdbd 100644
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -25,10 +25,10 @@
CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_FLASH_MTD=y
CONFIG_SYS_PROMPT="STM32MP> "
# CONFIG_CMD_ELF is not set
diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig
index 17dae19..9a449d7 100644
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -23,10 +23,10 @@
CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER=y
CONFIG_SPL_SPI_FLASH_MTD=y
CONFIG_SYS_PROMPT="STM32MP> "
# CONFIG_CMD_ELF is not set
diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig
index f7a7716..4dcc119 100644
--- a/configs/sunxi_Gemei_G9_defconfig
+++ b/configs/sunxi_Gemei_G9_defconfig
@@ -11,6 +11,6 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 440e9d5..80f75ce 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -10,7 +10,7 @@
CONFIG_SYS_TEXT_BASE=0x21000000
CONFIG_TARGET_TAURUS=y
CONFIG_BOARD_TAURUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index a298e41..93b0c6b 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -10,7 +10,6 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x1a000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
CONFIG_SPL_TEXT_BASE=0x40004030
@@ -27,7 +26,7 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig
index c9a99ca..077c9b3 100644
--- a/configs/thuban_defconfig
+++ b/configs/thuban_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -31,13 +31,13 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_HUSH_PARSER=y
diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig
index 0eda492..7a93ebb 100644
--- a/configs/ti816x_evm_defconfig
+++ b/configs/ti816x_evm_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index a2d2aa2..3ac314a 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x01000000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
@@ -19,8 +19,8 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig
index a4c1ff4..35e84b7 100644
--- a/configs/tinker-s-rk3288_defconfig
+++ b/configs/tinker-s-rk3288_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x01000000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker-s"
@@ -19,8 +19,8 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig
index 56c027e..c19b837 100644
--- a/configs/turris_mox_defconfig
+++ b/configs/turris_mox_defconfig
@@ -74,6 +74,7 @@
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCI_AARDVARK=y
+CONFIG_PHY=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_37XX=y
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index f98cd20..cd443ce 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -3,7 +3,7 @@
CONFIG_SPL_SYS_THUMB_BUILD=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
@@ -14,7 +14,6 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xF0000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia"
CONFIG_SPL_TEXT_BASE=0x40000030
@@ -34,7 +33,7 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_I2C=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_SHA1SUM=y
diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig
index c7f362a..3e6bb32 100644
--- a/configs/uDPU_defconfig
+++ b/configs/uDPU_defconfig
@@ -73,6 +73,7 @@
CONFIG_MVNETA=y
CONFIG_PCI=y
CONFIG_PCI_AARDVARK=y
+CONFIG_PHY=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_37XX=y
diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig
index 791613e..eecca2e 100644
--- a/configs/udoo_defconfig
+++ b/configs/udoo_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -23,8 +23,8 @@
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig
index 8667c75..63960d0 100644
--- a/configs/udoo_neo_defconfig
+++ b/configs/udoo_neo_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -23,7 +23,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig
index 01cb13f..930a178 100644
--- a/configs/variscite_dart6ul_defconfig
+++ b/configs/variscite_dart6ul_defconfig
@@ -18,8 +18,8 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
-CONFIG_SPL_USB_HOST_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_USB_HOST=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index 2f9c89c..624f1b9 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
@@ -18,7 +18,7 @@
CONFIG_TARGET_VERDIN_IMX8MM=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
@@ -35,9 +35,9 @@
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="Verdin iMX8MM # "
# CONFIG_BOOTM_NETBSD is not set
CONFIG_CMD_ASKENV=y
diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig
index 0108738..f1ac8e8 100644
--- a/configs/vining_2000_defconfig
+++ b/configs/vining_2000_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
@@ -28,11 +28,11 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig
index fa6e2b1..d3f0e0e 100644
--- a/configs/wandboard_defconfig
+++ b/configs/wandboard_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -36,8 +36,8 @@
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_FIT_IMAGE_TINY=y
CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
diff --git a/configs/x530_defconfig b/configs/x530_defconfig
index 0ff0956..6df383b 100644
--- a/configs/x530_defconfig
+++ b/configs/x530_defconfig
@@ -10,7 +10,6 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530"
CONFIG_SPL_TEXT_BASE=0x40000030
@@ -26,7 +25,7 @@
CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_BOARD_INIT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 0fb7ff0..fdca91a 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -29,12 +29,13 @@
DECLARE_GLOBAL_DATA_PTR;
-/*
- * GUID for basic data partions.
- */
-static const efi_guid_t partition_basic_data_guid = PARTITION_BASIC_DATA_GUID;
-
#ifdef CONFIG_HAVE_BLOCK_DEVICE
+
+/* GUID for basic data partitons */
+#if CONFIG_IS_ENABLED(EFI_PARTITION)
+static const efi_guid_t partition_basic_data_guid = PARTITION_BASIC_DATA_GUID;
+#endif
+
/**
* efi_crc32() - EFI version of crc32 function
* @buf: buffer to calculate crc32 of
@@ -1126,4 +1127,4 @@
.print = part_print_ptr(part_print_efi),
.test = part_test_efi,
};
-#endif
+#endif /* CONFIG_HAVE_BLOCK_DEVICE */
diff --git a/doc/README.SPL b/doc/README.SPL
index 2beb6d8..0448835 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -47,8 +47,8 @@
CONFIG_SPL_LIBCOMMON_SUPPORT (common/libcommon.o)
CONFIG_SPL_LIBDISK_SUPPORT (disk/libdisk.o)
-CONFIG_SPL_I2C_SUPPORT (drivers/i2c/libi2c.o)
-CONFIG_SPL_GPIO_SUPPORT (drivers/gpio/libgpio.o)
+CONFIG_SPL_I2C (drivers/i2c/libi2c.o)
+CONFIG_SPL_GPIO (drivers/gpio/libgpio.o)
CONFIG_SPL_MMC_SUPPORT (drivers/mmc/libmmc.o)
CONFIG_SPL_SERIAL_SUPPORT (drivers/serial/libserial.o)
CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
@@ -56,15 +56,15 @@
CONFIG_SPL_FS_FAT (fs/fat/libfat.o)
CONFIG_SPL_FS_EXT4
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
-CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
+CONFIG_SPL_POWER (drivers/power/libpower.o)
CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/raw/libnand.o)
-CONFIG_SPL_DRIVERS_MISC_SUPPORT (drivers/misc)
+CONFIG_SPL_DRIVERS_MISC (drivers/misc)
CONFIG_SPL_DMA (drivers/dma/libdma.o)
CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o)
CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/raw/nand_spl_load.o)
CONFIG_SPL_SPI_LOAD (drivers/mtd/spi/spi_spl_load.o)
CONFIG_SPL_RAM_DEVICE (common/spl/spl.c)
-CONFIG_SPL_WATCHDOG_SUPPORT (drivers/watchdog/libwatchdog.o)
+CONFIG_SPL_WATCHDOG (drivers/watchdog/libwatchdog.o)
Device tree
-----------
diff --git a/doc/SPL/README.am335x-network b/doc/SPL/README.am335x-network
index e3cf93f..e052706 100644
--- a/doc/SPL/README.am335x-network
+++ b/doc/SPL/README.am335x-network
@@ -8,7 +8,7 @@
I. Building the required images
1. You have to enable generic SPL configuration options (see
doc/README.SPL) as well as CONFIG_SPL_NET_SUPPORT,
-CONFIG_ETH_SUPPORT, CONFIG_SPL_LIBGENERIC_SUPPORT and
+CONFIG_SPL_ETH, CONFIG_SPL_LIBGENERIC_SUPPORT and
CONFIG_SPL_LIBCOMMON_SUPPORT in your board configuration file to build
SPL with support for booting over the network. Also you have to enable
the driver for the NIC used and CONFIG_SPL_BOARD_INIT option if your
diff --git a/doc/arch/sandbox.rst b/doc/arch/sandbox.rst
index 9e23e16..f8804e1 100644
--- a/doc/arch/sandbox.rst
+++ b/doc/arch/sandbox.rst
@@ -43,11 +43,7 @@
Prerequisites
-------------
-Here are some packages that are worth installing if you are doing sandbox or
-tools development in U-Boot:
-
- python3-pytest lzma lzma-alone lz4 python3 python3-virtualenv
- libssl1.0-dev
+Install the dependencies noted in :doc:`../build/gcc`.
Basic Operation
diff --git a/doc/board/index.rst b/doc/board/index.rst
index a6b3952..9e90978 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -27,6 +27,7 @@
socionext/index
st/index
tbs/index
+ ti/index
toradex/index
xen/index
xilinx/index
diff --git a/doc/board/ti/j721e_evm.rst b/doc/board/ti/j721e_evm.rst
new file mode 100644
index 0000000..44dc316
--- /dev/null
+++ b/doc/board/ti/j721e_evm.rst
@@ -0,0 +1,331 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Lokesh Vutla <lokeshvutla@ti.com>
+
+Texas Instruments K3 Platforms
+==============================
+
+Introduction:
+-------------
+The J721e family of SoCs are part of K3 Multicore SoC architecture platform
+targeting automotive applications. They are designed as a low power, high
+performance and highly integrated device architecture, adding significant
+enhancement on processing power, graphics capability, video and imaging
+processing, virtualization and coherent memory support.
+
+The device is partitioned into three functional domains, each containing
+specific processing cores and peripherals:
+
+1. Wake-up (WKUP) domain:
+ * Device Management and Security Controller (DMSC)
+
+2. Microcontroller (MCU) domain:
+ * Dual Core ARM Cortex-R5F processor
+
+3. MAIN domain:
+ * Dual core 64-bit ARM Cortex-A72
+ * 2 x Dual cortex ARM Cortex-R5 subsystem
+ * 2 x C66x Digital signal processor sub system
+ * C71x Digital signal processor sub-system with MMA.
+
+More info can be found in TRM: http://www.ti.com/lit/pdf/spruil1
+
+Boot Flow:
+----------
+Boot flow is similar to that of AM65x SoC and extending it with remoteproc
+support. Below is the pictorial representation of boot flow:
+
+.. code-block:: text
+
+ +------------------------------------------------------------------------+-----------------------+
+ | DMSC | MCU R5 | A72 | MAIN R5/C66x/C7x |
+ +------------------------------------------------------------------------+-----------------------+
+ | +--------+ | | | |
+ | | Reset | | | | |
+ | +--------+ | | | |
+ | : | | | |
+ | +--------+ | +-----------+ | | |
+ | | *ROM* |----------|-->| Reset rls | | | |
+ | +--------+ | +-----------+ | | |
+ | | | | : | | |
+ | | ROM | | : | | |
+ | |services| | : | | |
+ | | | | +-------------+ | | |
+ | | | | | *R5 ROM* | | | |
+ | | | | +-------------+ | | |
+ | | |<---------|---|Load and auth| | | |
+ | | | | | tiboot3.bin | | | |
+ | | | | +-------------+ | | |
+ | | | | : | | |
+ | | | | : | | |
+ | | | | : | | |
+ | | | | +-------------+ | | |
+ | | | | | *R5 SPL* | | | |
+ | | | | +-------------+ | | |
+ | | | | | Load | | | |
+ | | | | | sysfw.itb | | | |
+ | | Start | | +-------------+ | | |
+ | | System |<---------|---| Start | | | |
+ | |Firmware| | | SYSFW | | | |
+ | +--------+ | +-------------+ | | |
+ | : | | | | | |
+ | +---------+ | | Load | | | |
+ | | *SYSFW* | | | system | | | |
+ | +---------+ | | Config data | | | |
+ | | |<--------|---| | | | |
+ | | | | +-------------+ | | |
+ | | | | | DDR | | | |
+ | | | | | config | | | |
+ | | | | +-------------+ | | |
+ | | | | | Load | | | |
+ | | | | | tispl.bin | | | |
+ | | | | +-------------+ | | |
+ | | | | | Load R5 | | | |
+ | | | | | firmware | | | |
+ | | | | +-------------+ | | |
+ | | |<--------|---| Start A72 | | | |
+ | | | | | and jump to | | | |
+ | | | | | DM fw image | | | |
+ | | | | +-------------+ | | |
+ | | | | | +-----------+ | |
+ | | |---------|-----------------------|---->| Reset rls | | |
+ | | | | | +-----------+ | |
+ | | TIFS | | | : | |
+ | |Services | | | +-----------+ | |
+ | | |<--------|-----------------------|---->|*ATF/OPTEE*| | |
+ | | | | | +-----------+ | |
+ | | | | | : | |
+ | | | | | +-----------+ | |
+ | | |<--------|-----------------------|---->| *A72 SPL* | | |
+ | | | | | +-----------+ | |
+ | | | | | | Load | | |
+ | | | | | | u-boot.img| | |
+ | | | | | +-----------+ | |
+ | | | | | : | |
+ | | | | | +-----------+ | |
+ | | |<--------|-----------------------|---->| *U-Boot* | | |
+ | | | | | +-----------+ | |
+ | | | | | | prompt | | |
+ | | | | | +-----------+ | |
+ | | | | | | Load R5 | | |
+ | | | | | | Firmware | | |
+ | | | | | +-----------+ | |
+ | | |<--------|-----------------------|-----| Start R5 | | +-----------+ |
+ | | |---------|-----------------------|-----+-----------+-----|----->| R5 starts | |
+ | | | | | | Load C6 | | +-----------+ |
+ | | | | | | Firmware | | |
+ | | | | | +-----------+ | |
+ | | |<--------|-----------------------|-----| Start C6 | | +-----------+ |
+ | | |---------|-----------------------|-----+-----------+-----|----->| C6 starts | |
+ | | | | | | Load C7 | | +-----------+ |
+ | | | | | | Firmware | | |
+ | | | | | +-----------+ | |
+ | | |<--------|-----------------------|-----| Start C7 | | +-----------+ |
+ | | |---------|-----------------------|-----+-----------+-----|----->| C7 starts | |
+ | +---------+ | | | +-----------+ |
+ | | | | |
+ +------------------------------------------------------------------------+-----------------------+
+
+- Here DMSC acts as master and provides all the critical services. R5/A72
+ requests DMSC to get these services done as shown in the above diagram.
+
+Sources:
+--------
+1. SYSFW:
+ Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git
+ Branch: master
+
+2. ATF:
+ Tree: https://github.com/ARM-software/arm-trusted-firmware.git
+ Branch: master
+
+3. OPTEE:
+ Tree: https://github.com/OP-TEE/optee_os.git
+ Branch: master
+
+4. U-Boot:
+ Tree: https://source.denx.de/u-boot/u-boot
+ Branch: master
+
+Build procedure:
+----------------
+1. SYSFW:
+
+.. code-block:: text
+
+ $ make CROSS_COMPILE=arm-linux-gnueabihf-
+
+2. ATF:
+
+.. code-block:: text
+
+ $ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed
+
+3. OPTEE:
+
+.. code-block:: text
+
+ $ make PLATFORM=k3-j721e CFG_ARM64_core=y
+
+4. U-Boot:
+
+* 4.1 R5:
+
+.. code-block:: text
+
+ $ make CROSS_COMPILE=arm-linux-gnueabihf- j721e_evm_r5_defconfig O=/tmp/r5
+ $ make CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5
+
+* 4.2 A72:
+
+.. code-block:: text
+
+ $ make CROSS_COMPILE=aarch64-linux-gnu- j721e_evm_a72_defconfig O=/tmp/a72
+ $ make CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin DM=<path to DM firmware image> O=/tmp/a72
+
+Target Images
+--------------
+Copy the below images to an SD card and boot:
+ - sysfw.itb from step 1
+ - tiboot3.bin from step 4.1
+ - tispl.bin, u-boot.img from 4.2
+
+Image formats:
+--------------
+
+- tiboot3.bin:
+
+.. code-block:: text
+
+ +-----------------------+
+ | X.509 |
+ | Certificate |
+ | +-------------------+ |
+ | | | |
+ | | R5 | |
+ | | u-boot-spl.bin | |
+ | | | |
+ | +-------------------+ |
+ | | | |
+ | | FIT header | |
+ | | +---------------+ | |
+ | | | | | |
+ | | | DTB 1...N | | |
+ | | +---------------+ | |
+ | +-------------------+ |
+ +-----------------------+
+
+- tispl.bin
+
+.. code-block:: text
+
+ +-----------------------+
+ | |
+ | FIT HEADER |
+ | +-------------------+ |
+ | | | |
+ | | A72 ATF | |
+ | +-------------------+ |
+ | | | |
+ | | A72 OPTEE | |
+ | +-------------------+ |
+ | | | |
+ | | R5 DM FW | |
+ | +-------------------+ |
+ | | | |
+ | | A72 SPL | |
+ | +-------------------+ |
+ | | | |
+ | | SPL DTB 1...N | |
+ | +-------------------+ |
+ +-----------------------+
+
+- sysfw.itb
+
+.. code-block:: text
+
+ +-----------------------+
+ | |
+ | FIT HEADER |
+ | +-------------------+ |
+ | | | |
+ | | sysfw.bin | |
+ | +-------------------+ |
+ | | | |
+ | | board config | |
+ | +-------------------+ |
+ | | | |
+ | | PM config | |
+ | +-------------------+ |
+ | | | |
+ | | RM config | |
+ | +-------------------+ |
+ | | | |
+ | | Secure config | |
+ | +-------------------+ |
+ +-----------------------+
+
+OSPI:
+-----
+ROM supports booting from OSPI from offset 0x0.
+
+Flashing images to OSPI:
+
+Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img,
+and sysfw.itb over tftp and then flash those to OSPI at their respective
+addresses.
+
+.. code-block:: text
+
+ => sf probe
+ => tftp ${loadaddr} tiboot3.bin
+ => sf update $loadaddr 0x0 $filesize
+ => tftp ${loadaddr} tispl.bin
+ => sf update $loadaddr 0x80000 $filesize
+ => tftp ${loadaddr} u-boot.img
+ => sf update $loadaddr 0x280000 $filesize
+ => tftp ${loadaddr} sysfw.itb
+ => sf update $loadaddr 0x6C0000 $filesize
+
+Flash layout for OSPI:
+
+.. code-block:: text
+
+ 0x0 +----------------------------+
+ | ospi.tiboot3(512K) |
+ | |
+ 0x80000 +----------------------------+
+ | ospi.tispl(2M) |
+ | |
+ 0x280000 +----------------------------+
+ | ospi.u-boot(4M) |
+ | |
+ 0x680000 +----------------------------+
+ | ospi.env(128K) |
+ | |
+ 0x6A0000 +----------------------------+
+ | ospi.env.backup (128K) |
+ | |
+ 0x6C0000 +----------------------------+
+ | ospi.sysfw(1M) |
+ | |
+ 0x7C0000 +----------------------------+
+ | padding (256k) |
+ 0x800000 +----------------------------+
+ | ospi.rootfs(UBIFS) |
+ | |
+ +----------------------------+
+
+Firmwares:
+----------
+
+The J721e u-boot allows firmware to be loaded for the Cortex-R5 subsystem.
+The CPSW5G in J7200 and CPSW9G in J721E present in MAIN domain is configured
+and controlled by the ethernet firmware that executes in the MAIN Cortex R5.
+The default supported environment variables support loading these firmwares
+from only MMC. "dorprocboot" env variable has to be set for the U-BOOT to load
+and start the remote cores in the system.
+
+J721E common processor board can be attached to a Ethernet QSGMII card and the
+PHY in the card has to be reset before it can be used for data transfer.
+"do_main_cpsw0_qsgmii_phyinit" env variable has to be set for the U-BOOT to
+configure this PHY.
diff --git a/doc/build/gcc.rst b/doc/build/gcc.rst
index c51b3e7..8ffb4e3 100644
--- a/doc/build/gcc.rst
+++ b/doc/build/gcc.rst
@@ -26,8 +26,10 @@
sudo apt-get install bc bison build-essential coccinelle \
device-tree-compiler dfu-util efitools flex gdisk liblz4-tool \
libguestfs-tools libncurses-dev libpython3-dev libsdl2-dev libssl-dev \
- lzma-alone openssl python3 python3-coverage python3-pyelftools \
- python3-pytest python3-sphinxcontrib.apidoc python3-sphinx-rtd-theme swig
+ lz4 lzma lzma-alone openssl python3 python3-coverage \
+ python3-pycryptodome python3-pyelftools python3-pytest \
+ python3-sphinxcontrib.apidoc python3-sphinx-rtd-theme python3-virtualenv \
+ swig
SUSE based
~~~~~~~~~~
diff --git a/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt b/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
index 86ec113..3139a99 100644
--- a/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
+++ b/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
@@ -38,19 +38,19 @@
group pwm0
- pin 11 (GPIO1-11)
- - functions pwm, gpio
+ - functions pwm, led, gpio
group pwm1
- pin 12
- - functions pwm, gpio
+ - functions pwm, led, gpio
group pwm2
- pin 13
- - functions pwm, gpio
+ - functions pwm, led, gpio
group pwm3
- pin 14
- - functions pwm, gpio
+ - functions pwm, led, gpio
group pmic1
- pin 7
diff --git a/doc/uImage.FIT/signature.txt b/doc/uImage.FIT/signature.txt
index 7cb1c15..61a72db 100644
--- a/doc/uImage.FIT/signature.txt
+++ b/doc/uImage.FIT/signature.txt
@@ -533,8 +533,8 @@
or
"<key-name-hint>"
-As mkimage does not at this time support prompting for passwords HSM may need
-key preloading wrapper to be used when invoking mkimage.
+In order to set the pin in the HSM, an environment variable "MKIMAGE_SIGN_PIN"
+can be specified.
The following examples use the Nitrokey Pro using pkcs11 engine. Instructions
for other devices may vary.
diff --git a/drivers/Makefile b/drivers/Makefile
index 82d3c98..5674927 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -5,11 +5,11 @@
obj-$(CONFIG_$(SPL_TPL_)CLK) += clk/
obj-$(CONFIG_$(SPL_TPL_)DM) += core/
obj-$(CONFIG_$(SPL_TPL_)DFU) += dfu/
-obj-$(CONFIG_$(SPL_TPL_)GPIO_SUPPORT) += gpio/
-obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC_SUPPORT) += misc/
+obj-$(CONFIG_$(SPL_TPL_)GPIO) += gpio/
+obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC) += misc/
obj-$(CONFIG_$(SPL_TPL_)SYSRESET) += sysreset/
obj-$(CONFIG_$(SPL_TPL_)FIRMWARE) +=firmware/
-obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/
+obj-$(CONFIG_$(SPL_TPL_)I2C) += i2c/
obj-$(CONFIG_$(SPL_TPL_)INPUT) += input/
obj-$(CONFIG_$(SPL_TPL_)LED) += led/
obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += mmc/
@@ -39,26 +39,26 @@
obj-$(CONFIG_SPL_BOOTCOUNT_LIMIT) += bootcount/
obj-$(CONFIG_SPL_CACHE_SUPPORT) += cache/
obj-$(CONFIG_SPL_CPU) += cpu/
-obj-$(CONFIG_SPL_CRYPTO_SUPPORT) += crypto/
+obj-$(CONFIG_SPL_CRYPTO) += crypto/
obj-$(CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
obj-$(CONFIG_ARMADA_38X) += ddr/marvell/a38x/
obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/
obj-$(CONFIG_$(SPL_)ALTERA_SDRAM) += ddr/altera/
obj-$(CONFIG_ARCH_IMX8M) += ddr/imx/imx8m/
-obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/
-obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/
+obj-$(CONFIG_SPL_POWER) += power/ power/pmic/
+obj-$(CONFIG_SPL_POWER) += power/regulator/
obj-$(CONFIG_SPL_POWER_DOMAIN) += power/domain/
obj-$(CONFIG_SPL_DM_RESET) += reset/
obj-$(CONFIG_SPL_DMA) += dma/
-obj-$(CONFIG_SPL_ETH_SUPPORT) += net/
-obj-$(CONFIG_SPL_ETH_SUPPORT) += net/phy/
+obj-$(CONFIG_SPL_ETH) += net/
+obj-$(CONFIG_SPL_ETH) += net/phy/
obj-$(CONFIG_SPL_USB_ETHER) += net/phy/
-obj-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += usb/musb-new/
+obj-$(CONFIG_SPL_MUSB_NEW) += usb/musb-new/
obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/
obj-$(CONFIG_SPL_USB_GADGET) += usb/common/
obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/
-obj-$(CONFIG_SPL_WATCHDOG_SUPPORT) += watchdog/
-obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += usb/host/
+obj-$(CONFIG_SPL_WATCHDOG) += watchdog/
+obj-$(CONFIG_SPL_USB_HOST) += usb/host/
obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
obj-$(CONFIG_SPL_SATA_SUPPORT) += ata/ scsi/
obj-$(CONFIG_HAVE_BLOCK_DEVICE) += block/
@@ -93,11 +93,7 @@
obj-$(CONFIG_PCI_ENDPOINT) += pci_endpoint/
obj-y += dfu/
obj-$(CONFIG_PCH) += pch/
-obj-y += phy/allwinner/
-obj-y += phy/marvell/
obj-$(CONFIG_DM_REBOOT_MODE) += reboot-mode/
-obj-y += phy/rockchip/
-obj-y += phy/socionext/
obj-y += rtc/
obj-y += scsi/
obj-y += sound/
diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index d618e16..9ae188c 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -325,6 +325,7 @@
config ACPIGEN
bool "Support ACPI table generation in driver model"
default y if SANDBOX || (GENERATE_ACPI_TABLE && !QEMU)
+ select LIB_UUID
help
This option enables generation of ACPI tables using driver-model
devices. It adds a new operation struct to each driver, to support
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index dda6c76..701b23e 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -18,6 +18,19 @@
#include <linux/ioport.h>
#include <asm/global_data.h>
+bool ofnode_name_eq(ofnode node, const char *name)
+{
+ const char *node_name;
+ size_t len;
+
+ assert(ofnode_valid(node));
+
+ node_name = ofnode_get_name(node);
+ len = strchrnul(node_name, '@') - node_name;
+
+ return (strlen(name) == len) && !strncmp(node_name, name, len);
+}
+
int ofnode_read_u32(ofnode node, const char *propname, u32 *outp)
{
return ofnode_read_u32_index(node, propname, 0, outp);
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 0817b12..09695f6 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -16,7 +16,7 @@
config SPL_DM_GPIO
bool "Enable Driver Model for GPIO drivers in SPL"
- depends on DM_GPIO && SPL_DM && SPL_GPIO_SUPPORT
+ depends on DM_GPIO && SPL_DM && SPL_GPIO
default y
help
Enable driver model for GPIO access in SPL. The standard GPIO
@@ -27,7 +27,7 @@
config TPL_DM_GPIO
bool "Enable Driver Model for GPIO drivers in TPL"
- depends on DM_GPIO && TPL_DM && TPL_GPIO_SUPPORT
+ depends on DM_GPIO && TPL_DM && TPL_GPIO
default y
help
Enable driver model for GPIO access in TPL. The standard GPIO
@@ -58,7 +58,7 @@
config SPL_DM_GPIO_LOOKUP_LABEL
bool "Enable searching for gpio labelnames"
- depends on DM_GPIO && SPL_DM && SPL_GPIO_SUPPORT
+ depends on DM_GPIO && SPL_DM && SPL_GPIO
help
This option enables searching for gpio names in
the defined gpio labels, if the search for the
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 35d6e2c..63d03a3 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -2,7 +2,29 @@
# I2C subsystem configuration
#
-menu "I2C support"
+menuconfig I2C
+ bool "I2C support"
+ default y
+ help
+ Note:
+ This is a stand-in for an option to enable I2C support. In fact this
+ simply enables building of the I2C directory for U-Boot. The actual
+ I2C feature is enabled by DM_I2C (for driver model) and
+ the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
+
+ So at present there is no need to ever disable this option.
+
+ Eventually it will:
+
+ Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
+ I2C works with a clock and data line which can be driven by a
+ one or more masters or slaves. It is a fairly complex bus but is
+ widely used as it only needs two lines for communication. Speeds of
+ 400kbps are typical but up to 3.4Mbps is supported by some
+ hardware. Enable this option to build the drivers in drivers/i2c as
+ part of a U-Boot build.
+
+if I2C
config DM_I2C
bool "Enable Driver Model for I2C drivers"
@@ -74,7 +96,7 @@
config SPL_DM_I2C_GPIO
bool "Enable Driver Model for software emulated I2C bus driver in SPL"
- depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO_SUPPORT
+ depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
default y
help
Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
@@ -528,4 +550,4 @@
source "drivers/i2c/muxes/Kconfig"
-endmenu
+endif
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 06a1150..c2eb24e 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -11,7 +11,7 @@
obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o
obj-$(CONFIG_I2C_MV) += mv_i2c.o
-obj-$(CONFIG_SYS_I2C) += i2c_core.o
+obj-$(CONFIG_SYS_I2C_LEGACY) += i2c_core.o
obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o
obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o
obj-$(CONFIG_SYS_I2C_CADENCE) += i2c-cdns.o
diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c
index 3cbc8f3..7093ad1 100644
--- a/drivers/misc/swap_case.c
+++ b/drivers/misc/swap_case.c
@@ -302,7 +302,6 @@
}
static int pci_ea_bar2_magic = PCI_EA_BAR2_MAGIC;
-static int pci_ea_bar4_magic = PCI_EA_BAR4_MAGIC;
static int sandbox_swap_case_map_physmem(struct udevice *dev,
phys_addr_t addr, unsigned long *lenp, void **ptrp)
@@ -332,12 +331,22 @@
*ptrp = &pci_ea_bar2_magic;
*lenp = PCI_CAP_EA_SIZE_LO;
break;
+#ifdef CONFIG_HOST_64BIT
+ /*
+ * This cannot be work on a 32-bit machine since *lenp is ulong
+ * which is 32-bits, but it needs to have a 64-bit value
+ * assigned
+ */
case (phys_addr_t)((PCI_CAP_EA_BASE_HI4 << 32) |
- PCI_CAP_EA_BASE_LO4):
+ PCI_CAP_EA_BASE_LO4): {
+ static int pci_ea_bar4_magic = PCI_EA_BAR4_MAGIC;
+
*ptrp = &pci_ea_bar4_magic;
*lenp = (PCI_CAP_EA_SIZE_HI << 32) |
PCI_CAP_EA_SIZE_LO;
break;
+ }
+#endif
default:
return -ENOENT;
}
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index a86d96a..4305967 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -619,6 +619,7 @@
}
}
+ dev_read_u32(dev, "ti,strobe-sel", &plat->strb_sel);
dev_read_u32(dev, "ti,clkbuf-sel", &plat->clkbuf_sel);
ret = mmc_of_parse(dev, cfg);
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index da44511..306ce0f 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -61,7 +61,7 @@
/* simplify defines to OMAP_HSMMC_USE_GPIO */
#if (defined(CONFIG_OMAP_GPIO) && !defined(CONFIG_SPL_BUILD)) || \
- (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO_SUPPORT))
+ (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO))
#define OMAP_HSMMC_USE_GPIO
#else
#undef OMAP_HSMMC_USE_GPIO
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index d9ab6a0..eea4701 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -507,6 +507,9 @@
case MMC_HS_200:
reg |= SDHCI_CTRL_UHS_SDR104;
break;
+ case MMC_HS_400:
+ reg |= SDHCI_CTRL_HS400;
+ break;
default:
reg |= SDHCI_CTRL_UHS_SDR12;
}
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 80ae1af..4767d21 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -282,4 +282,7 @@
Support the USB3.0 PHY in NXP i.MX8MQ SoC
source "drivers/phy/rockchip/Kconfig"
+source "drivers/phy/cadence/Kconfig"
+source "drivers/phy/ti/Kconfig"
+
endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 0f2b63a..13a8ade 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -3,6 +3,11 @@
# Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
# Written by Jean-Jacques Hiblot <jjhiblot@ti.com>
+obj-y += allwinner/
+obj-y += marvell/
+obj-y += rockchip/
+obj-y += socionext/
+
obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
obj-$(CONFIG_MIPI_DPHY_HELPERS) += phy-core-mipi-dphy.o
@@ -33,3 +38,5 @@
obj-$(CONFIG_PHY_DA8XX_USB) += phy-da8xx-usb.o
obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
obj-$(CONFIG_PHY_IMX8MQ_USB) += phy-imx8mq-usb.o
+obj-y += cadence/
+obj-y += ti/
diff --git a/drivers/phy/cadence/Kconfig b/drivers/phy/cadence/Kconfig
new file mode 100644
index 0000000..549ddbf
--- /dev/null
+++ b/drivers/phy/cadence/Kconfig
@@ -0,0 +1,11 @@
+config PHY_CADENCE_SIERRA
+ tristate "Cadence Sierra PHY Driver"
+ depends on DM_RESET
+ help
+ Enable this to support the Cadence Sierra PHY driver
+
+config PHY_CADENCE_TORRENT
+ tristate "Cadence Torrent PHY Driver"
+ depends on DM_RESET
+ help
+ Enable this to support the Cadence Torrent PHY driver
diff --git a/drivers/phy/cadence/Makefile b/drivers/phy/cadence/Makefile
new file mode 100644
index 0000000..af63b32
--- /dev/null
+++ b/drivers/phy/cadence/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_$(SPL_)PHY_CADENCE_SIERRA) += phy-cadence-sierra.o
+obj-$(CONFIG_$(SPL_)PHY_CADENCE_TORRENT) += phy-cadence-torrent.o
diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c
new file mode 100644
index 0000000..715def6
--- /dev/null
+++ b/drivers/phy/cadence/phy-cadence-sierra.c
@@ -0,0 +1,751 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Cadence Sierra PHY Driver
+ *
+ * Based on the linux driver provided by Cadence
+ *
+ * Copyright (c) 2018 Cadence Design Systems
+ * Author: Alan Douglas <adouglas@cadence.com>
+ *
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Jean-Jacques Hiblot <jjhiblot@ti.com>
+ *
+ */
+#include <common.h>
+#include <clk.h>
+#include <generic-phy.h>
+#include <reset.h>
+#include <dm/device.h>
+#include <dm/device-internal.h>
+#include <dm/device_compat.h>
+#include <dm/lists.h>
+#include <dm/read.h>
+#include <dm/uclass.h>
+#include <dm/devres.h>
+#include <linux/io.h>
+#include <dt-bindings/phy/phy.h>
+#include <regmap.h>
+
+/* PHY register offsets */
+#define SIERRA_COMMON_CDB_OFFSET 0x0
+#define SIERRA_MACRO_ID_REG 0x0
+#define SIERRA_CMN_PLLLC_MODE_PREG 0x48
+#define SIERRA_CMN_PLLLC_LF_COEFF_MODE1_PREG 0x49
+#define SIERRA_CMN_PLLLC_LF_COEFF_MODE0_PREG 0x4A
+#define SIERRA_CMN_PLLLC_LOCK_CNTSTART_PREG 0x4B
+#define SIERRA_CMN_PLLLC_BWCAL_MODE1_PREG 0x4F
+#define SIERRA_CMN_PLLLC_BWCAL_MODE0_PREG 0x50
+#define SIERRA_CMN_PLLLC_SS_TIME_STEPSIZE_MODE_PREG 0x62
+
+#define SIERRA_LANE_CDB_OFFSET(ln, offset) \
+ (0x4000 + ((ln) * (0x800 >> (2 - (offset)))))
+
+#define SIERRA_DET_STANDEC_A_PREG 0x000
+#define SIERRA_DET_STANDEC_B_PREG 0x001
+#define SIERRA_DET_STANDEC_C_PREG 0x002
+#define SIERRA_DET_STANDEC_D_PREG 0x003
+#define SIERRA_DET_STANDEC_E_PREG 0x004
+#define SIERRA_PSM_LANECAL_DLY_A1_RESETS_PREG 0x008
+#define SIERRA_PSM_A0IN_TMR_PREG 0x009
+#define SIERRA_PSM_DIAG_PREG 0x015
+#define SIERRA_PSC_TX_A0_PREG 0x028
+#define SIERRA_PSC_TX_A1_PREG 0x029
+#define SIERRA_PSC_TX_A2_PREG 0x02A
+#define SIERRA_PSC_TX_A3_PREG 0x02B
+#define SIERRA_PSC_RX_A0_PREG 0x030
+#define SIERRA_PSC_RX_A1_PREG 0x031
+#define SIERRA_PSC_RX_A2_PREG 0x032
+#define SIERRA_PSC_RX_A3_PREG 0x033
+#define SIERRA_PLLCTRL_SUBRATE_PREG 0x03A
+#define SIERRA_PLLCTRL_GEN_D_PREG 0x03E
+#define SIERRA_PLLCTRL_CPGAIN_MODE_PREG 0x03F
+#define SIERRA_PLLCTRL_STATUS_PREG 0x044
+#define SIERRA_CLKPATH_BIASTRIM_PREG 0x04B
+#define SIERRA_DFE_BIASTRIM_PREG 0x04C
+#define SIERRA_DRVCTRL_ATTEN_PREG 0x06A
+#define SIERRA_CLKPATHCTRL_TMR_PREG 0x081
+#define SIERRA_RX_CREQ_FLTR_A_MODE3_PREG 0x085
+#define SIERRA_RX_CREQ_FLTR_A_MODE2_PREG 0x086
+#define SIERRA_RX_CREQ_FLTR_A_MODE1_PREG 0x087
+#define SIERRA_RX_CREQ_FLTR_A_MODE0_PREG 0x088
+#define SIERRA_CREQ_CCLKDET_MODE01_PREG 0x08E
+#define SIERRA_RX_CTLE_MAINTENANCE_PREG 0x091
+#define SIERRA_CREQ_FSMCLK_SEL_PREG 0x092
+#define SIERRA_CREQ_EQ_CTRL_PREG 0x093
+#define SIERRA_CREQ_SPARE_PREG 0x096
+#define SIERRA_CREQ_EQ_OPEN_EYE_THRESH_PREG 0x097
+#define SIERRA_CTLELUT_CTRL_PREG 0x098
+#define SIERRA_DFE_ECMP_RATESEL_PREG 0x0C0
+#define SIERRA_DFE_SMP_RATESEL_PREG 0x0C1
+#define SIERRA_DEQ_PHALIGN_CTRL 0x0C4
+#define SIERRA_DEQ_CONCUR_CTRL1_PREG 0x0C8
+#define SIERRA_DEQ_CONCUR_CTRL2_PREG 0x0C9
+#define SIERRA_DEQ_EPIPWR_CTRL2_PREG 0x0CD
+#define SIERRA_DEQ_FAST_MAINT_CYCLES_PREG 0x0CE
+#define SIERRA_DEQ_ERRCMP_CTRL_PREG 0x0D0
+#define SIERRA_DEQ_OFFSET_CTRL_PREG 0x0D8
+#define SIERRA_DEQ_GAIN_CTRL_PREG 0x0E0
+#define SIERRA_DEQ_VGATUNE_CTRL_PREG 0x0E1
+#define SIERRA_DEQ_GLUT0 0x0E8
+#define SIERRA_DEQ_GLUT1 0x0E9
+#define SIERRA_DEQ_GLUT2 0x0EA
+#define SIERRA_DEQ_GLUT3 0x0EB
+#define SIERRA_DEQ_GLUT4 0x0EC
+#define SIERRA_DEQ_GLUT5 0x0ED
+#define SIERRA_DEQ_GLUT6 0x0EE
+#define SIERRA_DEQ_GLUT7 0x0EF
+#define SIERRA_DEQ_GLUT8 0x0F0
+#define SIERRA_DEQ_GLUT9 0x0F1
+#define SIERRA_DEQ_GLUT10 0x0F2
+#define SIERRA_DEQ_GLUT11 0x0F3
+#define SIERRA_DEQ_GLUT12 0x0F4
+#define SIERRA_DEQ_GLUT13 0x0F5
+#define SIERRA_DEQ_GLUT14 0x0F6
+#define SIERRA_DEQ_GLUT15 0x0F7
+#define SIERRA_DEQ_GLUT16 0x0F8
+#define SIERRA_DEQ_ALUT0 0x108
+#define SIERRA_DEQ_ALUT1 0x109
+#define SIERRA_DEQ_ALUT2 0x10A
+#define SIERRA_DEQ_ALUT3 0x10B
+#define SIERRA_DEQ_ALUT4 0x10C
+#define SIERRA_DEQ_ALUT5 0x10D
+#define SIERRA_DEQ_ALUT6 0x10E
+#define SIERRA_DEQ_ALUT7 0x10F
+#define SIERRA_DEQ_ALUT8 0x110
+#define SIERRA_DEQ_ALUT9 0x111
+#define SIERRA_DEQ_ALUT10 0x112
+#define SIERRA_DEQ_ALUT11 0x113
+#define SIERRA_DEQ_ALUT12 0x114
+#define SIERRA_DEQ_ALUT13 0x115
+#define SIERRA_DEQ_DFETAP_CTRL_PREG 0x128
+#define SIERRA_DFE_EN_1010_IGNORE_PREG 0x134
+#define SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG 0x150
+#define SIERRA_DEQ_TAU_CTRL2_PREG 0x151
+#define SIERRA_DEQ_PICTRL_PREG 0x161
+#define SIERRA_CPICAL_TMRVAL_MODE1_PREG 0x170
+#define SIERRA_CPICAL_TMRVAL_MODE0_PREG 0x171
+#define SIERRA_CPICAL_PICNT_MODE1_PREG 0x174
+#define SIERRA_CPI_OUTBUF_RATESEL_PREG 0x17C
+#define SIERRA_CPICAL_RES_STARTCODE_MODE23_PREG 0x183
+#define SIERRA_LFPSDET_SUPPORT_PREG 0x188
+#define SIERRA_LFPSFILT_NS_PREG 0x18A
+#define SIERRA_LFPSFILT_RD_PREG 0x18B
+#define SIERRA_LFPSFILT_MP_PREG 0x18C
+#define SIERRA_SIGDET_SUPPORT_PREG 0x190
+#define SIERRA_SDFILT_H2L_A_PREG 0x191
+#define SIERRA_SDFILT_L2H_PREG 0x193
+#define SIERRA_RXBUFFER_CTLECTRL_PREG 0x19E
+#define SIERRA_RXBUFFER_RCDFECTRL_PREG 0x19F
+#define SIERRA_RXBUFFER_DFECTRL_PREG 0x1A0
+#define SIERRA_DEQ_TAU_CTRL1_FAST_MAINT_PREG 0x14F
+#define SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG 0x150
+
+#define SIERRA_PHY_CONFIG_CTRL_OFFSET 0xc000
+#define SIERRA_PHY_PLL_CFG 0xe
+
+#define SIERRA_MACRO_ID 0x00007364
+#define SIERRA_MAX_LANES 16
+#define PLL_LOCK_TIME 100
+
+static const struct reg_field macro_id_type =
+ REG_FIELD(SIERRA_MACRO_ID_REG, 0, 15);
+static const struct reg_field phy_pll_cfg_1 =
+ REG_FIELD(SIERRA_PHY_PLL_CFG, 1, 1);
+static const struct reg_field pllctrl_lock =
+ REG_FIELD(SIERRA_PLLCTRL_STATUS_PREG, 0, 0);
+
+#define reset_control_assert(rst) cdns_reset_assert(rst)
+#define reset_control_deassert(rst) cdns_reset_deassert(rst)
+#define reset_control reset_ctl
+
+struct cdns_sierra_inst {
+ u32 phy_type;
+ u32 num_lanes;
+ u32 mlane;
+ struct reset_ctl_bulk *lnk_rst;
+};
+
+struct cdns_reg_pairs {
+ u16 val;
+ u32 off;
+};
+
+struct cdns_sierra_data {
+ u32 id_value;
+ u8 block_offset_shift;
+ u8 reg_offset_shift;
+ u32 pcie_cmn_regs;
+ u32 pcie_ln_regs;
+ u32 usb_cmn_regs;
+ u32 usb_ln_regs;
+ struct cdns_reg_pairs *pcie_cmn_vals;
+ struct cdns_reg_pairs *pcie_ln_vals;
+ struct cdns_reg_pairs *usb_cmn_vals;
+ struct cdns_reg_pairs *usb_ln_vals;
+};
+
+struct cdns_regmap_cdb_context {
+ struct udevice *dev;
+ void __iomem *base;
+ u8 reg_offset_shift;
+};
+
+struct cdns_sierra_phy {
+ struct udevice *dev;
+ void *base;
+ size_t size;
+ struct regmap *regmap;
+ struct cdns_sierra_data *init_data;
+ struct cdns_sierra_inst phys[SIERRA_MAX_LANES];
+ struct reset_control *phy_rst;
+ struct regmap *regmap_lane_cdb[SIERRA_MAX_LANES];
+ struct regmap *regmap_phy_config_ctrl;
+ struct regmap *regmap_common_cdb;
+ struct regmap_field *macro_id_type;
+ struct regmap_field *phy_pll_cfg_1;
+ struct regmap_field *pllctrl_lock[SIERRA_MAX_LANES];
+ struct clk *clk;
+ struct clk *cmn_refclk;
+ struct clk *cmn_refclk1;
+ int nsubnodes;
+ u32 num_lanes;
+ bool autoconf;
+};
+
+static inline int cdns_reset_assert(struct reset_control *rst)
+{
+ if (rst)
+ return reset_assert(rst);
+ else
+ return 0;
+}
+
+static inline int cdns_reset_deassert(struct reset_control *rst)
+{
+ if (rst)
+ return reset_deassert(rst);
+ else
+ return 0;
+}
+
+static inline struct cdns_sierra_inst *phy_get_drvdata(struct phy *phy)
+{
+ struct cdns_sierra_phy *sp = dev_get_priv(phy->dev);
+ int index;
+
+ if (phy->id >= SIERRA_MAX_LANES)
+ return NULL;
+
+ for (index = 0; index < sp->nsubnodes; index++) {
+ if (phy->id == sp->phys[index].mlane)
+ return &sp->phys[index];
+ }
+
+ return NULL;
+}
+
+static int cdns_sierra_phy_init(struct phy *gphy)
+{
+ struct cdns_sierra_inst *ins = phy_get_drvdata(gphy);
+ struct cdns_sierra_phy *phy = dev_get_priv(gphy->dev);
+ struct regmap *regmap = phy->regmap;
+ int i, j;
+ struct cdns_reg_pairs *cmn_vals, *ln_vals;
+ u32 num_cmn_regs, num_ln_regs;
+
+ /* Initialise the PHY registers, unless auto configured */
+ if (phy->autoconf)
+ return 0;
+
+ clk_set_rate(phy->cmn_refclk, 25000000);
+ clk_set_rate(phy->cmn_refclk1, 25000000);
+
+ if (ins->phy_type == PHY_TYPE_PCIE) {
+ num_cmn_regs = phy->init_data->pcie_cmn_regs;
+ num_ln_regs = phy->init_data->pcie_ln_regs;
+ cmn_vals = phy->init_data->pcie_cmn_vals;
+ ln_vals = phy->init_data->pcie_ln_vals;
+ } else if (ins->phy_type == PHY_TYPE_USB3) {
+ num_cmn_regs = phy->init_data->usb_cmn_regs;
+ num_ln_regs = phy->init_data->usb_ln_regs;
+ cmn_vals = phy->init_data->usb_cmn_vals;
+ ln_vals = phy->init_data->usb_ln_vals;
+ } else {
+ return -EINVAL;
+ }
+
+ regmap = phy->regmap_common_cdb;
+ for (j = 0; j < num_cmn_regs ; j++)
+ regmap_write(regmap, cmn_vals[j].off, cmn_vals[j].val);
+
+ for (i = 0; i < ins->num_lanes; i++) {
+ for (j = 0; j < num_ln_regs ; j++) {
+ regmap = phy->regmap_lane_cdb[i + ins->mlane];
+ regmap_write(regmap, ln_vals[j].off, ln_vals[j].val);
+ }
+ }
+
+ return 0;
+}
+
+static int cdns_sierra_phy_on(struct phy *gphy)
+{
+ struct cdns_sierra_inst *ins = phy_get_drvdata(gphy);
+ struct cdns_sierra_phy *sp = dev_get_priv(gphy->dev);
+ struct udevice *dev = gphy->dev;
+ u32 val;
+ int ret;
+
+ /* Take the PHY lane group out of reset */
+ ret = reset_deassert_bulk(ins->lnk_rst);
+ if (ret) {
+ dev_err(dev, "Failed to take the PHY lane out of reset\n");
+ return ret;
+ }
+
+ ret = regmap_field_read_poll_timeout(sp->pllctrl_lock[ins->mlane],
+ val, val, 1000, PLL_LOCK_TIME);
+ if (ret < 0)
+ dev_err(dev, "PLL lock of lane failed\n");
+
+ reset_control_assert(sp->phy_rst);
+ reset_control_deassert(sp->phy_rst);
+
+ return ret;
+}
+
+static int cdns_sierra_phy_off(struct phy *gphy)
+{
+ struct cdns_sierra_inst *ins = phy_get_drvdata(gphy);
+
+ return reset_assert_bulk(ins->lnk_rst);
+}
+
+static int cdns_sierra_phy_reset(struct phy *gphy)
+{
+ struct cdns_sierra_phy *sp = dev_get_priv(gphy->dev);
+
+ reset_control_assert(sp->phy_rst);
+ reset_control_deassert(sp->phy_rst);
+ return 0;
+};
+
+static const struct phy_ops ops = {
+ .init = cdns_sierra_phy_init,
+ .power_on = cdns_sierra_phy_on,
+ .power_off = cdns_sierra_phy_off,
+ .reset = cdns_sierra_phy_reset,
+};
+
+static int cdns_sierra_get_optional(struct cdns_sierra_inst *inst,
+ ofnode child)
+{
+ if (ofnode_read_u32(child, "reg", &inst->mlane))
+ return -EINVAL;
+
+ if (ofnode_read_u32(child, "cdns,num-lanes", &inst->num_lanes))
+ return -EINVAL;
+
+ if (ofnode_read_u32(child, "cdns,phy-type", &inst->phy_type))
+ return -EINVAL;
+
+ return 0;
+}
+
+static struct regmap *cdns_regmap_init(struct udevice *dev, void __iomem *base,
+ u32 block_offset, u8 block_offset_shift,
+ u8 reg_offset_shift)
+{
+ struct cdns_sierra_phy *sp = dev_get_priv(dev);
+ struct regmap_config config;
+
+ config.r_start = (ulong)(base + (block_offset << block_offset_shift));
+ config.r_size = sp->size - (block_offset << block_offset_shift);
+ config.reg_offset_shift = reg_offset_shift;
+ config.width = REGMAP_SIZE_16;
+
+ return devm_regmap_init(dev, NULL, NULL, &config);
+}
+
+static int cdns_regfield_init(struct cdns_sierra_phy *sp)
+{
+ struct udevice *dev = sp->dev;
+ struct regmap_field *field;
+ struct regmap *regmap;
+ int i;
+
+ regmap = sp->regmap_common_cdb;
+ field = devm_regmap_field_alloc(dev, regmap, macro_id_type);
+ if (IS_ERR(field)) {
+ dev_err(dev, "MACRO_ID_TYPE reg field init failed\n");
+ return PTR_ERR(field);
+ }
+ sp->macro_id_type = field;
+
+ regmap = sp->regmap_phy_config_ctrl;
+ field = devm_regmap_field_alloc(dev, regmap, phy_pll_cfg_1);
+ if (IS_ERR(field)) {
+ dev_err(dev, "PHY_PLL_CFG_1 reg field init failed\n");
+ return PTR_ERR(field);
+ }
+ sp->phy_pll_cfg_1 = field;
+
+ for (i = 0; i < SIERRA_MAX_LANES; i++) {
+ regmap = sp->regmap_lane_cdb[i];
+ field = devm_regmap_field_alloc(dev, regmap, pllctrl_lock);
+ if (IS_ERR(field)) {
+ dev_err(dev, "P%d_ENABLE reg field init failed\n", i);
+ return PTR_ERR(field);
+ }
+ sp->pllctrl_lock[i] = field;
+ }
+
+ return 0;
+}
+
+static int cdns_regmap_init_blocks(struct cdns_sierra_phy *sp,
+ void __iomem *base, u8 block_offset_shift,
+ u8 reg_offset_shift)
+{
+ struct udevice *dev = sp->dev;
+ struct regmap *regmap;
+ u32 block_offset;
+ int i;
+
+ for (i = 0; i < SIERRA_MAX_LANES; i++) {
+ block_offset = SIERRA_LANE_CDB_OFFSET(i, reg_offset_shift);
+ regmap = cdns_regmap_init(dev, base, block_offset,
+ block_offset_shift, reg_offset_shift);
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "Failed to init lane CDB regmap\n");
+ return PTR_ERR(regmap);
+ }
+ sp->regmap_lane_cdb[i] = regmap;
+ }
+
+ regmap = cdns_regmap_init(dev, base, SIERRA_COMMON_CDB_OFFSET,
+ block_offset_shift, reg_offset_shift);
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "Failed to init common CDB regmap\n");
+ return PTR_ERR(regmap);
+ }
+ sp->regmap_common_cdb = regmap;
+
+ regmap = cdns_regmap_init(dev, base, SIERRA_PHY_CONFIG_CTRL_OFFSET,
+ block_offset_shift, reg_offset_shift);
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "Failed to init PHY config and control regmap\n");
+ return PTR_ERR(regmap);
+ }
+ sp->regmap_phy_config_ctrl = regmap;
+
+ return 0;
+}
+
+static int cdns_sierra_phy_probe(struct udevice *dev)
+{
+ struct cdns_sierra_phy *sp = dev_get_priv(dev);
+ struct cdns_sierra_data *data;
+ unsigned int id_value;
+ int ret, node = 0;
+ struct clk *clk;
+ ofnode child;
+
+ sp->dev = dev;
+
+ sp->base = devfdt_remap_addr_index(dev, 0);
+ if (!sp->base) {
+ dev_err(dev, "unable to map regs\n");
+ return -ENOMEM;
+ }
+ devfdt_get_addr_size_index(dev, 0, (fdt_size_t *)&sp->size);
+
+ /* Get init data for this PHY */
+ data = (struct cdns_sierra_data *)dev_get_driver_data(dev);
+ sp->init_data = data;
+
+ ret = cdns_regmap_init_blocks(sp, sp->base, data->block_offset_shift,
+ data->reg_offset_shift);
+ if (ret)
+ return ret;
+
+ ret = cdns_regfield_init(sp);
+ if (ret)
+ return ret;
+
+ sp->clk = devm_clk_get_optional(dev, "phy_clk");
+ if (IS_ERR(sp->clk)) {
+ dev_err(dev, "failed to get clock phy_clk\n");
+ return PTR_ERR(sp->clk);
+ }
+
+ sp->phy_rst = devm_reset_control_get(dev, "sierra_reset");
+ if (IS_ERR(sp->phy_rst)) {
+ dev_err(dev, "failed to get reset\n");
+ return PTR_ERR(sp->phy_rst);
+ }
+
+ clk = devm_clk_get_optional(dev, "cmn_refclk_dig_div");
+ if (IS_ERR(clk)) {
+ dev_err(dev, "cmn_refclk clock not found\n");
+ ret = PTR_ERR(clk);
+ return ret;
+ }
+ sp->cmn_refclk = clk;
+
+ clk = devm_clk_get_optional(dev, "cmn_refclk1_dig_div");
+ if (IS_ERR(clk)) {
+ dev_err(dev, "cmn_refclk1 clock not found\n");
+ ret = PTR_ERR(clk);
+ return ret;
+ }
+ sp->cmn_refclk1 = clk;
+
+ ret = clk_prepare_enable(sp->clk);
+ if (ret)
+ return ret;
+
+ /* Check that PHY is present */
+ regmap_field_read(sp->macro_id_type, &id_value);
+ if (sp->init_data->id_value != id_value) {
+ dev_err(dev, "PHY not found 0x%x vs 0x%x\n",
+ sp->init_data->id_value, id_value);
+ ret = -EINVAL;
+ goto clk_disable;
+ }
+
+ sp->autoconf = dev_read_bool(dev, "cdns,autoconf");
+
+ ofnode_for_each_subnode(child, dev_ofnode(dev)) {
+ sp->phys[node].lnk_rst = devm_reset_bulk_get_by_node(dev,
+ child);
+ if (IS_ERR(sp->phys[node].lnk_rst)) {
+ ret = PTR_ERR(sp->phys[node].lnk_rst);
+ dev_err(dev, "failed to get reset %s\n",
+ ofnode_get_name(child));
+ goto put_child2;
+ }
+
+ if (!sp->autoconf) {
+ ret = cdns_sierra_get_optional(&sp->phys[node], child);
+ if (ret) {
+ dev_err(dev, "missing property in node %s\n",
+ ofnode_get_name(child));
+ goto put_child;
+ }
+ }
+ sp->num_lanes += sp->phys[node].num_lanes;
+
+ node++;
+ }
+ sp->nsubnodes = node;
+
+ /* If more than one subnode, configure the PHY as multilink */
+ if (!sp->autoconf && sp->nsubnodes > 1)
+ regmap_field_write(sp->phy_pll_cfg_1, 0x1);
+
+ reset_control_deassert(sp->phy_rst);
+ dev_info(dev, "sierra probed\n");
+ return 0;
+
+put_child:
+ node++;
+put_child2:
+
+clk_disable:
+ clk_disable_unprepare(sp->clk);
+ return ret;
+}
+
+static int cdns_sierra_phy_remove(struct udevice *dev)
+{
+ struct cdns_sierra_phy *phy = dev_get_priv(dev);
+ int i;
+
+ reset_control_assert(phy->phy_rst);
+
+ /*
+ * The device level resets will be put automatically.
+ * Need to put the subnode resets here though.
+ */
+ for (i = 0; i < phy->nsubnodes; i++)
+ reset_assert_bulk(phy->phys[i].lnk_rst);
+
+ return 0;
+}
+
+/* refclk100MHz_32b_PCIe_cmn_pll_ext_ssc */
+static struct cdns_reg_pairs cdns_pcie_cmn_regs_ext_ssc[] = {
+ {0x2106, SIERRA_CMN_PLLLC_LF_COEFF_MODE1_PREG},
+ {0x2106, SIERRA_CMN_PLLLC_LF_COEFF_MODE0_PREG},
+ {0x8A06, SIERRA_CMN_PLLLC_BWCAL_MODE1_PREG},
+ {0x8A06, SIERRA_CMN_PLLLC_BWCAL_MODE0_PREG},
+ {0x1B1B, SIERRA_CMN_PLLLC_SS_TIME_STEPSIZE_MODE_PREG}
+};
+
+/* refclk100MHz_32b_PCIe_ln_ext_ssc */
+static struct cdns_reg_pairs cdns_pcie_ln_regs_ext_ssc[] = {
+ {0x813E, SIERRA_CLKPATHCTRL_TMR_PREG},
+ {0x8047, SIERRA_RX_CREQ_FLTR_A_MODE3_PREG},
+ {0x808F, SIERRA_RX_CREQ_FLTR_A_MODE2_PREG},
+ {0x808F, SIERRA_RX_CREQ_FLTR_A_MODE1_PREG},
+ {0x808F, SIERRA_RX_CREQ_FLTR_A_MODE0_PREG},
+ {0x033C, SIERRA_RX_CTLE_MAINTENANCE_PREG},
+ {0x44CC, SIERRA_CREQ_EQ_OPEN_EYE_THRESH_PREG}
+};
+
+/* refclk100MHz_20b_USB_cmn_pll_ext_ssc */
+static struct cdns_reg_pairs cdns_usb_cmn_regs_ext_ssc[] = {
+ {0x2085, SIERRA_CMN_PLLLC_LF_COEFF_MODE1_PREG},
+ {0x2085, SIERRA_CMN_PLLLC_LF_COEFF_MODE0_PREG},
+ {0x0000, SIERRA_CMN_PLLLC_BWCAL_MODE0_PREG},
+ {0x0000, SIERRA_CMN_PLLLC_SS_TIME_STEPSIZE_MODE_PREG}
+};
+
+/* refclk100MHz_20b_USB_ln_ext_ssc */
+static struct cdns_reg_pairs cdns_usb_ln_regs_ext_ssc[] = {
+ {0xFE0A, SIERRA_DET_STANDEC_A_PREG},
+ {0x000F, SIERRA_DET_STANDEC_B_PREG},
+ {0x00A5, SIERRA_DET_STANDEC_C_PREG},
+ {0x69ad, SIERRA_DET_STANDEC_D_PREG},
+ {0x0241, SIERRA_DET_STANDEC_E_PREG},
+ {0x0010, SIERRA_PSM_LANECAL_DLY_A1_RESETS_PREG},
+ {0x0014, SIERRA_PSM_A0IN_TMR_PREG},
+ {0xCF00, SIERRA_PSM_DIAG_PREG},
+ {0x001F, SIERRA_PSC_TX_A0_PREG},
+ {0x0007, SIERRA_PSC_TX_A1_PREG},
+ {0x0003, SIERRA_PSC_TX_A2_PREG},
+ {0x0003, SIERRA_PSC_TX_A3_PREG},
+ {0x0FFF, SIERRA_PSC_RX_A0_PREG},
+ {0x0619, SIERRA_PSC_RX_A1_PREG},
+ {0x0003, SIERRA_PSC_RX_A2_PREG},
+ {0x0001, SIERRA_PSC_RX_A3_PREG},
+ {0x0001, SIERRA_PLLCTRL_SUBRATE_PREG},
+ {0x0406, SIERRA_PLLCTRL_GEN_D_PREG},
+ {0x5233, SIERRA_PLLCTRL_CPGAIN_MODE_PREG},
+ {0x00CA, SIERRA_CLKPATH_BIASTRIM_PREG},
+ {0x2512, SIERRA_DFE_BIASTRIM_PREG},
+ {0x0000, SIERRA_DRVCTRL_ATTEN_PREG},
+ {0x873E, SIERRA_CLKPATHCTRL_TMR_PREG},
+ {0x03CF, SIERRA_RX_CREQ_FLTR_A_MODE1_PREG},
+ {0x01CE, SIERRA_RX_CREQ_FLTR_A_MODE0_PREG},
+ {0x7B3C, SIERRA_CREQ_CCLKDET_MODE01_PREG},
+ {0x033F, SIERRA_RX_CTLE_MAINTENANCE_PREG},
+ {0x3232, SIERRA_CREQ_FSMCLK_SEL_PREG},
+ {0x0000, SIERRA_CREQ_EQ_CTRL_PREG},
+ {0x8000, SIERRA_CREQ_SPARE_PREG},
+ {0xCC44, SIERRA_CREQ_EQ_OPEN_EYE_THRESH_PREG},
+ {0x8453, SIERRA_CTLELUT_CTRL_PREG},
+ {0x4110, SIERRA_DFE_ECMP_RATESEL_PREG},
+ {0x4110, SIERRA_DFE_SMP_RATESEL_PREG},
+ {0x0002, SIERRA_DEQ_PHALIGN_CTRL},
+ {0x3200, SIERRA_DEQ_CONCUR_CTRL1_PREG},
+ {0x5064, SIERRA_DEQ_CONCUR_CTRL2_PREG},
+ {0x0030, SIERRA_DEQ_EPIPWR_CTRL2_PREG},
+ {0x0048, SIERRA_DEQ_FAST_MAINT_CYCLES_PREG},
+ {0x5A5A, SIERRA_DEQ_ERRCMP_CTRL_PREG},
+ {0x02F5, SIERRA_DEQ_OFFSET_CTRL_PREG},
+ {0x02F5, SIERRA_DEQ_GAIN_CTRL_PREG},
+ {0x9A8A, SIERRA_DEQ_VGATUNE_CTRL_PREG},
+ {0x0014, SIERRA_DEQ_GLUT0},
+ {0x0014, SIERRA_DEQ_GLUT1},
+ {0x0014, SIERRA_DEQ_GLUT2},
+ {0x0014, SIERRA_DEQ_GLUT3},
+ {0x0014, SIERRA_DEQ_GLUT4},
+ {0x0014, SIERRA_DEQ_GLUT5},
+ {0x0014, SIERRA_DEQ_GLUT6},
+ {0x0014, SIERRA_DEQ_GLUT7},
+ {0x0014, SIERRA_DEQ_GLUT8},
+ {0x0014, SIERRA_DEQ_GLUT9},
+ {0x0014, SIERRA_DEQ_GLUT10},
+ {0x0014, SIERRA_DEQ_GLUT11},
+ {0x0014, SIERRA_DEQ_GLUT12},
+ {0x0014, SIERRA_DEQ_GLUT13},
+ {0x0014, SIERRA_DEQ_GLUT14},
+ {0x0014, SIERRA_DEQ_GLUT15},
+ {0x0014, SIERRA_DEQ_GLUT16},
+ {0x0BAE, SIERRA_DEQ_ALUT0},
+ {0x0AEB, SIERRA_DEQ_ALUT1},
+ {0x0A28, SIERRA_DEQ_ALUT2},
+ {0x0965, SIERRA_DEQ_ALUT3},
+ {0x08A2, SIERRA_DEQ_ALUT4},
+ {0x07DF, SIERRA_DEQ_ALUT5},
+ {0x071C, SIERRA_DEQ_ALUT6},
+ {0x0659, SIERRA_DEQ_ALUT7},
+ {0x0596, SIERRA_DEQ_ALUT8},
+ {0x0514, SIERRA_DEQ_ALUT9},
+ {0x0492, SIERRA_DEQ_ALUT10},
+ {0x0410, SIERRA_DEQ_ALUT11},
+ {0x038E, SIERRA_DEQ_ALUT12},
+ {0x030C, SIERRA_DEQ_ALUT13},
+ {0x03F4, SIERRA_DEQ_DFETAP_CTRL_PREG},
+ {0x0001, SIERRA_DFE_EN_1010_IGNORE_PREG},
+ {0x3C01, SIERRA_DEQ_TAU_CTRL1_FAST_MAINT_PREG},
+ {0x3C40, SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG},
+ {0x1C08, SIERRA_DEQ_TAU_CTRL2_PREG},
+ {0x0033, SIERRA_DEQ_PICTRL_PREG},
+ {0x0400, SIERRA_CPICAL_TMRVAL_MODE1_PREG},
+ {0x0330, SIERRA_CPICAL_TMRVAL_MODE0_PREG},
+ {0x01FF, SIERRA_CPICAL_PICNT_MODE1_PREG},
+ {0x0009, SIERRA_CPI_OUTBUF_RATESEL_PREG},
+ {0x3232, SIERRA_CPICAL_RES_STARTCODE_MODE23_PREG},
+ {0x0005, SIERRA_LFPSDET_SUPPORT_PREG},
+ {0x000F, SIERRA_LFPSFILT_NS_PREG},
+ {0x0009, SIERRA_LFPSFILT_RD_PREG},
+ {0x0001, SIERRA_LFPSFILT_MP_PREG},
+ {0x8013, SIERRA_SDFILT_H2L_A_PREG},
+ {0x8009, SIERRA_SDFILT_L2H_PREG},
+ {0x0024, SIERRA_RXBUFFER_CTLECTRL_PREG},
+ {0x0020, SIERRA_RXBUFFER_RCDFECTRL_PREG},
+ {0x4243, SIERRA_RXBUFFER_DFECTRL_PREG}
+};
+
+static const struct cdns_sierra_data cdns_map_sierra = {
+ SIERRA_MACRO_ID,
+ 0x2,
+ 0x2,
+ ARRAY_SIZE(cdns_pcie_cmn_regs_ext_ssc),
+ ARRAY_SIZE(cdns_pcie_ln_regs_ext_ssc),
+ ARRAY_SIZE(cdns_usb_cmn_regs_ext_ssc),
+ ARRAY_SIZE(cdns_usb_ln_regs_ext_ssc),
+ cdns_pcie_cmn_regs_ext_ssc,
+ cdns_pcie_ln_regs_ext_ssc,
+ cdns_usb_cmn_regs_ext_ssc,
+ cdns_usb_ln_regs_ext_ssc,
+};
+
+static const struct cdns_sierra_data cdns_ti_map_sierra = {
+ SIERRA_MACRO_ID,
+ 0x0,
+ 0x1,
+ ARRAY_SIZE(cdns_pcie_cmn_regs_ext_ssc),
+ ARRAY_SIZE(cdns_pcie_ln_regs_ext_ssc),
+ ARRAY_SIZE(cdns_usb_cmn_regs_ext_ssc),
+ ARRAY_SIZE(cdns_usb_ln_regs_ext_ssc),
+ cdns_pcie_cmn_regs_ext_ssc,
+ cdns_pcie_ln_regs_ext_ssc,
+ cdns_usb_cmn_regs_ext_ssc,
+ cdns_usb_ln_regs_ext_ssc,
+};
+
+static const struct udevice_id cdns_sierra_id_table[] = {
+ {
+ .compatible = "cdns,sierra-phy-t0",
+ .data = (ulong)&cdns_map_sierra,
+ },
+ {
+ .compatible = "ti,sierra-phy-t0",
+ .data = (ulong)&cdns_ti_map_sierra,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sierra_phy_provider) = {
+ .name = "cdns,sierra",
+ .id = UCLASS_PHY,
+ .of_match = cdns_sierra_id_table,
+ .probe = cdns_sierra_phy_probe,
+ .remove = cdns_sierra_phy_remove,
+ .ops = &ops,
+ .priv_auto = sizeof(struct cdns_sierra_phy),
+};
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
new file mode 100644
index 0000000..141ece4
--- /dev/null
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -0,0 +1,2463 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Cadence Torrent SD0801 PHY driver.
+ *
+ * Based on the linux driver provided by Cadence
+ *
+ * Copyright (c) 2018 Cadence Design Systems
+ *
+ * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <generic-phy.h>
+#include <reset.h>
+#include <dm/device.h>
+#include <dm/device_compat.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/read.h>
+#include <dm/uclass.h>
+#include <linux/io.h>
+#include <dt-bindings/phy/phy.h>
+#include <regmap.h>
+#include <linux/delay.h>
+#include <linux/string.h>
+
+#define REF_CLK_19_2MHz 19200000
+#define REF_CLK_25MHz 25000000
+
+#define MAX_NUM_LANES 4
+#define DEFAULT_MAX_BIT_RATE 8100 /* in Mbps*/
+
+#define NUM_SSC_MODE 3
+#define NUM_PHY_TYPE 6
+
+#define POLL_TIMEOUT_US 5000
+#define PLL_LOCK_TIMEOUT 100000
+
+#define TORRENT_COMMON_CDB_OFFSET 0x0
+
+#define TORRENT_TX_LANE_CDB_OFFSET(ln, block_offset, reg_offset) \
+ ((0x4000 << (block_offset)) + \
+ (((ln) << 9) << (reg_offset)))
+#define TORRENT_RX_LANE_CDB_OFFSET(ln, block_offset, reg_offset) \
+ ((0x8000 << (block_offset)) + \
+ (((ln) << 9) << (reg_offset)))
+
+#define TORRENT_PHY_PCS_COMMON_OFFSET(block_offset) \
+ (0xC000 << (block_offset))
+
+#define TORRENT_PHY_PMA_COMMON_OFFSET(block_offset) \
+ (0xE000 << (block_offset))
+
+/*
+ * register offsets from SD0801 PHY register block base (i.e MHDP
+ * register base + 0x500000)
+ */
+#define CMN_SSM_BANDGAP_TMR 0x0021U
+#define CMN_SSM_BIAS_TMR 0x0022U
+#define CMN_PLLSM0_PLLPRE_TMR 0x002AU
+#define CMN_PLLSM0_PLLLOCK_TMR 0x002CU
+#define CMN_PLLSM1_PLLPRE_TMR 0x0032U
+#define CMN_PLLSM1_PLLLOCK_TMR 0x0034U
+#define CMN_CDIAG_CDB_PWRI_OVRD 0x0041U
+#define CMN_CDIAG_XCVRC_PWRI_OVRD 0x0047U
+#define CMN_BGCAL_INIT_TMR 0x0064U
+#define CMN_BGCAL_ITER_TMR 0x0065U
+#define CMN_IBCAL_INIT_TMR 0x0074U
+#define CMN_PLL0_VCOCAL_TCTRL 0x0082U
+#define CMN_PLL0_VCOCAL_INIT_TMR 0x0084U
+#define CMN_PLL0_VCOCAL_ITER_TMR 0x0085U
+#define CMN_PLL0_VCOCAL_REFTIM_START 0x0086U
+#define CMN_PLL0_VCOCAL_PLLCNT_START 0x0088U
+#define CMN_PLL0_INTDIV_M0 0x0090U
+#define CMN_PLL0_FRACDIVL_M0 0x0091U
+#define CMN_PLL0_FRACDIVH_M0 0x0092U
+#define CMN_PLL0_HIGH_THR_M0 0x0093U
+#define CMN_PLL0_DSM_DIAG_M0 0x0094U
+#define CMN_PLL0_SS_CTRL1_M0 0x0098U
+#define CMN_PLL0_SS_CTRL2_M0 0x0099U
+#define CMN_PLL0_SS_CTRL3_M0 0x009AU
+#define CMN_PLL0_SS_CTRL4_M0 0x009BU
+#define CMN_PLL0_LOCK_REFCNT_START 0x009CU
+#define CMN_PLL0_LOCK_PLLCNT_START 0x009EU
+#define CMN_PLL0_LOCK_PLLCNT_THR 0x009FU
+#define CMN_PLL0_INTDIV_M1 0x00A0U
+#define CMN_PLL0_FRACDIVH_M1 0x00A2U
+#define CMN_PLL0_HIGH_THR_M1 0x00A3U
+#define CMN_PLL0_DSM_DIAG_M1 0x00A4U
+#define CMN_PLL0_SS_CTRL1_M1 0x00A8U
+#define CMN_PLL0_SS_CTRL2_M1 0x00A9U
+#define CMN_PLL0_SS_CTRL3_M1 0x00AAU
+#define CMN_PLL0_SS_CTRL4_M1 0x00ABU
+#define CMN_PLL1_VCOCAL_TCTRL 0x00C2U
+#define CMN_PLL1_VCOCAL_INIT_TMR 0x00C4U
+#define CMN_PLL1_VCOCAL_ITER_TMR 0x00C5U
+#define CMN_PLL1_VCOCAL_REFTIM_START 0x00C6U
+#define CMN_PLL1_VCOCAL_PLLCNT_START 0x00C8U
+#define CMN_PLL1_INTDIV_M0 0x00D0U
+#define CMN_PLL1_FRACDIVL_M0 0x00D1U
+#define CMN_PLL1_FRACDIVH_M0 0x00D2U
+#define CMN_PLL1_HIGH_THR_M0 0x00D3U
+#define CMN_PLL1_DSM_DIAG_M0 0x00D4U
+#define CMN_PLL1_DSM_FBH_OVRD_M0 0x00D5U
+#define CMN_PLL1_DSM_FBL_OVRD_M0 0x00D6U
+#define CMN_PLL1_SS_CTRL1_M0 0x00D8U
+#define CMN_PLL1_SS_CTRL2_M0 0x00D9U
+#define CMN_PLL1_SS_CTRL3_M0 0x00DAU
+#define CMN_PLL1_SS_CTRL4_M0 0x00DBU
+#define CMN_PLL1_LOCK_REFCNT_START 0x00DCU
+#define CMN_PLL1_LOCK_PLLCNT_START 0x00DEU
+#define CMN_PLL1_LOCK_PLLCNT_THR 0x00DFU
+#define CMN_TXPUCAL_TUNE 0x0103U
+#define CMN_TXPUCAL_INIT_TMR 0x0104U
+#define CMN_TXPUCAL_ITER_TMR 0x0105U
+#define CMN_CMN_TXPDCAL_OVRD 0x0109U
+#define CMN_TXPDCAL_TUNE 0x010BU
+#define CMN_TXPDCAL_INIT_TMR 0x010CU
+#define CMN_TXPDCAL_ITER_TMR 0x010DU
+#define CMN_RXCAL_INIT_TMR 0x0114U
+#define CMN_RXCAL_ITER_TMR 0x0115U
+#define CMN_SD_CAL_INIT_TMR 0x0124U
+#define CMN_SD_CAL_ITER_TMR 0x0125U
+#define CMN_SD_CAL_REFTIM_START 0x0126U
+#define CMN_SD_CAL_PLLCNT_START 0x0128U
+#define CMN_PDIAG_PLL0_CTRL_M0 0x01A0U
+#define CMN_PDIAG_PLL0_CLK_SEL_M0 0x01A1U
+#define CMN_PDIAG_PLL0_CP_PADJ_M0 0x01A4U
+#define CMN_PDIAG_PLL0_CP_IADJ_M0 0x01A5U
+#define CMN_PDIAG_PLL0_FILT_PADJ_M0 0x01A6U
+#define CMN_PDIAG_PLL0_CTRL_M1 0x01B0U
+#define CMN_PDIAG_PLL0_CLK_SEL_M1 0x01B1U
+#define CMN_PDIAG_PLL0_CP_PADJ_M1 0x01B4U
+#define CMN_PDIAG_PLL0_CP_IADJ_M1 0x01B5U
+#define CMN_PDIAG_PLL0_FILT_PADJ_M1 0x01B6U
+#define CMN_PDIAG_PLL1_CTRL_M0 0x01C0U
+#define CMN_PDIAG_PLL1_CLK_SEL_M0 0x01C1U
+#define CMN_PDIAG_PLL1_CP_PADJ_M0 0x01C4U
+#define CMN_PDIAG_PLL1_CP_IADJ_M0 0x01C5U
+#define CMN_PDIAG_PLL1_FILT_PADJ_M0 0x01C6U
+#define CMN_DIAG_BIAS_OVRD1 0x01E1U
+
+/* PMA TX Lane registers */
+#define TX_TXCC_CTRL 0x0040U
+#define TX_TXCC_CPOST_MULT_00 0x004CU
+#define TX_TXCC_CPOST_MULT_01 0x004DU
+#define TX_TXCC_MGNFS_MULT_000 0x0050U
+#define TX_TXCC_MGNFS_MULT_100 0x0054U
+#define DRV_DIAG_TX_DRV 0x00C6U
+#define XCVR_DIAG_PLLDRC_CTRL 0x00E5U
+#define XCVR_DIAG_HSCLK_SEL 0x00E6U
+#define XCVR_DIAG_HSCLK_DIV 0x00E7U
+#define XCVR_DIAG_RXCLK_CTRL 0x00E9U
+#define XCVR_DIAG_BIDI_CTRL 0x00EAU
+#define XCVR_DIAG_PSC_OVRD 0x00EBU
+#define TX_PSC_A0 0x0100U
+#define TX_PSC_A1 0x0101U
+#define TX_PSC_A2 0x0102U
+#define TX_PSC_A3 0x0103U
+#define TX_RCVDET_ST_TMR 0x0123U
+#define TX_DIAG_ACYA 0x01E7U
+#define TX_DIAG_ACYA_HBDC_MASK 0x0001U
+
+/* PMA RX Lane registers */
+#define RX_PSC_A0 0x0000U
+#define RX_PSC_A1 0x0001U
+#define RX_PSC_A2 0x0002U
+#define RX_PSC_A3 0x0003U
+#define RX_PSC_CAL 0x0006U
+#define RX_CDRLF_CNFG 0x0080U
+#define RX_CDRLF_CNFG3 0x0082U
+#define RX_SIGDET_HL_FILT_TMR 0x0090U
+#define RX_REE_GCSM1_CTRL 0x0108U
+#define RX_REE_GCSM1_EQENM_PH1 0x0109U
+#define RX_REE_GCSM1_EQENM_PH2 0x010AU
+#define RX_REE_GCSM2_CTRL 0x0110U
+#define RX_REE_PERGCSM_CTRL 0x0118U
+#define RX_REE_ATTEN_THR 0x0149U
+#define RX_REE_TAP1_CLIP 0x0171U
+#define RX_REE_TAP2TON_CLIP 0x0172U
+#define RX_REE_SMGM_CTRL1 0x0177U
+#define RX_REE_SMGM_CTRL2 0x0178U
+#define RX_DIAG_DFE_CTRL 0x01E0U
+#define RX_DIAG_DFE_AMP_TUNE_2 0x01E2U
+#define RX_DIAG_DFE_AMP_TUNE_3 0x01E3U
+#define RX_DIAG_NQST_CTRL 0x01E5U
+#define RX_DIAG_SIGDET_TUNE 0x01E8U
+#define RX_DIAG_PI_RATE 0x01F4U
+#define RX_DIAG_PI_CAP 0x01F5U
+#define RX_DIAG_ACYA 0x01FFU
+
+/* PHY PCS common registers */
+#define PHY_PLL_CFG 0x000EU
+#define PHY_PIPE_USB3_GEN2_PRE_CFG0 0x0020U
+#define PHY_PIPE_USB3_GEN2_POST_CFG0 0x0022U
+#define PHY_PIPE_USB3_GEN2_POST_CFG1 0x0023U
+
+/* PHY PMA common registers */
+#define PHY_PMA_CMN_CTRL1 0x0000U
+#define PHY_PMA_CMN_CTRL2 0x0001U
+#define PHY_PMA_PLL_RAW_CTRL 0x0003U
+
+static const struct reg_field phy_pll_cfg = REG_FIELD(PHY_PLL_CFG, 0, 1);
+static const struct reg_field phy_pma_cmn_ctrl_1 =
+ REG_FIELD(PHY_PMA_CMN_CTRL1, 0, 0);
+static const struct reg_field phy_pma_cmn_ctrl_2 =
+ REG_FIELD(PHY_PMA_CMN_CTRL2, 0, 7);
+static const struct reg_field phy_pma_pll_raw_ctrl =
+ REG_FIELD(PHY_PMA_PLL_RAW_CTRL, 0, 1);
+
+#define reset_control_assert reset_assert
+#define reset_control_deassert reset_deassert
+#define reset_control reset_ctl
+#define reset_control_put reset_free
+
+enum cdns_torrent_phy_type {
+ TYPE_NONE,
+ TYPE_DP,
+ TYPE_PCIE,
+ TYPE_SGMII,
+ TYPE_QSGMII,
+ TYPE_USB,
+};
+
+enum cdns_torrent_ssc_mode {
+ NO_SSC,
+ EXTERNAL_SSC,
+ INTERNAL_SSC
+};
+
+struct cdns_torrent_inst {
+ struct phy *phy;
+ u32 mlane;
+ enum cdns_torrent_phy_type phy_type;
+ u32 num_lanes;
+ struct reset_ctl_bulk *lnk_rst;
+ enum cdns_torrent_ssc_mode ssc_mode;
+};
+
+struct cdns_torrent_phy {
+ void __iomem *sd_base; /* SD0801 register base */
+ size_t size;
+ struct reset_control *phy_rst;
+ struct udevice *dev;
+ struct cdns_torrent_inst phys[MAX_NUM_LANES];
+ int nsubnodes;
+ const struct cdns_torrent_data *init_data;
+ struct regmap *regmap;
+ struct regmap *regmap_common_cdb;
+ struct regmap *regmap_phy_pcs_common_cdb;
+ struct regmap *regmap_phy_pma_common_cdb;
+ struct regmap *regmap_tx_lane_cdb[MAX_NUM_LANES];
+ struct regmap *regmap_rx_lane_cdb[MAX_NUM_LANES];
+ struct regmap_field *phy_pll_cfg;
+ struct regmap_field *phy_pma_cmn_ctrl_1;
+ struct regmap_field *phy_pma_cmn_ctrl_2;
+ struct regmap_field *phy_pma_pll_raw_ctrl;
+};
+
+struct cdns_reg_pairs {
+ u32 val;
+ u32 off;
+};
+
+struct cdns_torrent_vals {
+ struct cdns_reg_pairs *reg_pairs;
+ u32 num_regs;
+};
+
+struct cdns_torrent_data {
+ u8 block_offset_shift;
+ u8 reg_offset_shift;
+ struct cdns_torrent_vals *link_cmn_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
+ [NUM_SSC_MODE];
+ struct cdns_torrent_vals *xcvr_diag_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
+ [NUM_SSC_MODE];
+ struct cdns_torrent_vals *pcs_cmn_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
+ [NUM_SSC_MODE];
+ struct cdns_torrent_vals *cmn_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
+ [NUM_SSC_MODE];
+ struct cdns_torrent_vals *tx_ln_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
+ [NUM_SSC_MODE];
+ struct cdns_torrent_vals *rx_ln_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
+ [NUM_SSC_MODE];
+};
+
+static inline struct cdns_torrent_inst *phy_get_drvdata(struct phy *phy)
+{
+ struct cdns_torrent_phy *sp = dev_get_priv(phy->dev);
+ int index;
+
+ if (phy->id >= MAX_NUM_LANES)
+ return NULL;
+
+ for (index = 0; index < sp->nsubnodes; index++) {
+ if (phy->id == sp->phys[index].mlane)
+ return &sp->phys[index];
+ }
+
+ return NULL;
+}
+
+static struct regmap *cdns_regmap_init(struct udevice *dev, void __iomem *base,
+ u32 block_offset,
+ u8 reg_offset_shift)
+{
+ struct cdns_torrent_phy *sp = dev_get_priv(dev);
+ struct regmap_config config;
+
+ config.r_start = (ulong)(base + block_offset);
+ config.r_size = sp->size - block_offset;
+ config.reg_offset_shift = reg_offset_shift;
+ config.width = REGMAP_SIZE_16;
+
+ return devm_regmap_init(dev, NULL, NULL, &config);
+}
+
+static int cdns_torrent_regfield_init(struct cdns_torrent_phy *cdns_phy)
+{
+ struct udevice *dev = cdns_phy->dev;
+ struct regmap_field *field;
+ struct regmap *regmap;
+
+ regmap = cdns_phy->regmap_phy_pcs_common_cdb;
+ field = devm_regmap_field_alloc(dev, regmap, phy_pll_cfg);
+ if (IS_ERR(field)) {
+ dev_err(dev, "PHY_PLL_CFG reg field init failed\n");
+ return PTR_ERR(field);
+ }
+ cdns_phy->phy_pll_cfg = field;
+
+ regmap = cdns_phy->regmap_phy_pma_common_cdb;
+ field = devm_regmap_field_alloc(dev, regmap, phy_pma_cmn_ctrl_1);
+ if (IS_ERR(field)) {
+ dev_err(dev, "PHY_PMA_CMN_CTRL1 reg field init failed\n");
+ return PTR_ERR(field);
+ }
+ cdns_phy->phy_pma_cmn_ctrl_1 = field;
+
+ regmap = cdns_phy->regmap_phy_pma_common_cdb;
+ field = devm_regmap_field_alloc(dev, regmap, phy_pma_cmn_ctrl_2);
+ if (IS_ERR(field)) {
+ dev_err(dev, "PHY_PMA_CMN_CTRL2 reg field init failed\n");
+ return PTR_ERR(field);
+ }
+ cdns_phy->phy_pma_cmn_ctrl_2 = field;
+
+ regmap = cdns_phy->regmap_phy_pma_common_cdb;
+ field = devm_regmap_field_alloc(dev, regmap, phy_pma_pll_raw_ctrl);
+ if (IS_ERR(field)) {
+ dev_err(dev, "PHY_PMA_PLL_RAW_CTRL reg field init failed\n");
+ return PTR_ERR(field);
+ }
+ cdns_phy->phy_pma_pll_raw_ctrl = field;
+
+ return 0;
+}
+
+static int cdns_torrent_regmap_init(struct cdns_torrent_phy *cdns_phy)
+{
+ void __iomem *sd_base = cdns_phy->sd_base;
+ u8 block_offset_shift, reg_offset_shift;
+ struct udevice *dev = cdns_phy->dev;
+ struct regmap *regmap;
+ u32 block_offset;
+ int i;
+
+ block_offset_shift = cdns_phy->init_data->block_offset_shift;
+ reg_offset_shift = cdns_phy->init_data->reg_offset_shift;
+
+ for (i = 0; i < MAX_NUM_LANES; i++) {
+ block_offset = TORRENT_TX_LANE_CDB_OFFSET(i, block_offset_shift,
+ reg_offset_shift);
+
+ regmap = cdns_regmap_init(dev, sd_base, block_offset,
+ reg_offset_shift);
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "Failed to init tx lane CDB regmap\n");
+ return PTR_ERR(regmap);
+ }
+ cdns_phy->regmap_tx_lane_cdb[i] = regmap;
+ block_offset = TORRENT_RX_LANE_CDB_OFFSET(i, block_offset_shift,
+ reg_offset_shift);
+ regmap = cdns_regmap_init(dev, sd_base, block_offset,
+ reg_offset_shift);
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "Failed to init rx lane CDB regmap");
+ return PTR_ERR(regmap);
+ }
+ cdns_phy->regmap_rx_lane_cdb[i] = regmap;
+ }
+
+ block_offset = TORRENT_COMMON_CDB_OFFSET;
+ regmap = cdns_regmap_init(dev, sd_base, block_offset,
+ reg_offset_shift);
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "Failed to init common CDB regmap\n");
+ return PTR_ERR(regmap);
+ }
+ cdns_phy->regmap_common_cdb = regmap;
+
+ block_offset = TORRENT_PHY_PCS_COMMON_OFFSET(block_offset_shift);
+ regmap = cdns_regmap_init(dev, sd_base, block_offset,
+ reg_offset_shift);
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "Failed to init PHY PCS common CDB regmap\n");
+ return PTR_ERR(regmap);
+ }
+ cdns_phy->regmap_phy_pcs_common_cdb = regmap;
+
+ block_offset = TORRENT_PHY_PMA_COMMON_OFFSET(block_offset_shift);
+ regmap = cdns_regmap_init(dev, sd_base, block_offset,
+ reg_offset_shift);
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "Failed to init PHY PMA common CDB regmap\n");
+ return PTR_ERR(regmap);
+ }
+ cdns_phy->regmap_phy_pma_common_cdb = regmap;
+
+ return 0;
+}
+
+static int cdns_torrent_phy_configure_multilink(struct cdns_torrent_phy *cdns_phy)
+{
+ const struct cdns_torrent_data *init_data = cdns_phy->init_data;
+ struct cdns_torrent_vals *cmn_vals, *tx_ln_vals, *rx_ln_vals;
+ struct cdns_torrent_vals *link_cmn_vals, *xcvr_diag_vals;
+ enum cdns_torrent_phy_type phy_t1, phy_t2, tmp_phy_type;
+ struct cdns_torrent_vals *pcs_cmn_vals;
+ int i, j, node, mlane, num_lanes, ret;
+ struct cdns_reg_pairs *reg_pairs;
+ enum cdns_torrent_ssc_mode ssc;
+ struct regmap *regmap;
+ u32 num_regs;
+
+ /* Maximum 2 links (subnodes) are supported */
+ if (cdns_phy->nsubnodes != 2)
+ return -EINVAL;
+
+ phy_t1 = cdns_phy->phys[0].phy_type;
+ phy_t2 = cdns_phy->phys[1].phy_type;
+
+ /*
+ * First configure the PHY for first link with phy_t1. Geth the array
+ * values are [phy_t1][phy_t2][ssc].
+ */
+ for (node = 0; node < cdns_phy->nsubnodes; node++) {
+ if (node == 1) {
+ /*
+ * If fist link with phy_t1 is configured, then
+ * configure the PHY for second link with phy_t2.
+ * Get the array values as [phy_t2][phy_t1][ssc]
+ */
+ tmp_phy_type = phy_t1;
+ phy_t1 = phy_t2;
+ phy_t2 = tmp_phy_type;
+ }
+
+ mlane = cdns_phy->phys[node].mlane;
+ ssc = cdns_phy->phys[node].ssc_mode;
+ num_lanes = cdns_phy->phys[node].num_lanes;
+
+ /**
+ * PHY configuration specific registers:
+ * link_cmn_vals depend on combination of PHY types being
+ * configured and are common for both PHY types, so array
+ * values should be same for [phy_t1][phy_t2][ssc] and
+ * [phy_t2][phy_t1][ssc].
+ * xcvr_diag_vals also depend on combination of PHY types
+ * being configured, but these can be different for particular
+ * PHY type and are per lane.
+ */
+ link_cmn_vals = init_data->link_cmn_vals[phy_t1][phy_t2][ssc];
+ if (link_cmn_vals) {
+ reg_pairs = link_cmn_vals->reg_pairs;
+ num_regs = link_cmn_vals->num_regs;
+ regmap = cdns_phy->regmap_common_cdb;
+
+ /**
+ * First array value in link_cmn_vals must be of
+ * PHY_PLL_CFG register
+ */
+ regmap_field_write(cdns_phy->phy_pll_cfg,
+ reg_pairs[0].val);
+
+ for (i = 1; i < num_regs; i++)
+ regmap_write(regmap, reg_pairs[i].off,
+ reg_pairs[i].val);
+ }
+
+ xcvr_diag_vals = init_data->xcvr_diag_vals[phy_t1][phy_t2][ssc];
+ if (xcvr_diag_vals) {
+ reg_pairs = xcvr_diag_vals->reg_pairs;
+ num_regs = xcvr_diag_vals->num_regs;
+ for (i = 0; i < num_lanes; i++) {
+ regmap = cdns_phy->regmap_tx_lane_cdb[i + mlane];
+ for (j = 0; j < num_regs; j++)
+ regmap_write(regmap, reg_pairs[j].off,
+ reg_pairs[j].val);
+ }
+ }
+
+ /* PHY PCS common registers configurations */
+ pcs_cmn_vals = init_data->pcs_cmn_vals[phy_t1][phy_t2][ssc];
+ if (pcs_cmn_vals) {
+ reg_pairs = pcs_cmn_vals->reg_pairs;
+ num_regs = pcs_cmn_vals->num_regs;
+ regmap = cdns_phy->regmap_phy_pcs_common_cdb;
+ for (i = 0; i < num_regs; i++)
+ regmap_write(regmap, reg_pairs[i].off,
+ reg_pairs[i].val);
+ }
+
+ /* PMA common registers configurations */
+ cmn_vals = init_data->cmn_vals[phy_t1][phy_t2][ssc];
+ if (cmn_vals) {
+ reg_pairs = cmn_vals->reg_pairs;
+ num_regs = cmn_vals->num_regs;
+ regmap = cdns_phy->regmap_common_cdb;
+ for (i = 0; i < num_regs; i++)
+ regmap_write(regmap, reg_pairs[i].off,
+ reg_pairs[i].val);
+ }
+
+ /* PMA TX lane registers configurations */
+ tx_ln_vals = init_data->tx_ln_vals[phy_t1][phy_t2][ssc];
+ if (tx_ln_vals) {
+ reg_pairs = tx_ln_vals->reg_pairs;
+ num_regs = tx_ln_vals->num_regs;
+ for (i = 0; i < num_lanes; i++) {
+ regmap = cdns_phy->regmap_tx_lane_cdb[i + mlane];
+ for (j = 0; j < num_regs; j++)
+ regmap_write(regmap, reg_pairs[j].off,
+ reg_pairs[j].val);
+ }
+ }
+
+ /* PMA RX lane registers configurations */
+ rx_ln_vals = init_data->rx_ln_vals[phy_t1][phy_t2][ssc];
+ if (rx_ln_vals) {
+ reg_pairs = rx_ln_vals->reg_pairs;
+ num_regs = rx_ln_vals->num_regs;
+ for (i = 0; i < num_lanes; i++) {
+ regmap = cdns_phy->regmap_rx_lane_cdb[i + mlane];
+ for (j = 0; j < num_regs; j++)
+ regmap_write(regmap, reg_pairs[j].off,
+ reg_pairs[j].val);
+ }
+ }
+
+ reset_deassert_bulk(cdns_phy->phys[node].lnk_rst);
+ }
+
+ /* Take the PHY out of reset */
+ ret = reset_control_deassert(cdns_phy->phy_rst);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int cdns_torrent_phy_probe(struct udevice *dev)
+{
+ struct cdns_torrent_phy *cdns_phy = dev_get_priv(dev);
+ int ret, subnodes = 0, node = 0, i;
+ struct cdns_torrent_data *data;
+ u32 total_num_lanes = 0;
+ struct clk *clk;
+ ofnode child;
+ u32 phy_type;
+
+ cdns_phy->dev = dev;
+
+ /* Get init data for this phy */
+ data = (struct cdns_torrent_data *)dev_get_driver_data(dev);
+ cdns_phy->init_data = data;
+
+ cdns_phy->phy_rst = devm_reset_control_get_by_index(dev, 0);
+ if (IS_ERR(cdns_phy->phy_rst)) {
+ dev_err(dev, "failed to get reset\n");
+ return PTR_ERR(cdns_phy->phy_rst);
+ }
+
+ clk = devm_clk_get(dev, "refclk");
+ if (IS_ERR(clk)) {
+ dev_err(dev, "phy ref clock not found\n");
+ return PTR_ERR(clk);
+ }
+
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ dev_err(cdns_phy->dev, "Failed to prepare ref clock\n");
+ return ret;
+ }
+
+ cdns_phy->sd_base = devfdt_remap_addr_index(dev, 0);
+ if (IS_ERR(cdns_phy->sd_base))
+ return PTR_ERR(cdns_phy->sd_base);
+ devfdt_get_addr_size_index(dev, 0, (fdt_size_t *)&cdns_phy->size);
+
+ dev_for_each_subnode(child, dev)
+ subnodes++;
+ if (subnodes == 0) {
+ dev_err(dev, "No available link subnodes found\n");
+ return -EINVAL;
+ }
+ ret = cdns_torrent_regmap_init(cdns_phy);
+ if (ret)
+ return ret;
+
+ ret = cdns_torrent_regfield_init(cdns_phy);
+ if (ret)
+ return ret;
+
+ /* Going through all the available subnodes or children*/
+ ofnode_for_each_subnode(child, dev_ofnode(dev)) {
+ /* PHY subnode name must be a 'link' */
+ if (!ofnode_name_eq(child, "link"))
+ continue;
+ cdns_phy->phys[node].lnk_rst =
+ devm_reset_bulk_get_by_node(dev, child);
+ if (IS_ERR(cdns_phy->phys[node].lnk_rst)) {
+ dev_err(dev, "%s: failed to get reset\n",
+ ofnode_get_name(child));
+ ret = PTR_ERR(cdns_phy->phys[node].lnk_rst);
+ goto put_lnk_rst;
+ }
+
+ if (ofnode_read_u32(child, "reg",
+ &cdns_phy->phys[node].mlane)) {
+ dev_err(dev, "%s: No \"reg \" - property.\n",
+ ofnode_get_name(child));
+ ret = -EINVAL;
+ goto put_child;
+ }
+
+ if (ofnode_read_u32(child, "cdns,phy-type", &phy_type)) {
+ dev_err(dev, "%s: No \"cdns,phy-type \" - property.\n",
+ ofnode_get_name(child));
+ ret = -EINVAL;
+ goto put_child;
+ }
+
+ switch (phy_type) {
+ case PHY_TYPE_PCIE:
+ cdns_phy->phys[node].phy_type = TYPE_PCIE;
+ break;
+ case PHY_TYPE_DP:
+ cdns_phy->phys[node].phy_type = TYPE_DP;
+ break;
+ case PHY_TYPE_SGMII:
+ cdns_phy->phys[node].phy_type = TYPE_SGMII;
+ break;
+ case PHY_TYPE_QSGMII:
+ cdns_phy->phys[node].phy_type = TYPE_QSGMII;
+ break;
+ case PHY_TYPE_USB3:
+ cdns_phy->phys[node].phy_type = TYPE_USB;
+ break;
+ default:
+ dev_err(dev, "Unsupported protocol\n");
+ ret = -EINVAL;
+ goto put_child;
+ }
+
+ if (ofnode_read_u32(child, "cdns,num-lanes",
+ &cdns_phy->phys[node].num_lanes)) {
+ dev_err(dev, "%s: No \"cdns,num-lanes \" - property.\n",
+ ofnode_get_name(child));
+ ret = -EINVAL;
+ goto put_child;
+ }
+
+ total_num_lanes += cdns_phy->phys[node].num_lanes;
+
+ /* Get SSC mode */
+ ofnode_read_u32(child, "cdns,ssc-mode",
+ &cdns_phy->phys[node].ssc_mode);
+ node++;
+ }
+
+ cdns_phy->nsubnodes = node;
+
+ if (total_num_lanes > MAX_NUM_LANES) {
+ dev_err(dev, "Invalid lane configuration\n");
+ goto put_lnk_rst;
+ }
+
+ if (cdns_phy->nsubnodes > 1) {
+ ret = cdns_torrent_phy_configure_multilink(cdns_phy);
+ if (ret)
+ goto put_lnk_rst;
+ }
+
+ reset_control_deassert(cdns_phy->phy_rst);
+ return 0;
+
+put_child:
+ node++;
+put_lnk_rst:
+ for (i = 0; i < node; i++)
+ reset_release_bulk(cdns_phy->phys[i].lnk_rst);
+ return ret;
+}
+
+static int cdns_torrent_phy_on(struct phy *gphy)
+{
+ struct cdns_torrent_inst *inst = phy_get_drvdata(gphy);
+ struct cdns_torrent_phy *cdns_phy = dev_get_priv(gphy->dev);
+ u32 read_val;
+ int ret;
+
+ if (cdns_phy->nsubnodes == 1) {
+ /* Take the PHY lane group out of reset */
+ reset_deassert_bulk(inst->lnk_rst);
+
+ /* Take the PHY out of reset */
+ ret = reset_control_deassert(cdns_phy->phy_rst);
+ if (ret)
+ return ret;
+ }
+
+ /*
+ * Wait for cmn_ready assertion
+ * PHY_PMA_CMN_CTRL1[0] == 1
+ */
+ ret = regmap_field_read_poll_timeout(cdns_phy->phy_pma_cmn_ctrl_1,
+ read_val, read_val, 1000,
+ PLL_LOCK_TIMEOUT);
+ if (ret) {
+ dev_err(cdns_phy->dev, "Timeout waiting for CMN ready\n");
+ return ret;
+ }
+ mdelay(10);
+
+ return 0;
+}
+
+static int cdns_torrent_phy_init(struct phy *phy)
+{
+ struct cdns_torrent_phy *cdns_phy = dev_get_priv(phy->dev);
+ const struct cdns_torrent_data *init_data = cdns_phy->init_data;
+ struct cdns_torrent_vals *cmn_vals, *tx_ln_vals, *rx_ln_vals;
+ struct cdns_torrent_vals *link_cmn_vals, *xcvr_diag_vals;
+ struct cdns_torrent_inst *inst = phy_get_drvdata(phy);
+ enum cdns_torrent_phy_type phy_type = inst->phy_type;
+ enum cdns_torrent_ssc_mode ssc = inst->ssc_mode;
+ struct cdns_torrent_vals *pcs_cmn_vals;
+ struct cdns_reg_pairs *reg_pairs;
+ struct regmap *regmap;
+ u32 num_regs;
+ int i, j;
+
+ if (cdns_phy->nsubnodes > 1)
+ return 0;
+
+ /**
+ * Spread spectrum generation is not required or supported
+ * for SGMII/QSGMII
+ */
+ if (phy_type == TYPE_SGMII || phy_type == TYPE_QSGMII)
+ ssc = NO_SSC;
+
+ /* PHY configuration specific registers for single link */
+ link_cmn_vals = init_data->link_cmn_vals[phy_type][TYPE_NONE][ssc];
+ if (link_cmn_vals) {
+ reg_pairs = link_cmn_vals->reg_pairs;
+ num_regs = link_cmn_vals->num_regs;
+ regmap = cdns_phy->regmap_common_cdb;
+
+ /**
+ * First array value in link_cmn_vals must be of
+ * PHY_PLL_CFG register
+ */
+ regmap_field_write(cdns_phy->phy_pll_cfg, reg_pairs[0].val);
+
+ for (i = 1; i < num_regs; i++)
+ regmap_write(regmap, reg_pairs[i].off,
+ reg_pairs[i].val);
+ }
+
+ xcvr_diag_vals = init_data->xcvr_diag_vals[phy_type][TYPE_NONE][ssc];
+ if (xcvr_diag_vals) {
+ reg_pairs = xcvr_diag_vals->reg_pairs;
+ num_regs = xcvr_diag_vals->num_regs;
+ for (i = 0; i < inst->num_lanes; i++) {
+ regmap = cdns_phy->regmap_tx_lane_cdb[i + inst->mlane];
+ for (j = 0; j < num_regs; j++)
+ regmap_write(regmap, reg_pairs[j].off,
+ reg_pairs[j].val);
+ }
+ }
+
+ /* PHY PCS common registers configurations */
+ pcs_cmn_vals = init_data->pcs_cmn_vals[phy_type][TYPE_NONE][ssc];
+ if (pcs_cmn_vals) {
+ reg_pairs = pcs_cmn_vals->reg_pairs;
+ num_regs = pcs_cmn_vals->num_regs;
+ regmap = cdns_phy->regmap_phy_pcs_common_cdb;
+ for (i = 0; i < num_regs; i++)
+ regmap_write(regmap, reg_pairs[i].off,
+ reg_pairs[i].val);
+ }
+
+ /* PMA common registers configurations */
+ cmn_vals = init_data->cmn_vals[phy_type][TYPE_NONE][ssc];
+ if (cmn_vals) {
+ reg_pairs = cmn_vals->reg_pairs;
+ num_regs = cmn_vals->num_regs;
+ regmap = cdns_phy->regmap_common_cdb;
+ for (i = 0; i < num_regs; i++)
+ regmap_write(regmap, reg_pairs[i].off,
+ reg_pairs[i].val);
+ }
+
+ /* PMA TX lane registers configurations */
+ tx_ln_vals = init_data->tx_ln_vals[phy_type][TYPE_NONE][ssc];
+ if (tx_ln_vals) {
+ reg_pairs = tx_ln_vals->reg_pairs;
+ num_regs = tx_ln_vals->num_regs;
+ for (i = 0; i < inst->num_lanes; i++) {
+ regmap = cdns_phy->regmap_tx_lane_cdb[i + inst->mlane];
+ for (j = 0; j < num_regs; j++)
+ regmap_write(regmap, reg_pairs[j].off,
+ reg_pairs[j].val);
+ }
+ }
+
+ /* PMA RX lane registers configurations */
+ rx_ln_vals = init_data->rx_ln_vals[phy_type][TYPE_NONE][ssc];
+ if (rx_ln_vals) {
+ reg_pairs = rx_ln_vals->reg_pairs;
+ num_regs = rx_ln_vals->num_regs;
+ for (i = 0; i < inst->num_lanes; i++) {
+ regmap = cdns_phy->regmap_rx_lane_cdb[i + inst->mlane];
+ for (j = 0; j < num_regs; j++)
+ regmap_write(regmap, reg_pairs[j].off,
+ reg_pairs[j].val);
+ }
+ }
+
+ return 0;
+}
+
+static int cdns_torrent_phy_off(struct phy *gphy)
+{
+ struct cdns_torrent_inst *inst = phy_get_drvdata(gphy);
+ struct cdns_torrent_phy *cdns_phy = dev_get_priv(gphy->dev);
+ int ret;
+
+ if (cdns_phy->nsubnodes != 1)
+ return 0;
+
+ ret = reset_control_assert(cdns_phy->phy_rst);
+ if (ret)
+ return ret;
+
+ return reset_assert_bulk(inst->lnk_rst);
+}
+
+static int cdns_torrent_phy_remove(struct udevice *dev)
+{
+ struct cdns_torrent_phy *cdns_phy = dev_get_priv(dev);
+ int i;
+
+ reset_control_assert(cdns_phy->phy_rst);
+ for (i = 0; i < cdns_phy->nsubnodes; i++)
+ reset_release_bulk(cdns_phy->phys[i].lnk_rst);
+
+ return 0;
+}
+
+/* USB and SGMII/QSGMII link configuration */
+static struct cdns_reg_pairs usb_sgmii_link_cmn_regs[] = {
+ {0x0002, PHY_PLL_CFG},
+ {0x8600, CMN_PDIAG_PLL0_CLK_SEL_M0},
+ {0x0601, CMN_PDIAG_PLL1_CLK_SEL_M0}
+};
+
+static struct cdns_reg_pairs usb_sgmii_xcvr_diag_ln_regs[] = {
+ {0x0000, XCVR_DIAG_HSCLK_SEL},
+ {0x0001, XCVR_DIAG_HSCLK_DIV},
+ {0x0041, XCVR_DIAG_PLLDRC_CTRL}
+};
+
+static struct cdns_reg_pairs sgmii_usb_xcvr_diag_ln_regs[] = {
+ {0x0011, XCVR_DIAG_HSCLK_SEL},
+ {0x0003, XCVR_DIAG_HSCLK_DIV},
+ {0x009B, XCVR_DIAG_PLLDRC_CTRL}
+};
+
+static struct cdns_torrent_vals usb_sgmii_link_cmn_vals = {
+ .reg_pairs = usb_sgmii_link_cmn_regs,
+ .num_regs = ARRAY_SIZE(usb_sgmii_link_cmn_regs),
+};
+
+static struct cdns_torrent_vals usb_sgmii_xcvr_diag_ln_vals = {
+ .reg_pairs = usb_sgmii_xcvr_diag_ln_regs,
+ .num_regs = ARRAY_SIZE(usb_sgmii_xcvr_diag_ln_regs),
+};
+
+static struct cdns_torrent_vals sgmii_usb_xcvr_diag_ln_vals = {
+ .reg_pairs = sgmii_usb_xcvr_diag_ln_regs,
+ .num_regs = ARRAY_SIZE(sgmii_usb_xcvr_diag_ln_regs),
+};
+
+/* PCIe and USB Unique SSC link configuration */
+static struct cdns_reg_pairs pcie_usb_link_cmn_regs[] = {
+ {0x0003, PHY_PLL_CFG},
+ {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0},
+ {0x0400, CMN_PDIAG_PLL0_CLK_SEL_M1},
+ {0x8600, CMN_PDIAG_PLL1_CLK_SEL_M0}
+};
+
+static struct cdns_reg_pairs pcie_usb_xcvr_diag_ln_regs[] = {
+ {0x0000, XCVR_DIAG_HSCLK_SEL},
+ {0x0001, XCVR_DIAG_HSCLK_DIV},
+ {0x0012, XCVR_DIAG_PLLDRC_CTRL}
+};
+
+static struct cdns_reg_pairs usb_pcie_xcvr_diag_ln_regs[] = {
+ {0x0011, XCVR_DIAG_HSCLK_SEL},
+ {0x0001, XCVR_DIAG_HSCLK_DIV},
+ {0x00C9, XCVR_DIAG_PLLDRC_CTRL}
+};
+
+static struct cdns_torrent_vals pcie_usb_link_cmn_vals = {
+ .reg_pairs = pcie_usb_link_cmn_regs,
+ .num_regs = ARRAY_SIZE(pcie_usb_link_cmn_regs),
+};
+
+static struct cdns_torrent_vals pcie_usb_xcvr_diag_ln_vals = {
+ .reg_pairs = pcie_usb_xcvr_diag_ln_regs,
+ .num_regs = ARRAY_SIZE(pcie_usb_xcvr_diag_ln_regs),
+};
+
+static struct cdns_torrent_vals usb_pcie_xcvr_diag_ln_vals = {
+ .reg_pairs = usb_pcie_xcvr_diag_ln_regs,
+ .num_regs = ARRAY_SIZE(usb_pcie_xcvr_diag_ln_regs),
+};
+
+/* USB 100 MHz Ref clk, internal SSC */
+static struct cdns_reg_pairs usb_100_int_ssc_cmn_regs[] = {
+ {0x0004, CMN_PLL0_DSM_DIAG_M0},
+ {0x0004, CMN_PLL0_DSM_DIAG_M1},
+ {0x0004, CMN_PLL1_DSM_DIAG_M0},
+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
+ {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
+ {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
+ {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
+ {0x0064, CMN_PLL0_INTDIV_M0},
+ {0x0050, CMN_PLL0_INTDIV_M1},
+ {0x0064, CMN_PLL1_INTDIV_M0},
+ {0x0002, CMN_PLL0_FRACDIVH_M0},
+ {0x0002, CMN_PLL0_FRACDIVH_M1},
+ {0x0002, CMN_PLL1_FRACDIVH_M0},
+ {0x0044, CMN_PLL0_HIGH_THR_M0},
+ {0x0036, CMN_PLL0_HIGH_THR_M1},
+ {0x0044, CMN_PLL1_HIGH_THR_M0},
+ {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
+ {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
+ {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
+ {0x0001, CMN_PLL0_SS_CTRL1_M0},
+ {0x0001, CMN_PLL0_SS_CTRL1_M1},
+ {0x0001, CMN_PLL1_SS_CTRL1_M0},
+ {0x011B, CMN_PLL0_SS_CTRL2_M0},
+ {0x011B, CMN_PLL0_SS_CTRL2_M1},
+ {0x011B, CMN_PLL1_SS_CTRL2_M0},
+ {0x006E, CMN_PLL0_SS_CTRL3_M0},
+ {0x0058, CMN_PLL0_SS_CTRL3_M1},
+ {0x006E, CMN_PLL1_SS_CTRL3_M0},
+ {0x000E, CMN_PLL0_SS_CTRL4_M0},
+ {0x0012, CMN_PLL0_SS_CTRL4_M1},
+ {0x000E, CMN_PLL1_SS_CTRL4_M0},
+ {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
+ {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
+ {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
+ {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
+ {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
+ {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
+ {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
+ {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
+ {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
+ {0x0005, CMN_PLL1_LOCK_PLLCNT_THR},
+ {0x8200, CMN_CDIAG_CDB_PWRI_OVRD},
+ {0x8200, CMN_CDIAG_XCVRC_PWRI_OVRD},
+ {0x007F, CMN_TXPUCAL_TUNE},
+ {0x007F, CMN_TXPDCAL_TUNE}
+};
+
+static struct cdns_torrent_vals usb_100_int_ssc_cmn_vals = {
+ .reg_pairs = usb_100_int_ssc_cmn_regs,
+ .num_regs = ARRAY_SIZE(usb_100_int_ssc_cmn_regs),
+};
+
+/* Single USB link configuration */
+static struct cdns_reg_pairs sl_usb_link_cmn_regs[] = {
+ {0x0000, PHY_PLL_CFG},
+ {0x8600, CMN_PDIAG_PLL0_CLK_SEL_M0}
+};
+
+static struct cdns_reg_pairs sl_usb_xcvr_diag_ln_regs[] = {
+ {0x0000, XCVR_DIAG_HSCLK_SEL},
+ {0x0001, XCVR_DIAG_HSCLK_DIV},
+ {0x0041, XCVR_DIAG_PLLDRC_CTRL}
+};
+
+static struct cdns_torrent_vals sl_usb_link_cmn_vals = {
+ .reg_pairs = sl_usb_link_cmn_regs,
+ .num_regs = ARRAY_SIZE(sl_usb_link_cmn_regs),
+};
+
+static struct cdns_torrent_vals sl_usb_xcvr_diag_ln_vals = {
+ .reg_pairs = sl_usb_xcvr_diag_ln_regs,
+ .num_regs = ARRAY_SIZE(sl_usb_xcvr_diag_ln_regs),
+};
+
+/* USB PHY PCS common configuration */
+static struct cdns_reg_pairs usb_phy_pcs_cmn_regs[] = {
+ {0x0A0A, PHY_PIPE_USB3_GEN2_PRE_CFG0},
+ {0x1000, PHY_PIPE_USB3_GEN2_POST_CFG0},
+ {0x0010, PHY_PIPE_USB3_GEN2_POST_CFG1}
+};
+
+static struct cdns_torrent_vals usb_phy_pcs_cmn_vals = {
+ .reg_pairs = usb_phy_pcs_cmn_regs,
+ .num_regs = ARRAY_SIZE(usb_phy_pcs_cmn_regs),
+};
+
+/* USB 100 MHz Ref clk, no SSC */
+static struct cdns_reg_pairs sl_usb_100_no_ssc_cmn_regs[] = {
+ {0x0028, CMN_PDIAG_PLL1_CP_PADJ_M0},
+ {0x001E, CMN_PLL1_DSM_FBH_OVRD_M0},
+ {0x000C, CMN_PLL1_DSM_FBL_OVRD_M0},
+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
+ {0x0003, CMN_PLL1_VCOCAL_TCTRL},
+ {0x8200, CMN_CDIAG_CDB_PWRI_OVRD},
+ {0x8200, CMN_CDIAG_XCVRC_PWRI_OVRD}
+};
+
+static struct cdns_torrent_vals sl_usb_100_no_ssc_cmn_vals = {
+ .reg_pairs = sl_usb_100_no_ssc_cmn_regs,
+ .num_regs = ARRAY_SIZE(sl_usb_100_no_ssc_cmn_regs),
+};
+
+static struct cdns_reg_pairs usb_100_no_ssc_cmn_regs[] = {
+ {0x8200, CMN_CDIAG_CDB_PWRI_OVRD},
+ {0x8200, CMN_CDIAG_XCVRC_PWRI_OVRD},
+ {0x007F, CMN_TXPUCAL_TUNE},
+ {0x007F, CMN_TXPDCAL_TUNE}
+};
+
+static struct cdns_reg_pairs usb_100_no_ssc_tx_ln_regs[] = {
+ {0x02FF, TX_PSC_A0},
+ {0x06AF, TX_PSC_A1},
+ {0x06AE, TX_PSC_A2},
+ {0x06AE, TX_PSC_A3},
+ {0x2A82, TX_TXCC_CTRL},
+ {0x0014, TX_TXCC_CPOST_MULT_01},
+ {0x0003, XCVR_DIAG_PSC_OVRD}
+};
+
+static struct cdns_reg_pairs usb_100_no_ssc_rx_ln_regs[] = {
+ {0x0D1D, RX_PSC_A0},
+ {0x0D1D, RX_PSC_A1},
+ {0x0D00, RX_PSC_A2},
+ {0x0500, RX_PSC_A3},
+ {0x0013, RX_SIGDET_HL_FILT_TMR},
+ {0x0000, RX_REE_GCSM1_CTRL},
+ {0x0C02, RX_REE_ATTEN_THR},
+ {0x0330, RX_REE_SMGM_CTRL1},
+ {0x0300, RX_REE_SMGM_CTRL2},
+ {0x0019, RX_REE_TAP1_CLIP},
+ {0x0019, RX_REE_TAP2TON_CLIP},
+ {0x1004, RX_DIAG_SIGDET_TUNE},
+ {0x00F9, RX_DIAG_NQST_CTRL},
+ {0x0C01, RX_DIAG_DFE_AMP_TUNE_2},
+ {0x0002, RX_DIAG_DFE_AMP_TUNE_3},
+ {0x0000, RX_DIAG_PI_CAP},
+ {0x0031, RX_DIAG_PI_RATE},
+ {0x0001, RX_DIAG_ACYA},
+ {0x018C, RX_CDRLF_CNFG},
+ {0x0003, RX_CDRLF_CNFG3}
+};
+
+static struct cdns_torrent_vals usb_100_no_ssc_cmn_vals = {
+ .reg_pairs = usb_100_no_ssc_cmn_regs,
+ .num_regs = ARRAY_SIZE(usb_100_no_ssc_cmn_regs),
+};
+
+static struct cdns_torrent_vals usb_100_no_ssc_tx_ln_vals = {
+ .reg_pairs = usb_100_no_ssc_tx_ln_regs,
+ .num_regs = ARRAY_SIZE(usb_100_no_ssc_tx_ln_regs),
+};
+
+static struct cdns_torrent_vals usb_100_no_ssc_rx_ln_vals = {
+ .reg_pairs = usb_100_no_ssc_rx_ln_regs,
+ .num_regs = ARRAY_SIZE(usb_100_no_ssc_rx_ln_regs),
+};
+
+/* Single link USB, 100 MHz Ref clk, internal SSC */
+static struct cdns_reg_pairs sl_usb_100_int_ssc_cmn_regs[] = {
+ {0x0004, CMN_PLL0_DSM_DIAG_M0},
+ {0x0004, CMN_PLL1_DSM_DIAG_M0},
+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
+ {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
+ {0x0064, CMN_PLL0_INTDIV_M0},
+ {0x0064, CMN_PLL1_INTDIV_M0},
+ {0x0002, CMN_PLL0_FRACDIVH_M0},
+ {0x0002, CMN_PLL1_FRACDIVH_M0},
+ {0x0044, CMN_PLL0_HIGH_THR_M0},
+ {0x0044, CMN_PLL1_HIGH_THR_M0},
+ {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
+ {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
+ {0x0001, CMN_PLL0_SS_CTRL1_M0},
+ {0x0001, CMN_PLL1_SS_CTRL1_M0},
+ {0x011B, CMN_PLL0_SS_CTRL2_M0},
+ {0x011B, CMN_PLL1_SS_CTRL2_M0},
+ {0x006E, CMN_PLL0_SS_CTRL3_M0},
+ {0x006E, CMN_PLL1_SS_CTRL3_M0},
+ {0x000E, CMN_PLL0_SS_CTRL4_M0},
+ {0x000E, CMN_PLL1_SS_CTRL4_M0},
+ {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
+ {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
+ {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
+ {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
+ {0x0003, CMN_PLL1_VCOCAL_TCTRL},
+ {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
+ {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
+ {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
+ {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
+ {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
+ {0x0005, CMN_PLL1_LOCK_PLLCNT_THR},
+ {0x8200, CMN_CDIAG_CDB_PWRI_OVRD},
+ {0x8200, CMN_CDIAG_XCVRC_PWRI_OVRD}
+};
+
+static struct cdns_torrent_vals sl_usb_100_int_ssc_cmn_vals = {
+ .reg_pairs = sl_usb_100_int_ssc_cmn_regs,
+ .num_regs = ARRAY_SIZE(sl_usb_100_int_ssc_cmn_regs),
+};
+
+/* PCIe and SGMII/QSGMII Unique SSC link configuration */
+static struct cdns_reg_pairs pcie_sgmii_link_cmn_regs[] = {
+ {0x0003, PHY_PLL_CFG},
+ {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0},
+ {0x0400, CMN_PDIAG_PLL0_CLK_SEL_M1},
+ {0x0601, CMN_PDIAG_PLL1_CLK_SEL_M0}
+};
+
+static struct cdns_reg_pairs pcie_sgmii_xcvr_diag_ln_regs[] = {
+ {0x0000, XCVR_DIAG_HSCLK_SEL},
+ {0x0001, XCVR_DIAG_HSCLK_DIV},
+ {0x0012, XCVR_DIAG_PLLDRC_CTRL}
+};
+
+static struct cdns_reg_pairs sgmii_pcie_xcvr_diag_ln_regs[] = {
+ {0x0011, XCVR_DIAG_HSCLK_SEL},
+ {0x0003, XCVR_DIAG_HSCLK_DIV},
+ {0x009B, XCVR_DIAG_PLLDRC_CTRL}
+};
+
+static struct cdns_torrent_vals pcie_sgmii_link_cmn_vals = {
+ .reg_pairs = pcie_sgmii_link_cmn_regs,
+ .num_regs = ARRAY_SIZE(pcie_sgmii_link_cmn_regs),
+};
+
+static struct cdns_torrent_vals pcie_sgmii_xcvr_diag_ln_vals = {
+ .reg_pairs = pcie_sgmii_xcvr_diag_ln_regs,
+ .num_regs = ARRAY_SIZE(pcie_sgmii_xcvr_diag_ln_regs),
+};
+
+static struct cdns_torrent_vals sgmii_pcie_xcvr_diag_ln_vals = {
+ .reg_pairs = sgmii_pcie_xcvr_diag_ln_regs,
+ .num_regs = ARRAY_SIZE(sgmii_pcie_xcvr_diag_ln_regs),
+};
+
+/* SGMII 100 MHz Ref clk, no SSC */
+static struct cdns_reg_pairs sl_sgmii_100_no_ssc_cmn_regs[] = {
+ {0x0028, CMN_PDIAG_PLL1_CP_PADJ_M0},
+ {0x001E, CMN_PLL1_DSM_FBH_OVRD_M0},
+ {0x000C, CMN_PLL1_DSM_FBL_OVRD_M0},
+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
+ {0x0003, CMN_PLL1_VCOCAL_TCTRL}
+};
+
+static struct cdns_torrent_vals sl_sgmii_100_no_ssc_cmn_vals = {
+ .reg_pairs = sl_sgmii_100_no_ssc_cmn_regs,
+ .num_regs = ARRAY_SIZE(sl_sgmii_100_no_ssc_cmn_regs),
+};
+
+static struct cdns_reg_pairs sgmii_100_no_ssc_cmn_regs[] = {
+ {0x007F, CMN_TXPUCAL_TUNE},
+ {0x007F, CMN_TXPDCAL_TUNE}
+};
+
+static struct cdns_reg_pairs sgmii_100_no_ssc_tx_ln_regs[] = {
+ {0x00F3, TX_PSC_A0},
+ {0x04A2, TX_PSC_A2},
+ {0x04A2, TX_PSC_A3},
+ {0x0000, TX_TXCC_CPOST_MULT_00},
+ {0x00B3, DRV_DIAG_TX_DRV}
+};
+
+static struct cdns_reg_pairs ti_sgmii_100_no_ssc_tx_ln_regs[] = {
+ {0x00F3, TX_PSC_A0},
+ {0x04A2, TX_PSC_A2},
+ {0x04A2, TX_PSC_A3},
+ {0x0000, TX_TXCC_CPOST_MULT_00},
+ {0x00B3, DRV_DIAG_TX_DRV},
+ {0x4000, XCVR_DIAG_RXCLK_CTRL},
+};
+
+static struct cdns_reg_pairs sgmii_100_no_ssc_rx_ln_regs[] = {
+ {0x091D, RX_PSC_A0},
+ {0x0900, RX_PSC_A2},
+ {0x0100, RX_PSC_A3},
+ {0x03C7, RX_REE_GCSM1_EQENM_PH1},
+ {0x01C7, RX_REE_GCSM1_EQENM_PH2},
+ {0x0000, RX_DIAG_DFE_CTRL},
+ {0x0019, RX_REE_TAP1_CLIP},
+ {0x0019, RX_REE_TAP2TON_CLIP},
+ {0x0098, RX_DIAG_NQST_CTRL},
+ {0x0C01, RX_DIAG_DFE_AMP_TUNE_2},
+ {0x0000, RX_DIAG_DFE_AMP_TUNE_3},
+ {0x0000, RX_DIAG_PI_CAP},
+ {0x0010, RX_DIAG_PI_RATE},
+ {0x0001, RX_DIAG_ACYA},
+ {0x018C, RX_CDRLF_CNFG},
+};
+
+static struct cdns_torrent_vals sgmii_100_no_ssc_cmn_vals = {
+ .reg_pairs = sgmii_100_no_ssc_cmn_regs,
+ .num_regs = ARRAY_SIZE(sgmii_100_no_ssc_cmn_regs),
+};
+
+static struct cdns_torrent_vals sgmii_100_no_ssc_tx_ln_vals = {
+ .reg_pairs = sgmii_100_no_ssc_tx_ln_regs,
+ .num_regs = ARRAY_SIZE(sgmii_100_no_ssc_tx_ln_regs),
+};
+
+static struct cdns_torrent_vals ti_sgmii_100_no_ssc_tx_ln_vals = {
+ .reg_pairs = ti_sgmii_100_no_ssc_tx_ln_regs,
+ .num_regs = ARRAY_SIZE(ti_sgmii_100_no_ssc_tx_ln_regs),
+};
+
+static struct cdns_torrent_vals sgmii_100_no_ssc_rx_ln_vals = {
+ .reg_pairs = sgmii_100_no_ssc_rx_ln_regs,
+ .num_regs = ARRAY_SIZE(sgmii_100_no_ssc_rx_ln_regs),
+};
+
+/* SGMII 100 MHz Ref clk, internal SSC */
+static struct cdns_reg_pairs sgmii_100_int_ssc_cmn_regs[] = {
+ {0x0004, CMN_PLL0_DSM_DIAG_M0},
+ {0x0004, CMN_PLL0_DSM_DIAG_M1},
+ {0x0004, CMN_PLL1_DSM_DIAG_M0},
+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
+ {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
+ {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
+ {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
+ {0x0064, CMN_PLL0_INTDIV_M0},
+ {0x0050, CMN_PLL0_INTDIV_M1},
+ {0x0064, CMN_PLL1_INTDIV_M0},
+ {0x0002, CMN_PLL0_FRACDIVH_M0},
+ {0x0002, CMN_PLL0_FRACDIVH_M1},
+ {0x0002, CMN_PLL1_FRACDIVH_M0},
+ {0x0044, CMN_PLL0_HIGH_THR_M0},
+ {0x0036, CMN_PLL0_HIGH_THR_M1},
+ {0x0044, CMN_PLL1_HIGH_THR_M0},
+ {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
+ {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
+ {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
+ {0x0001, CMN_PLL0_SS_CTRL1_M0},
+ {0x0001, CMN_PLL0_SS_CTRL1_M1},
+ {0x0001, CMN_PLL1_SS_CTRL1_M0},
+ {0x011B, CMN_PLL0_SS_CTRL2_M0},
+ {0x011B, CMN_PLL0_SS_CTRL2_M1},
+ {0x011B, CMN_PLL1_SS_CTRL2_M0},
+ {0x006E, CMN_PLL0_SS_CTRL3_M0},
+ {0x0058, CMN_PLL0_SS_CTRL3_M1},
+ {0x006E, CMN_PLL1_SS_CTRL3_M0},
+ {0x000E, CMN_PLL0_SS_CTRL4_M0},
+ {0x0012, CMN_PLL0_SS_CTRL4_M1},
+ {0x000E, CMN_PLL1_SS_CTRL4_M0},
+ {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
+ {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
+ {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
+ {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
+ {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
+ {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
+ {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
+ {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
+ {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
+ {0x0005, CMN_PLL1_LOCK_PLLCNT_THR},
+ {0x007F, CMN_TXPUCAL_TUNE},
+ {0x007F, CMN_TXPDCAL_TUNE}
+};
+
+static struct cdns_torrent_vals sgmii_100_int_ssc_cmn_vals = {
+ .reg_pairs = sgmii_100_int_ssc_cmn_regs,
+ .num_regs = ARRAY_SIZE(sgmii_100_int_ssc_cmn_regs),
+};
+
+/* QSGMII 100 MHz Ref clk, no SSC */
+static struct cdns_reg_pairs sl_qsgmii_100_no_ssc_cmn_regs[] = {
+ {0x0028, CMN_PDIAG_PLL1_CP_PADJ_M0},
+ {0x001E, CMN_PLL1_DSM_FBH_OVRD_M0},
+ {0x000C, CMN_PLL1_DSM_FBL_OVRD_M0},
+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
+ {0x0003, CMN_PLL1_VCOCAL_TCTRL}
+};
+
+static struct cdns_torrent_vals sl_qsgmii_100_no_ssc_cmn_vals = {
+ .reg_pairs = sl_qsgmii_100_no_ssc_cmn_regs,
+ .num_regs = ARRAY_SIZE(sl_qsgmii_100_no_ssc_cmn_regs),
+};
+
+static struct cdns_reg_pairs qsgmii_100_no_ssc_cmn_regs[] = {
+ {0x007F, CMN_TXPUCAL_TUNE},
+ {0x007F, CMN_TXPDCAL_TUNE}
+};
+
+static struct cdns_reg_pairs qsgmii_100_no_ssc_tx_ln_regs[] = {
+ {0x00F3, TX_PSC_A0},
+ {0x04A2, TX_PSC_A2},
+ {0x04A2, TX_PSC_A3},
+ {0x0000, TX_TXCC_CPOST_MULT_00},
+ {0x0011, TX_TXCC_MGNFS_MULT_100},
+ {0x0003, DRV_DIAG_TX_DRV}
+};
+
+static struct cdns_reg_pairs ti_qsgmii_100_no_ssc_tx_ln_regs[] = {
+ {0x00F3, TX_PSC_A0},
+ {0x04A2, TX_PSC_A2},
+ {0x04A2, TX_PSC_A3},
+ {0x0000, TX_TXCC_CPOST_MULT_00},
+ {0x0011, TX_TXCC_MGNFS_MULT_100},
+ {0x0003, DRV_DIAG_TX_DRV},
+ {0x4000, XCVR_DIAG_RXCLK_CTRL},
+};
+
+static struct cdns_reg_pairs qsgmii_100_no_ssc_rx_ln_regs[] = {
+ {0x091D, RX_PSC_A0},
+ {0x0900, RX_PSC_A2},
+ {0x0100, RX_PSC_A3},
+ {0x03C7, RX_REE_GCSM1_EQENM_PH1},
+ {0x01C7, RX_REE_GCSM1_EQENM_PH2},
+ {0x0000, RX_DIAG_DFE_CTRL},
+ {0x0019, RX_REE_TAP1_CLIP},
+ {0x0019, RX_REE_TAP2TON_CLIP},
+ {0x0098, RX_DIAG_NQST_CTRL},
+ {0x0C01, RX_DIAG_DFE_AMP_TUNE_2},
+ {0x0000, RX_DIAG_DFE_AMP_TUNE_3},
+ {0x0000, RX_DIAG_PI_CAP},
+ {0x0010, RX_DIAG_PI_RATE},
+ {0x0001, RX_DIAG_ACYA},
+ {0x018C, RX_CDRLF_CNFG},
+};
+
+static struct cdns_torrent_vals qsgmii_100_no_ssc_cmn_vals = {
+ .reg_pairs = qsgmii_100_no_ssc_cmn_regs,
+ .num_regs = ARRAY_SIZE(qsgmii_100_no_ssc_cmn_regs),
+};
+
+static struct cdns_torrent_vals qsgmii_100_no_ssc_tx_ln_vals = {
+ .reg_pairs = qsgmii_100_no_ssc_tx_ln_regs,
+ .num_regs = ARRAY_SIZE(qsgmii_100_no_ssc_tx_ln_regs),
+};
+
+static struct cdns_torrent_vals ti_qsgmii_100_no_ssc_tx_ln_vals = {
+ .reg_pairs = ti_qsgmii_100_no_ssc_tx_ln_regs,
+ .num_regs = ARRAY_SIZE(ti_qsgmii_100_no_ssc_tx_ln_regs),
+};
+
+static struct cdns_torrent_vals qsgmii_100_no_ssc_rx_ln_vals = {
+ .reg_pairs = qsgmii_100_no_ssc_rx_ln_regs,
+ .num_regs = ARRAY_SIZE(qsgmii_100_no_ssc_rx_ln_regs),
+};
+
+/* QSGMII 100 MHz Ref clk, internal SSC */
+static struct cdns_reg_pairs qsgmii_100_int_ssc_cmn_regs[] = {
+ {0x0004, CMN_PLL0_DSM_DIAG_M0},
+ {0x0004, CMN_PLL0_DSM_DIAG_M1},
+ {0x0004, CMN_PLL1_DSM_DIAG_M0},
+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
+ {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
+ {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
+ {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
+ {0x0064, CMN_PLL0_INTDIV_M0},
+ {0x0050, CMN_PLL0_INTDIV_M1},
+ {0x0064, CMN_PLL1_INTDIV_M0},
+ {0x0002, CMN_PLL0_FRACDIVH_M0},
+ {0x0002, CMN_PLL0_FRACDIVH_M1},
+ {0x0002, CMN_PLL1_FRACDIVH_M0},
+ {0x0044, CMN_PLL0_HIGH_THR_M0},
+ {0x0036, CMN_PLL0_HIGH_THR_M1},
+ {0x0044, CMN_PLL1_HIGH_THR_M0},
+ {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
+ {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
+ {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
+ {0x0001, CMN_PLL0_SS_CTRL1_M0},
+ {0x0001, CMN_PLL0_SS_CTRL1_M1},
+ {0x0001, CMN_PLL1_SS_CTRL1_M0},
+ {0x011B, CMN_PLL0_SS_CTRL2_M0},
+ {0x011B, CMN_PLL0_SS_CTRL2_M1},
+ {0x011B, CMN_PLL1_SS_CTRL2_M0},
+ {0x006E, CMN_PLL0_SS_CTRL3_M0},
+ {0x0058, CMN_PLL0_SS_CTRL3_M1},
+ {0x006E, CMN_PLL1_SS_CTRL3_M0},
+ {0x000E, CMN_PLL0_SS_CTRL4_M0},
+ {0x0012, CMN_PLL0_SS_CTRL4_M1},
+ {0x000E, CMN_PLL1_SS_CTRL4_M0},
+ {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
+ {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
+ {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
+ {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
+ {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
+ {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
+ {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
+ {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
+ {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
+ {0x0005, CMN_PLL1_LOCK_PLLCNT_THR},
+ {0x007F, CMN_TXPUCAL_TUNE},
+ {0x007F, CMN_TXPDCAL_TUNE}
+};
+
+static struct cdns_torrent_vals qsgmii_100_int_ssc_cmn_vals = {
+ .reg_pairs = qsgmii_100_int_ssc_cmn_regs,
+ .num_regs = ARRAY_SIZE(qsgmii_100_int_ssc_cmn_regs),
+};
+
+/* Single SGMII/QSGMII link configuration */
+static struct cdns_reg_pairs sl_sgmii_link_cmn_regs[] = {
+ {0x0000, PHY_PLL_CFG},
+ {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0}
+};
+
+static struct cdns_reg_pairs sl_sgmii_xcvr_diag_ln_regs[] = {
+ {0x0000, XCVR_DIAG_HSCLK_SEL},
+ {0x0003, XCVR_DIAG_HSCLK_DIV},
+ {0x0013, XCVR_DIAG_PLLDRC_CTRL}
+};
+
+static struct cdns_torrent_vals sl_sgmii_link_cmn_vals = {
+ .reg_pairs = sl_sgmii_link_cmn_regs,
+ .num_regs = ARRAY_SIZE(sl_sgmii_link_cmn_regs),
+};
+
+static struct cdns_torrent_vals sl_sgmii_xcvr_diag_ln_vals = {
+ .reg_pairs = sl_sgmii_xcvr_diag_ln_regs,
+ .num_regs = ARRAY_SIZE(sl_sgmii_xcvr_diag_ln_regs),
+};
+
+/* Multi link PCIe, 100 MHz Ref clk, internal SSC */
+static struct cdns_reg_pairs pcie_100_int_ssc_cmn_regs[] = {
+ {0x0004, CMN_PLL0_DSM_DIAG_M0},
+ {0x0004, CMN_PLL0_DSM_DIAG_M1},
+ {0x0004, CMN_PLL1_DSM_DIAG_M0},
+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
+ {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
+ {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
+ {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
+ {0x0064, CMN_PLL0_INTDIV_M0},
+ {0x0050, CMN_PLL0_INTDIV_M1},
+ {0x0064, CMN_PLL1_INTDIV_M0},
+ {0x0002, CMN_PLL0_FRACDIVH_M0},
+ {0x0002, CMN_PLL0_FRACDIVH_M1},
+ {0x0002, CMN_PLL1_FRACDIVH_M0},
+ {0x0044, CMN_PLL0_HIGH_THR_M0},
+ {0x0036, CMN_PLL0_HIGH_THR_M1},
+ {0x0044, CMN_PLL1_HIGH_THR_M0},
+ {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
+ {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
+ {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
+ {0x0001, CMN_PLL0_SS_CTRL1_M0},
+ {0x0001, CMN_PLL0_SS_CTRL1_M1},
+ {0x0001, CMN_PLL1_SS_CTRL1_M0},
+ {0x011B, CMN_PLL0_SS_CTRL2_M0},
+ {0x011B, CMN_PLL0_SS_CTRL2_M1},
+ {0x011B, CMN_PLL1_SS_CTRL2_M0},
+ {0x006E, CMN_PLL0_SS_CTRL3_M0},
+ {0x0058, CMN_PLL0_SS_CTRL3_M1},
+ {0x006E, CMN_PLL1_SS_CTRL3_M0},
+ {0x000E, CMN_PLL0_SS_CTRL4_M0},
+ {0x0012, CMN_PLL0_SS_CTRL4_M1},
+ {0x000E, CMN_PLL1_SS_CTRL4_M0},
+ {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
+ {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
+ {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
+ {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
+ {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
+ {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
+ {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
+ {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
+ {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
+ {0x0005, CMN_PLL1_LOCK_PLLCNT_THR}
+};
+
+static struct cdns_torrent_vals pcie_100_int_ssc_cmn_vals = {
+ .reg_pairs = pcie_100_int_ssc_cmn_regs,
+ .num_regs = ARRAY_SIZE(pcie_100_int_ssc_cmn_regs),
+};
+
+/* Single link PCIe, 100 MHz Ref clk, internal SSC */
+static struct cdns_reg_pairs sl_pcie_100_int_ssc_cmn_regs[] = {
+ {0x0004, CMN_PLL0_DSM_DIAG_M0},
+ {0x0004, CMN_PLL0_DSM_DIAG_M1},
+ {0x0004, CMN_PLL1_DSM_DIAG_M0},
+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
+ {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
+ {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
+ {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
+ {0x0064, CMN_PLL0_INTDIV_M0},
+ {0x0050, CMN_PLL0_INTDIV_M1},
+ {0x0050, CMN_PLL1_INTDIV_M0},
+ {0x0002, CMN_PLL0_FRACDIVH_M0},
+ {0x0002, CMN_PLL0_FRACDIVH_M1},
+ {0x0002, CMN_PLL1_FRACDIVH_M0},
+ {0x0044, CMN_PLL0_HIGH_THR_M0},
+ {0x0036, CMN_PLL0_HIGH_THR_M1},
+ {0x0036, CMN_PLL1_HIGH_THR_M0},
+ {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
+ {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
+ {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
+ {0x0001, CMN_PLL0_SS_CTRL1_M0},
+ {0x0001, CMN_PLL0_SS_CTRL1_M1},
+ {0x0001, CMN_PLL1_SS_CTRL1_M0},
+ {0x011B, CMN_PLL0_SS_CTRL2_M0},
+ {0x011B, CMN_PLL0_SS_CTRL2_M1},
+ {0x011B, CMN_PLL1_SS_CTRL2_M0},
+ {0x006E, CMN_PLL0_SS_CTRL3_M0},
+ {0x0058, CMN_PLL0_SS_CTRL3_M1},
+ {0x0058, CMN_PLL1_SS_CTRL3_M0},
+ {0x000E, CMN_PLL0_SS_CTRL4_M0},
+ {0x0012, CMN_PLL0_SS_CTRL4_M1},
+ {0x0012, CMN_PLL1_SS_CTRL4_M0},
+ {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
+ {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
+ {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
+ {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
+ {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
+ {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
+ {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
+ {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
+ {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
+ {0x0005, CMN_PLL1_LOCK_PLLCNT_THR}
+};
+
+static struct cdns_torrent_vals sl_pcie_100_int_ssc_cmn_vals = {
+ .reg_pairs = sl_pcie_100_int_ssc_cmn_regs,
+ .num_regs = ARRAY_SIZE(sl_pcie_100_int_ssc_cmn_regs),
+};
+
+/* PCIe, 100 MHz Ref clk, no SSC & external SSC */
+static struct cdns_reg_pairs pcie_100_ext_no_ssc_cmn_regs[] = {
+ {0x0028, CMN_PDIAG_PLL1_CP_PADJ_M0},
+ {0x001E, CMN_PLL1_DSM_FBH_OVRD_M0},
+ {0x000C, CMN_PLL1_DSM_FBL_OVRD_M0}
+};
+
+static struct cdns_reg_pairs pcie_100_ext_no_ssc_rx_ln_regs[] = {
+ {0x0019, RX_REE_TAP1_CLIP},
+ {0x0019, RX_REE_TAP2TON_CLIP},
+ {0x0001, RX_DIAG_ACYA}
+};
+
+static struct cdns_torrent_vals pcie_100_no_ssc_cmn_vals = {
+ .reg_pairs = pcie_100_ext_no_ssc_cmn_regs,
+ .num_regs = ARRAY_SIZE(pcie_100_ext_no_ssc_cmn_regs),
+};
+
+static struct cdns_torrent_vals pcie_100_no_ssc_rx_ln_vals = {
+ .reg_pairs = pcie_100_ext_no_ssc_rx_ln_regs,
+ .num_regs = ARRAY_SIZE(pcie_100_ext_no_ssc_rx_ln_regs),
+};
+
+static const struct cdns_torrent_data cdns_map_torrent = {
+ .block_offset_shift = 0x2,
+ .reg_offset_shift = 0x2,
+ .link_cmn_vals = {
+ [TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &pcie_usb_link_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_usb_link_cmn_vals,
+ [INTERNAL_SSC] = &pcie_usb_link_cmn_vals,
+ },
+ },
+ [TYPE_SGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_sgmii_link_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ },
+ },
+ [TYPE_QSGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_sgmii_link_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ },
+ },
+ [TYPE_USB] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_usb_link_cmn_vals,
+ [EXTERNAL_SSC] = &sl_usb_link_cmn_vals,
+ [INTERNAL_SSC] = &sl_usb_link_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &pcie_usb_link_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_usb_link_cmn_vals,
+ [INTERNAL_SSC] = &pcie_usb_link_cmn_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ },
+ },
+ },
+ .xcvr_diag_vals = {
+ [TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &pcie_usb_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &pcie_usb_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &pcie_usb_xcvr_diag_ln_vals,
+ },
+ },
+ [TYPE_SGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_sgmii_xcvr_diag_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
+ },
+ },
+ [TYPE_QSGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_sgmii_xcvr_diag_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
+ },
+ },
+ [TYPE_USB] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_usb_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &sl_usb_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &sl_usb_xcvr_diag_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &usb_pcie_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &usb_pcie_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &usb_pcie_xcvr_diag_ln_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
+ },
+ },
+ },
+ .pcs_cmn_vals = {
+ [TYPE_USB] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ },
+ },
+ },
+ .cmn_vals = {
+ [TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = &sl_pcie_100_int_ssc_cmn_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &pcie_100_int_ssc_cmn_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &pcie_100_int_ssc_cmn_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &pcie_100_int_ssc_cmn_vals,
+ },
+ },
+ [TYPE_SGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_sgmii_100_no_ssc_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &sgmii_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &sgmii_100_int_ssc_cmn_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &sgmii_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &sgmii_100_no_ssc_cmn_vals,
+ },
+ },
+ [TYPE_QSGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_qsgmii_100_no_ssc_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &qsgmii_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &qsgmii_100_int_ssc_cmn_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &qsgmii_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_cmn_vals,
+ },
+ },
+ [TYPE_USB] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_usb_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &sl_usb_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &sl_usb_100_int_ssc_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &usb_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &usb_100_int_ssc_cmn_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &sl_usb_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &sl_usb_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &sl_usb_100_int_ssc_cmn_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &sl_usb_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &sl_usb_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &sl_usb_100_int_ssc_cmn_vals,
+ },
+ },
+ },
+ .tx_ln_vals = {
+ [TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
+ },
+ [TYPE_SGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
+ },
+ },
+ [TYPE_QSGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
+ },
+ },
+ [TYPE_USB] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ },
+ },
+ },
+ .rx_ln_vals = {
+ [TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ },
+ },
+ [TYPE_SGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ },
+ },
+ [TYPE_QSGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ },
+ },
+ [TYPE_USB] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ },
+ },
+ },
+};
+
+static const struct cdns_torrent_data ti_j721e_map_torrent = {
+ .block_offset_shift = 0x0,
+ .reg_offset_shift = 0x1,
+ .link_cmn_vals = {
+ [TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &pcie_usb_link_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_usb_link_cmn_vals,
+ [INTERNAL_SSC] = &pcie_usb_link_cmn_vals,
+ },
+ },
+ [TYPE_SGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_sgmii_link_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ },
+ },
+ [TYPE_QSGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_sgmii_link_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ },
+ },
+ [TYPE_USB] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_usb_link_cmn_vals,
+ [EXTERNAL_SSC] = &sl_usb_link_cmn_vals,
+ [INTERNAL_SSC] = &sl_usb_link_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &pcie_usb_link_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_usb_link_cmn_vals,
+ [INTERNAL_SSC] = &pcie_usb_link_cmn_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
+ },
+ },
+ },
+ .xcvr_diag_vals = {
+ [TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &pcie_usb_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &pcie_usb_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &pcie_usb_xcvr_diag_ln_vals,
+ },
+ },
+ [TYPE_SGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_sgmii_xcvr_diag_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
+ },
+ },
+ [TYPE_QSGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_sgmii_xcvr_diag_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
+ },
+ },
+ [TYPE_USB] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_usb_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &sl_usb_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &sl_usb_xcvr_diag_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &usb_pcie_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &usb_pcie_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &usb_pcie_xcvr_diag_ln_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
+ [EXTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
+ [INTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
+ },
+ },
+ },
+ .pcs_cmn_vals = {
+ [TYPE_USB] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
+ },
+ },
+ },
+ .cmn_vals = {
+ [TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = &sl_pcie_100_int_ssc_cmn_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &pcie_100_int_ssc_cmn_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &pcie_100_int_ssc_cmn_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &pcie_100_int_ssc_cmn_vals,
+ },
+ },
+ [TYPE_SGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_sgmii_100_no_ssc_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &sgmii_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &sgmii_100_int_ssc_cmn_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &sgmii_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &sgmii_100_no_ssc_cmn_vals,
+ },
+ },
+ [TYPE_QSGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_qsgmii_100_no_ssc_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &qsgmii_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &qsgmii_100_int_ssc_cmn_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &qsgmii_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_cmn_vals,
+ },
+ },
+ [TYPE_USB] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sl_usb_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &sl_usb_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &sl_usb_100_int_ssc_cmn_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &usb_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &usb_100_int_ssc_cmn_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &sl_usb_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &sl_usb_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &sl_usb_100_int_ssc_cmn_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &sl_usb_100_no_ssc_cmn_vals,
+ [EXTERNAL_SSC] = &sl_usb_100_no_ssc_cmn_vals,
+ [INTERNAL_SSC] = &sl_usb_100_int_ssc_cmn_vals,
+ },
+ },
+ },
+ .tx_ln_vals = {
+ [TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = NULL,
+ [EXTERNAL_SSC] = NULL,
+ [INTERNAL_SSC] = NULL,
+ },
+ },
+ [TYPE_SGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &ti_sgmii_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &ti_sgmii_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &ti_sgmii_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &ti_sgmii_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &ti_sgmii_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &ti_sgmii_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &ti_sgmii_100_no_ssc_tx_ln_vals,
+ },
+ },
+ [TYPE_QSGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &ti_qsgmii_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &ti_qsgmii_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &ti_qsgmii_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &ti_qsgmii_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &ti_qsgmii_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &ti_qsgmii_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &ti_qsgmii_100_no_ssc_tx_ln_vals,
+ },
+ },
+ [TYPE_USB] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
+ },
+ },
+ },
+ .rx_ln_vals = {
+ [TYPE_PCIE] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
+ },
+ },
+ [TYPE_SGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
+ },
+ },
+ [TYPE_QSGMII] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_USB] = {
+ [NO_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
+ },
+ },
+ [TYPE_USB] = {
+ [TYPE_NONE] = {
+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_PCIE] = {
+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_SGMII] = {
+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ },
+ [TYPE_QSGMII] = {
+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
+ },
+ },
+ },
+};
+
+static int cdns_torrent_phy_reset(struct phy *gphy)
+{
+ struct cdns_torrent_phy *sp = dev_get_priv(gphy->dev);
+
+ reset_control_assert(sp->phy_rst);
+ reset_control_deassert(sp->phy_rst);
+ return 0;
+}
+
+static const struct udevice_id cdns_torrent_id_table[] = {
+ {
+ .compatible = "cdns,torrent-phy",
+ .data = (ulong)&cdns_map_torrent,
+ },
+ {
+ .compatible = "ti,j721e-serdes-10g",
+ .data = (ulong)&ti_j721e_map_torrent,
+ },
+ {}
+};
+
+static const struct phy_ops cdns_torrent_phy_ops = {
+ .init = cdns_torrent_phy_init,
+ .power_on = cdns_torrent_phy_on,
+ .power_off = cdns_torrent_phy_off,
+ .reset = cdns_torrent_phy_reset,
+};
+
+U_BOOT_DRIVER(torrent_phy_provider) = {
+ .name = "cdns,torrent",
+ .id = UCLASS_PHY,
+ .of_match = cdns_torrent_id_table,
+ .probe = cdns_torrent_phy_probe,
+ .remove = cdns_torrent_phy_remove,
+ .ops = &cdns_torrent_phy_ops,
+ .priv_auto = sizeof(struct cdns_torrent_phy),
+};
diff --git a/drivers/phy/ti/Kconfig b/drivers/phy/ti/Kconfig
new file mode 100644
index 0000000..111085f
--- /dev/null
+++ b/drivers/phy/ti/Kconfig
@@ -0,0 +1,9 @@
+config PHY_J721E_WIZ
+ tristate "TI J721E WIZ (SERDES Wrapper) support"
+ depends on ARCH_K3
+ help
+ This option enables support for WIZ module present in TI's J721E
+ SoC. WIZ is a serdes wrapper used to configure some of the input
+ signals to the SERDES (Sierra/Torrent). This driver configures
+ three clock selects (pll0, pll1, dig) and resets for each of the
+ lanes.
diff --git a/drivers/phy/ti/Makefile b/drivers/phy/ti/Makefile
new file mode 100644
index 0000000..873ddbf
--- /dev/null
+++ b/drivers/phy/ti/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_$(SPL_)PHY_J721E_WIZ) += phy-j721e-wiz.o
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
new file mode 100644
index 0000000..d74efcd
--- /dev/null
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -0,0 +1,1156 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
+ * Jean-Jacques Hiblot <jjhiblot@ti.com>
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <asm/gpio.h>
+#include <dm/lists.h>
+#include <dm/device-internal.h>
+#include <regmap.h>
+#include <reset-uclass.h>
+#include <dt-bindings/phy/phy.h>
+
+#include <dt-bindings/phy/phy-ti.h>
+
+#define WIZ_MAX_INPUT_CLOCKS 4
+/* To include mux clocks, divider clocks and gate clocks */
+#define WIZ_MAX_OUTPUT_CLOCKS 32
+
+#define WIZ_MAX_LANES 4
+#define WIZ_MUX_NUM_CLOCKS 3
+#define WIZ_DIV_NUM_CLOCKS_16G 2
+#define WIZ_DIV_NUM_CLOCKS_10G 1
+
+#define WIZ_SERDES_CTRL 0x404
+#define WIZ_SERDES_TOP_CTRL 0x408
+#define WIZ_SERDES_RST 0x40c
+#define WIZ_SERDES_TYPEC 0x410
+#define WIZ_LANECTL(n) (0x480 + (0x40 * (n)))
+#define WIZ_LANEDIV(n) (0x484 + (0x40 * (n)))
+
+#define WIZ_MAX_LANES 4
+#define WIZ_MUX_NUM_CLOCKS 3
+#define WIZ_DIV_NUM_CLOCKS_16G 2
+#define WIZ_DIV_NUM_CLOCKS_10G 1
+
+#define WIZ_SERDES_TYPEC_LN10_SWAP BIT(30)
+
+enum wiz_lane_standard_mode {
+ LANE_MODE_GEN1,
+ LANE_MODE_GEN2,
+ LANE_MODE_GEN3,
+ LANE_MODE_GEN4,
+};
+
+enum wiz_refclk_mux_sel {
+ PLL0_REFCLK,
+ PLL1_REFCLK,
+ REFCLK_DIG,
+};
+
+enum wiz_refclk_div_sel {
+ CMN_REFCLK,
+ CMN_REFCLK1,
+};
+
+enum wiz_clock_input {
+ WIZ_CORE_REFCLK,
+ WIZ_EXT_REFCLK,
+ WIZ_CORE_REFCLK1,
+ WIZ_EXT_REFCLK1,
+};
+
+static const struct reg_field por_en = REG_FIELD(WIZ_SERDES_CTRL, 31, 31);
+static const struct reg_field phy_reset_n = REG_FIELD(WIZ_SERDES_RST, 31, 31);
+static const struct reg_field pll1_refclk_mux_sel =
+ REG_FIELD(WIZ_SERDES_RST, 29, 29);
+static const struct reg_field pll0_refclk_mux_sel =
+ REG_FIELD(WIZ_SERDES_RST, 28, 28);
+static const struct reg_field refclk_dig_sel_16g =
+ REG_FIELD(WIZ_SERDES_RST, 24, 25);
+static const struct reg_field refclk_dig_sel_10g =
+ REG_FIELD(WIZ_SERDES_RST, 24, 24);
+static const struct reg_field pma_cmn_refclk_int_mode =
+ REG_FIELD(WIZ_SERDES_TOP_CTRL, 28, 29);
+static const struct reg_field pma_cmn_refclk_mode =
+ REG_FIELD(WIZ_SERDES_TOP_CTRL, 30, 31);
+static const struct reg_field pma_cmn_refclk_dig_div =
+ REG_FIELD(WIZ_SERDES_TOP_CTRL, 26, 27);
+static const struct reg_field pma_cmn_refclk1_dig_div =
+ REG_FIELD(WIZ_SERDES_TOP_CTRL, 24, 25);
+
+static const struct reg_field p_enable[WIZ_MAX_LANES] = {
+ REG_FIELD(WIZ_LANECTL(0), 30, 31),
+ REG_FIELD(WIZ_LANECTL(1), 30, 31),
+ REG_FIELD(WIZ_LANECTL(2), 30, 31),
+ REG_FIELD(WIZ_LANECTL(3), 30, 31),
+};
+
+enum p_enable { P_ENABLE = 2, P_ENABLE_FORCE = 1, P_ENABLE_DISABLE = 0 };
+
+static const struct reg_field p_align[WIZ_MAX_LANES] = {
+ REG_FIELD(WIZ_LANECTL(0), 29, 29),
+ REG_FIELD(WIZ_LANECTL(1), 29, 29),
+ REG_FIELD(WIZ_LANECTL(2), 29, 29),
+ REG_FIELD(WIZ_LANECTL(3), 29, 29),
+};
+
+static const struct reg_field p_raw_auto_start[WIZ_MAX_LANES] = {
+ REG_FIELD(WIZ_LANECTL(0), 28, 28),
+ REG_FIELD(WIZ_LANECTL(1), 28, 28),
+ REG_FIELD(WIZ_LANECTL(2), 28, 28),
+ REG_FIELD(WIZ_LANECTL(3), 28, 28),
+};
+
+static const struct reg_field p_standard_mode[WIZ_MAX_LANES] = {
+ REG_FIELD(WIZ_LANECTL(0), 24, 25),
+ REG_FIELD(WIZ_LANECTL(1), 24, 25),
+ REG_FIELD(WIZ_LANECTL(2), 24, 25),
+ REG_FIELD(WIZ_LANECTL(3), 24, 25),
+};
+
+static const struct reg_field p0_fullrt_div[WIZ_MAX_LANES] = {
+ REG_FIELD(WIZ_LANECTL(0), 22, 23),
+ REG_FIELD(WIZ_LANECTL(1), 22, 23),
+ REG_FIELD(WIZ_LANECTL(2), 22, 23),
+ REG_FIELD(WIZ_LANECTL(3), 22, 23),
+};
+
+static const struct reg_field p_mac_div_sel0[WIZ_MAX_LANES] = {
+ REG_FIELD(WIZ_LANEDIV(0), 16, 22),
+ REG_FIELD(WIZ_LANEDIV(1), 16, 22),
+ REG_FIELD(WIZ_LANEDIV(2), 16, 22),
+ REG_FIELD(WIZ_LANEDIV(3), 16, 22),
+};
+
+static const struct reg_field p_mac_div_sel1[WIZ_MAX_LANES] = {
+ REG_FIELD(WIZ_LANEDIV(0), 0, 8),
+ REG_FIELD(WIZ_LANEDIV(1), 0, 8),
+ REG_FIELD(WIZ_LANEDIV(2), 0, 8),
+ REG_FIELD(WIZ_LANEDIV(3), 0, 8),
+};
+
+struct wiz_clk_mux_sel {
+ enum wiz_refclk_mux_sel mux_sel;
+ u32 table[WIZ_MAX_INPUT_CLOCKS];
+ const char *node_name;
+ u32 num_parents;
+ u32 parents[WIZ_MAX_INPUT_CLOCKS];
+};
+
+struct wiz_clk_div_sel {
+ enum wiz_refclk_div_sel div_sel;
+ const char *node_name;
+};
+
+static struct wiz_clk_mux_sel clk_mux_sel_16g[] = {
+ {
+ /*
+ * Mux value to be configured for each of the input clocks
+ * in the order populated in device tree
+ */
+ .num_parents = 2,
+ .parents = { WIZ_CORE_REFCLK, WIZ_EXT_REFCLK },
+ .mux_sel = PLL0_REFCLK,
+ .table = { 1, 0 },
+ .node_name = "pll0-refclk",
+ },
+ {
+ .num_parents = 2,
+ .parents = { WIZ_CORE_REFCLK1, WIZ_EXT_REFCLK1 },
+ .mux_sel = PLL1_REFCLK,
+ .table = { 1, 0 },
+ .node_name = "pll1-refclk",
+ },
+ {
+ .num_parents = 4,
+ .parents = { WIZ_CORE_REFCLK, WIZ_CORE_REFCLK1, WIZ_EXT_REFCLK, WIZ_EXT_REFCLK1 },
+ .mux_sel = REFCLK_DIG,
+ .table = { 1, 3, 0, 2 },
+ .node_name = "refclk-dig",
+ },
+};
+
+static struct wiz_clk_mux_sel clk_mux_sel_10g[] = {
+ {
+ /*
+ * Mux value to be configured for each of the input clocks
+ * in the order populated in device tree
+ */
+ .num_parents = 2,
+ .parents = { WIZ_CORE_REFCLK, WIZ_EXT_REFCLK },
+ .mux_sel = PLL0_REFCLK,
+ .table = { 1, 0 },
+ .node_name = "pll0-refclk",
+ },
+ {
+ .num_parents = 2,
+ .parents = { WIZ_CORE_REFCLK, WIZ_EXT_REFCLK },
+ .mux_sel = PLL1_REFCLK,
+ .table = { 1, 0 },
+ .node_name = "pll1-refclk",
+ },
+ {
+ .num_parents = 2,
+ .parents = { WIZ_CORE_REFCLK, WIZ_EXT_REFCLK },
+ .mux_sel = REFCLK_DIG,
+ .table = { 1, 0 },
+ .node_name = "refclk-dig",
+ },
+};
+
+static struct wiz_clk_div_sel clk_div_sel[] = {
+ {
+ .div_sel = CMN_REFCLK,
+ .node_name = "cmn-refclk-dig-div",
+ },
+ {
+ .div_sel = CMN_REFCLK1,
+ .node_name = "cmn-refclk1-dig-div",
+ },
+};
+
+enum wiz_type {
+ J721E_WIZ_16G,
+ J721E_WIZ_10G,
+ AM64_WIZ_10G,
+};
+
+#define WIZ_TYPEC_DIR_DEBOUNCE_MIN 100 /* ms */
+#define WIZ_TYPEC_DIR_DEBOUNCE_MAX 1000
+
+struct wiz {
+ struct regmap *regmap;
+ enum wiz_type type;
+ struct wiz_clk_mux_sel *clk_mux_sel;
+ struct wiz_clk_div_sel *clk_div_sel;
+ unsigned int clk_div_sel_num;
+ struct regmap_field *por_en;
+ struct regmap_field *phy_reset_n;
+ struct regmap_field *phy_en_refclk;
+ struct regmap_field *p_enable[WIZ_MAX_LANES];
+ struct regmap_field *p_align[WIZ_MAX_LANES];
+ struct regmap_field *p_raw_auto_start[WIZ_MAX_LANES];
+ struct regmap_field *p_standard_mode[WIZ_MAX_LANES];
+ struct regmap_field *p_mac_div_sel0[WIZ_MAX_LANES];
+ struct regmap_field *p_mac_div_sel1[WIZ_MAX_LANES];
+ struct regmap_field *p0_fullrt_div[WIZ_MAX_LANES];
+ struct regmap_field *pma_cmn_refclk_int_mode;
+ struct regmap_field *pma_cmn_refclk_mode;
+ struct regmap_field *pma_cmn_refclk_dig_div;
+ struct regmap_field *pma_cmn_refclk1_dig_div;
+ struct regmap_field *div_sel_field[WIZ_DIV_NUM_CLOCKS_16G];
+ struct regmap_field *mux_sel_field[WIZ_MUX_NUM_CLOCKS];
+
+ struct udevice *dev;
+ u32 num_lanes;
+ struct gpio_desc *gpio_typec_dir;
+ u32 lane_phy_type[WIZ_MAX_LANES];
+ struct clk *input_clks[WIZ_MAX_INPUT_CLOCKS];
+ unsigned int id;
+};
+
+struct wiz_div_clk {
+ struct clk parent_clk;
+ struct wiz *wiz;
+};
+
+struct wiz_mux_clk {
+ struct clk parent_clks[4];
+ struct wiz *wiz;
+};
+
+struct wiz_clk {
+ struct wiz *wiz;
+};
+
+struct wiz_reset {
+ struct wiz *wiz;
+};
+
+static ulong wiz_div_clk_get_rate(struct clk *clk)
+{
+ struct udevice *dev = clk->dev;
+ struct wiz_div_clk *priv = dev_get_priv(dev);
+ struct wiz_clk_div_sel *data = dev_get_plat(dev);
+ struct wiz *wiz = priv->wiz;
+ ulong parent_rate = clk_get_rate(&priv->parent_clk);
+ u32 val;
+
+ regmap_field_read(wiz->div_sel_field[data->div_sel], &val);
+
+ return parent_rate >> val;
+}
+
+static ulong wiz_div_clk_set_rate(struct clk *clk, ulong rate)
+{
+ struct udevice *dev = clk->dev;
+ struct wiz_div_clk *priv = dev_get_priv(dev);
+ struct wiz_clk_div_sel *data = dev_get_plat(dev);
+ struct wiz *wiz = priv->wiz;
+ ulong parent_rate = clk_get_rate(&priv->parent_clk);
+ u32 div = parent_rate / rate;
+
+ div = __ffs(div);
+ regmap_field_write(wiz->div_sel_field[data->div_sel], div);
+
+ return parent_rate >> div;
+}
+
+const struct clk_ops wiz_div_clk_ops = {
+ .get_rate = wiz_div_clk_get_rate,
+ .set_rate = wiz_div_clk_set_rate,
+};
+
+int wiz_div_clk_probe(struct udevice *dev)
+{
+ struct wiz_div_clk *priv = dev_get_priv(dev);
+ struct clk parent_clk;
+ int rc;
+
+ rc = clk_get_by_index(dev, 0, &parent_clk);
+ if (rc) {
+ dev_err(dev, "unable to get parent clock. ret %d\n", rc);
+ return rc;
+ }
+ priv->parent_clk = parent_clk;
+ priv->wiz = dev_get_priv(dev->parent);
+ return 0;
+}
+
+U_BOOT_DRIVER(wiz_div_clk) = {
+ .name = "wiz_div_clk",
+ .id = UCLASS_CLK,
+ .priv_auto = sizeof(struct wiz_div_clk),
+ .ops = &wiz_div_clk_ops,
+ .probe = wiz_div_clk_probe,
+};
+
+static int wiz_clk_mux_set_parent(struct clk *clk, struct clk *parent)
+{
+ struct udevice *dev = clk->dev;
+ struct wiz_mux_clk *priv = dev_get_priv(dev);
+ struct wiz_clk_mux_sel *data = dev_get_plat(dev);
+ struct wiz *wiz = priv->wiz;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(priv->parent_clks); i++)
+ if (parent->dev == priv->parent_clks[i].dev)
+ break;
+
+ if (i == ARRAY_SIZE(priv->parent_clks))
+ return -EINVAL;
+
+ regmap_field_write(wiz->mux_sel_field[data->mux_sel], data->table[i]);
+ return 0;
+}
+
+static int wiz_clk_xlate(struct clk *clk, struct ofnode_phandle_args *args)
+{
+ struct udevice *dev = clk->dev;
+ struct wiz_mux_clk *priv = dev_get_priv(dev);
+ struct wiz *wiz = priv->wiz;
+
+ clk->id = wiz->id;
+
+ return 0;
+}
+
+static const struct clk_ops wiz_clk_mux_ops = {
+ .set_parent = wiz_clk_mux_set_parent,
+ .of_xlate = wiz_clk_xlate,
+};
+
+int wiz_mux_clk_probe(struct udevice *dev)
+{
+ struct wiz_mux_clk *priv = dev_get_priv(dev);
+ int rc;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(priv->parent_clks); i++) {
+ rc = clk_get_by_index(dev, i, &priv->parent_clks[i]);
+ if (rc)
+ priv->parent_clks[i].dev = NULL;
+ }
+ priv->wiz = dev_get_priv(dev->parent);
+ return 0;
+}
+
+U_BOOT_DRIVER(wiz_mux_clk) = {
+ .name = "wiz_mux_clk",
+ .id = UCLASS_CLK,
+ .priv_auto = sizeof(struct wiz_mux_clk),
+ .ops = &wiz_clk_mux_ops,
+ .probe = wiz_mux_clk_probe,
+};
+
+static int wiz_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+ struct udevice *dev = clk->dev;
+ struct wiz_clk *priv = dev_get_priv(dev);
+ const struct wiz_clk_mux_sel *mux_sel;
+ struct wiz *wiz = priv->wiz;
+ int num_parents;
+ int i, j, id;
+
+ id = clk->id >> 10;
+
+ /* set_parent is applicable only for MUX clocks */
+ if (id > TI_WIZ_REFCLK_DIG)
+ return 0;
+
+ for (i = 0; i < WIZ_MAX_INPUT_CLOCKS; i++)
+ if (wiz->input_clks[i]->dev == parent->dev)
+ break;
+
+ if (i == WIZ_MAX_INPUT_CLOCKS)
+ return -EINVAL;
+
+ mux_sel = &wiz->clk_mux_sel[id];
+ num_parents = mux_sel->num_parents;
+ for (j = 0; j < num_parents; j++)
+ if (mux_sel->parents[j] == i)
+ break;
+
+ if (j == num_parents)
+ return -EINVAL;
+
+ regmap_field_write(wiz->mux_sel_field[id], mux_sel->table[j]);
+
+ return 0;
+}
+
+static int wiz_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args)
+{
+ struct udevice *dev = clk->dev;
+ struct wiz_clk *priv = dev_get_priv(dev);
+ struct wiz *wiz = priv->wiz;
+
+ clk->id = args->args[0] << 10 | wiz->id;
+
+ return 0;
+}
+
+static const struct clk_ops wiz_clk_ops = {
+ .set_parent = wiz_clk_set_parent,
+ .of_xlate = wiz_clk_of_xlate,
+};
+
+int wiz_clk_probe(struct udevice *dev)
+{
+ struct wiz_clk *priv = dev_get_priv(dev);
+
+ priv->wiz = dev_get_priv(dev->parent);
+
+ return 0;
+}
+
+U_BOOT_DRIVER(wiz_clk) = {
+ .name = "wiz_clk",
+ .id = UCLASS_CLK,
+ .priv_auto = sizeof(struct wiz_clk),
+ .ops = &wiz_clk_ops,
+ .probe = wiz_clk_probe,
+};
+
+static int wiz_reset_request(struct reset_ctl *reset_ctl)
+{
+ return 0;
+}
+
+static int wiz_reset_free(struct reset_ctl *reset_ctl)
+{
+ return 0;
+}
+
+static int wiz_reset_assert(struct reset_ctl *reset_ctl)
+{
+ struct wiz_reset *priv = dev_get_priv(reset_ctl->dev);
+ struct wiz *wiz = priv->wiz;
+ int ret;
+ int id = reset_ctl->id;
+
+ if (id == 0) {
+ ret = regmap_field_write(wiz->phy_reset_n, false);
+ return ret;
+ }
+
+ ret = regmap_field_write(wiz->p_enable[id - 1], P_ENABLE_DISABLE);
+ return ret;
+}
+
+static int wiz_phy_fullrt_div(struct wiz *wiz, int lane)
+{
+ if (wiz->type != AM64_WIZ_10G)
+ return 0;
+
+ if (wiz->lane_phy_type[lane] == PHY_TYPE_PCIE)
+ return regmap_field_write(wiz->p0_fullrt_div[lane], 0x1);
+
+ return 0;
+}
+
+static int wiz_reset_deassert(struct reset_ctl *reset_ctl)
+{
+ struct wiz_reset *priv = dev_get_priv(reset_ctl->dev);
+ struct wiz *wiz = priv->wiz;
+ int ret;
+ int id = reset_ctl->id;
+
+ ret = wiz_phy_fullrt_div(wiz, id - 1);
+ if (ret)
+ return ret;
+
+ /* if typec-dir gpio was specified, set LN10 SWAP bit based on that */
+ if (id == 0 && wiz->gpio_typec_dir) {
+ if (dm_gpio_get_value(wiz->gpio_typec_dir)) {
+ regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC,
+ WIZ_SERDES_TYPEC_LN10_SWAP,
+ WIZ_SERDES_TYPEC_LN10_SWAP);
+ } else {
+ regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC,
+ WIZ_SERDES_TYPEC_LN10_SWAP, 0);
+ }
+ }
+
+ if (id == 0) {
+ ret = regmap_field_write(wiz->phy_reset_n, true);
+ return ret;
+ }
+
+ if (wiz->lane_phy_type[id - 1] == PHY_TYPE_PCIE)
+ ret = regmap_field_write(wiz->p_enable[id - 1], P_ENABLE);
+ else
+ ret = regmap_field_write(wiz->p_enable[id - 1], P_ENABLE_FORCE);
+
+ return ret;
+}
+
+static struct reset_ops wiz_reset_ops = {
+ .request = wiz_reset_request,
+ .rfree = wiz_reset_free,
+ .rst_assert = wiz_reset_assert,
+ .rst_deassert = wiz_reset_deassert,
+};
+
+int wiz_reset_probe(struct udevice *dev)
+{
+ struct wiz_reset *priv = dev_get_priv(dev);
+
+ priv->wiz = dev_get_priv(dev->parent);
+
+ return 0;
+}
+
+U_BOOT_DRIVER(wiz_reset) = {
+ .name = "wiz-reset",
+ .id = UCLASS_RESET,
+ .probe = wiz_reset_probe,
+ .ops = &wiz_reset_ops,
+ .flags = DM_FLAG_LEAVE_PD_ON,
+};
+
+static int wiz_reset(struct wiz *wiz)
+{
+ int ret;
+
+ ret = regmap_field_write(wiz->por_en, 0x1);
+ if (ret)
+ return ret;
+
+ mdelay(1);
+
+ ret = regmap_field_write(wiz->por_en, 0x0);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int wiz_p_mac_div_sel(struct wiz *wiz)
+{
+ u32 num_lanes = wiz->num_lanes;
+ int ret;
+ int i;
+
+ for (i = 0; i < num_lanes; i++) {
+ if (wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {
+ ret = regmap_field_write(wiz->p_mac_div_sel0[i], 1);
+ if (ret)
+ return ret;
+
+ ret = regmap_field_write(wiz->p_mac_div_sel1[i], 2);
+ if (ret)
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int wiz_mode_select(struct wiz *wiz)
+{
+ u32 num_lanes = wiz->num_lanes;
+ int ret;
+ int i;
+
+ for (i = 0; i < num_lanes; i++) {
+ if (wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {
+ ret = regmap_field_write(wiz->p_standard_mode[i],
+ LANE_MODE_GEN2);
+ if (ret)
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int wiz_init_raw_interface(struct wiz *wiz, bool enable)
+{
+ u32 num_lanes = wiz->num_lanes;
+ int i;
+ int ret;
+
+ for (i = 0; i < num_lanes; i++) {
+ ret = regmap_field_write(wiz->p_align[i], enable);
+ if (ret)
+ return ret;
+
+ ret = regmap_field_write(wiz->p_raw_auto_start[i], enable);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static int wiz_init(struct wiz *wiz)
+{
+ struct udevice *dev = wiz->dev;
+ int ret;
+
+ ret = wiz_reset(wiz);
+ if (ret) {
+ dev_err(dev, "WIZ reset failed\n");
+ return ret;
+ }
+
+ ret = wiz_mode_select(wiz);
+ if (ret) {
+ dev_err(dev, "WIZ mode select failed\n");
+ return ret;
+ }
+
+ ret = wiz_p_mac_div_sel(wiz);
+ if (ret) {
+ dev_err(dev, "Configuring P0 MAC DIV SEL failed\n");
+ return ret;
+ }
+
+ ret = wiz_init_raw_interface(wiz, true);
+ if (ret) {
+ dev_err(dev, "WIZ interface initialization failed\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int wiz_regfield_init(struct wiz *wiz)
+{
+ struct regmap *regmap = wiz->regmap;
+ int num_lanes = wiz->num_lanes;
+ struct udevice *dev = wiz->dev;
+ enum wiz_type type;
+ int i;
+
+ wiz->por_en = devm_regmap_field_alloc(dev, regmap, por_en);
+ if (IS_ERR(wiz->por_en)) {
+ dev_err(dev, "POR_EN reg field init failed\n");
+ return PTR_ERR(wiz->por_en);
+ }
+
+ wiz->phy_reset_n = devm_regmap_field_alloc(dev, regmap,
+ phy_reset_n);
+ if (IS_ERR(wiz->phy_reset_n)) {
+ dev_err(dev, "PHY_RESET_N reg field init failed\n");
+ return PTR_ERR(wiz->phy_reset_n);
+ }
+
+ wiz->pma_cmn_refclk_int_mode =
+ devm_regmap_field_alloc(dev, regmap, pma_cmn_refclk_int_mode);
+ if (IS_ERR(wiz->pma_cmn_refclk_int_mode)) {
+ dev_err(dev, "PMA_CMN_REFCLK_INT_MODE reg field init failed\n");
+ return PTR_ERR(wiz->pma_cmn_refclk_int_mode);
+ }
+
+ wiz->pma_cmn_refclk_mode =
+ devm_regmap_field_alloc(dev, regmap, pma_cmn_refclk_mode);
+ if (IS_ERR(wiz->pma_cmn_refclk_mode)) {
+ dev_err(dev, "PMA_CMN_REFCLK_MODE reg field init failed\n");
+ return PTR_ERR(wiz->pma_cmn_refclk_mode);
+ }
+
+ wiz->div_sel_field[CMN_REFCLK] =
+ devm_regmap_field_alloc(dev, regmap, pma_cmn_refclk_dig_div);
+ if (IS_ERR(wiz->div_sel_field[CMN_REFCLK])) {
+ dev_err(dev, "PMA_CMN_REFCLK_DIG_DIV reg field init failed\n");
+ return PTR_ERR(wiz->div_sel_field[CMN_REFCLK]);
+ }
+
+ wiz->div_sel_field[CMN_REFCLK1] =
+ devm_regmap_field_alloc(dev, regmap, pma_cmn_refclk1_dig_div);
+ if (IS_ERR(wiz->div_sel_field[CMN_REFCLK1])) {
+ dev_err(dev, "PMA_CMN_REFCLK1_DIG_DIV reg field init failed\n");
+ return PTR_ERR(wiz->div_sel_field[CMN_REFCLK1]);
+ }
+
+ wiz->mux_sel_field[PLL0_REFCLK] =
+ devm_regmap_field_alloc(dev, regmap, pll0_refclk_mux_sel);
+ if (IS_ERR(wiz->mux_sel_field[PLL0_REFCLK])) {
+ dev_err(dev, "PLL0_REFCLK_SEL reg field init failed\n");
+ return PTR_ERR(wiz->mux_sel_field[PLL0_REFCLK]);
+ }
+
+ wiz->mux_sel_field[PLL1_REFCLK] =
+ devm_regmap_field_alloc(dev, regmap, pll1_refclk_mux_sel);
+ if (IS_ERR(wiz->mux_sel_field[PLL1_REFCLK])) {
+ dev_err(dev, "PLL1_REFCLK_SEL reg field init failed\n");
+ return PTR_ERR(wiz->mux_sel_field[PLL1_REFCLK]);
+ }
+
+ type = dev_get_driver_data(dev);
+ if (type == J721E_WIZ_10G || type == AM64_WIZ_10G)
+ wiz->mux_sel_field[REFCLK_DIG] =
+ devm_regmap_field_alloc(dev, regmap,
+ refclk_dig_sel_10g);
+ else
+ wiz->mux_sel_field[REFCLK_DIG] =
+ devm_regmap_field_alloc(dev, regmap,
+ refclk_dig_sel_16g);
+ if (IS_ERR(wiz->mux_sel_field[REFCLK_DIG])) {
+ dev_err(dev, "REFCLK_DIG_SEL reg field init failed\n");
+ return PTR_ERR(wiz->mux_sel_field[REFCLK_DIG]);
+ }
+
+ for (i = 0; i < num_lanes; i++) {
+ wiz->p_enable[i] = devm_regmap_field_alloc(dev, regmap,
+ p_enable[i]);
+ if (IS_ERR(wiz->p_enable[i])) {
+ dev_err(dev, "P%d_ENABLE reg field init failed\n", i);
+ return PTR_ERR(wiz->p_enable[i]);
+ }
+
+ wiz->p_align[i] = devm_regmap_field_alloc(dev, regmap,
+ p_align[i]);
+ if (IS_ERR(wiz->p_align[i])) {
+ dev_err(dev, "P%d_ALIGN reg field init failed\n", i);
+ return PTR_ERR(wiz->p_align[i]);
+ }
+
+ wiz->p_raw_auto_start[i] =
+ devm_regmap_field_alloc(dev, regmap, p_raw_auto_start[i]);
+ if (IS_ERR(wiz->p_raw_auto_start[i])) {
+ dev_err(dev, "P%d_RAW_AUTO_START reg field init fail\n",
+ i);
+ return PTR_ERR(wiz->p_raw_auto_start[i]);
+ }
+
+ wiz->p_standard_mode[i] =
+ devm_regmap_field_alloc(dev, regmap, p_standard_mode[i]);
+ if (IS_ERR(wiz->p_standard_mode[i])) {
+ dev_err(dev, "P%d_STANDARD_MODE reg field init fail\n",
+ i);
+ return PTR_ERR(wiz->p_standard_mode[i]);
+ }
+
+ wiz->p0_fullrt_div[i] = devm_regmap_field_alloc(dev, regmap, p0_fullrt_div[i]);
+ if (IS_ERR(wiz->p0_fullrt_div[i])) {
+ dev_err(dev, "P%d_FULLRT_DIV reg field init failed\n", i);
+ return PTR_ERR(wiz->p0_fullrt_div[i]);
+ }
+
+ wiz->p_mac_div_sel0[i] =
+ devm_regmap_field_alloc(dev, regmap, p_mac_div_sel0[i]);
+ if (IS_ERR(wiz->p_mac_div_sel0[i])) {
+ dev_err(dev, "P%d_MAC_DIV_SEL0 reg field init fail\n",
+ i);
+ return PTR_ERR(wiz->p_mac_div_sel0[i]);
+ }
+
+ wiz->p_mac_div_sel1[i] =
+ devm_regmap_field_alloc(dev, regmap, p_mac_div_sel1[i]);
+ if (IS_ERR(wiz->p_mac_div_sel1[i])) {
+ dev_err(dev, "P%d_MAC_DIV_SEL1 reg field init fail\n",
+ i);
+ return PTR_ERR(wiz->p_mac_div_sel1[i]);
+ }
+ }
+
+ return 0;
+}
+
+static int wiz_clock_init(struct wiz *wiz)
+{
+ struct udevice *dev = wiz->dev;
+ unsigned long rate;
+ struct clk *clk;
+ int ret;
+
+ clk = devm_clk_get(dev, "core_ref_clk");
+ if (IS_ERR(clk)) {
+ dev_err(dev, "core_ref_clk clock not found\n");
+ ret = PTR_ERR(clk);
+ return ret;
+ }
+ wiz->input_clks[WIZ_CORE_REFCLK] = clk;
+ /* Initialize CORE_REFCLK1 to the same clock reference to maintain old DT compatibility */
+ wiz->input_clks[WIZ_CORE_REFCLK1] = clk;
+
+ rate = clk_get_rate(clk);
+ if (rate >= 100000000)
+ regmap_field_write(wiz->pma_cmn_refclk_int_mode, 0x1);
+ else
+ regmap_field_write(wiz->pma_cmn_refclk_int_mode, 0x3);
+
+ clk = devm_clk_get(dev, "ext_ref_clk");
+ if (IS_ERR(clk)) {
+ dev_err(dev, "ext_ref_clk clock not found\n");
+ ret = PTR_ERR(clk);
+ return ret;
+ }
+
+ wiz->input_clks[WIZ_EXT_REFCLK] = clk;
+ /* Initialize EXT_REFCLK1 to the same clock reference to maintain old DT compatibility */
+ wiz->input_clks[WIZ_EXT_REFCLK1] = clk;
+
+ rate = clk_get_rate(clk);
+ if (rate >= 100000000)
+ regmap_field_write(wiz->pma_cmn_refclk_mode, 0x0);
+ else
+ regmap_field_write(wiz->pma_cmn_refclk_mode, 0x2);
+
+ return 0;
+}
+
+static ofnode get_child_by_name(struct udevice *dev, const char *name)
+{
+ int l = strlen(name);
+ ofnode node = dev_read_first_subnode(dev);
+
+ while (ofnode_valid(node)) {
+ const char *child_name = ofnode_get_name(node);
+
+ if (!strncmp(child_name, name, l)) {
+ if (child_name[l] == '\0' || child_name[l] == '@')
+ return node;
+ }
+ node = dev_read_next_subnode(node);
+ }
+ return node;
+}
+
+static int j721e_wiz_bind_clocks(struct wiz *wiz)
+{
+ struct udevice *dev = wiz->dev;
+ struct driver *wiz_clk_drv;
+ int i, rc;
+
+ wiz_clk_drv = lists_driver_lookup_name("wiz_clk");
+ if (!wiz_clk_drv) {
+ dev_err(dev, "Cannot find driver 'wiz_clk'\n");
+ return -ENOENT;
+ }
+
+ for (i = 0; i < WIZ_DIV_NUM_CLOCKS_10G; i++) {
+ rc = device_bind(dev, wiz_clk_drv, clk_div_sel[i].node_name,
+ &clk_div_sel[i], dev_ofnode(dev), NULL);
+ if (rc) {
+ dev_err(dev, "cannot bind driver for clock %s\n",
+ clk_div_sel[i].node_name);
+ }
+ }
+
+ for (i = 0; i < WIZ_MUX_NUM_CLOCKS; i++) {
+ rc = device_bind(dev, wiz_clk_drv, clk_mux_sel_10g[i].node_name,
+ &clk_mux_sel_10g[i], dev_ofnode(dev), NULL);
+ if (rc) {
+ dev_err(dev, "cannot bind driver for clock %s\n",
+ clk_mux_sel_10g[i].node_name);
+ }
+ }
+
+ return 0;
+}
+
+static int j721e_wiz_bind_of_clocks(struct wiz *wiz)
+{
+ struct wiz_clk_mux_sel *clk_mux_sel = wiz->clk_mux_sel;
+ struct udevice *dev = wiz->dev;
+ enum wiz_type type = wiz->type;
+ struct driver *div_clk_drv;
+ struct driver *mux_clk_drv;
+ ofnode node;
+ int i, rc;
+
+ if (type == AM64_WIZ_10G)
+ return j721e_wiz_bind_clocks(wiz);
+
+ div_clk_drv = lists_driver_lookup_name("wiz_div_clk");
+ if (!div_clk_drv) {
+ dev_err(dev, "Cannot find driver 'wiz_div_clk'\n");
+ return -ENOENT;
+ }
+
+ mux_clk_drv = lists_driver_lookup_name("wiz_mux_clk");
+ if (!mux_clk_drv) {
+ dev_err(dev, "Cannot find driver 'wiz_mux_clk'\n");
+ return -ENOENT;
+ }
+
+ for (i = 0; i < wiz->clk_div_sel_num; i++) {
+ node = get_child_by_name(dev, clk_div_sel[i].node_name);
+ if (!ofnode_valid(node)) {
+ dev_err(dev, "cannot find node for clock %s\n",
+ clk_div_sel[i].node_name);
+ continue;
+ }
+ rc = device_bind(dev, div_clk_drv, clk_div_sel[i].node_name,
+ &clk_div_sel[i], node, NULL);
+ if (rc) {
+ dev_err(dev, "cannot bind driver for clock %s\n",
+ clk_div_sel[i].node_name);
+ }
+ }
+
+ for (i = 0; i < WIZ_MUX_NUM_CLOCKS; i++) {
+ node = get_child_by_name(dev, clk_mux_sel[i].node_name);
+ if (!ofnode_valid(node)) {
+ dev_err(dev, "cannot find node for clock %s\n",
+ clk_mux_sel[i].node_name);
+ continue;
+ }
+ rc = device_bind(dev, mux_clk_drv, clk_mux_sel[i].node_name,
+ &clk_mux_sel[i], node, NULL);
+ if (rc) {
+ dev_err(dev, "cannot bind driver for clock %s\n",
+ clk_mux_sel[i].node_name);
+ }
+ }
+
+ return 0;
+}
+
+static int j721e_wiz_bind_reset(struct udevice *dev)
+{
+ int rc;
+ struct driver *drv;
+
+ drv = lists_driver_lookup_name("wiz-reset");
+ if (!drv) {
+ dev_err(dev, "Cannot find driver 'wiz-reset'\n");
+ return -ENOENT;
+ }
+
+ rc = device_bind(dev, drv, "wiz-reset", NULL, dev_ofnode(dev), NULL);
+ if (rc) {
+ dev_err(dev, "cannot bind driver for wiz-reset\n");
+ return rc;
+ }
+
+ return 0;
+}
+
+static int j721e_wiz_bind(struct udevice *dev)
+{
+ dm_scan_fdt_dev(dev);
+
+ return 0;
+}
+
+static int wiz_get_lane_phy_types(struct udevice *dev, struct wiz *wiz)
+{
+ ofnode child, serdes;
+
+ serdes = get_child_by_name(dev, "serdes");
+ if (!ofnode_valid(serdes)) {
+ dev_err(dev, "%s: Getting \"serdes\"-node failed\n", __func__);
+ return -EINVAL;
+ }
+
+ ofnode_for_each_subnode(child, serdes) {
+ u32 reg, num_lanes = 1, phy_type = PHY_NONE;
+ int ret, i;
+
+ ret = ofnode_read_u32(child, "reg", ®);
+ if (ret) {
+ dev_err(dev, "%s: Reading \"reg\" from failed: %d\n",
+ __func__, ret);
+ return ret;
+ }
+ ofnode_read_u32(child, "cdns,num-lanes", &num_lanes);
+ ofnode_read_u32(child, "cdns,phy-type", &phy_type);
+
+ dev_dbg(dev, "%s: Lanes %u-%u have phy-type %u\n", __func__,
+ reg, reg + num_lanes - 1, phy_type);
+
+ for (i = reg; i < reg + num_lanes; i++)
+ wiz->lane_phy_type[i] = phy_type;
+ }
+
+ return 0;
+}
+
+static int j721e_wiz_probe(struct udevice *dev)
+{
+ struct wiz *wiz = dev_get_priv(dev);
+ struct ofnode_phandle_args args;
+ unsigned int val;
+ int rc, i;
+ ofnode node;
+ struct regmap *regmap;
+ u32 num_lanes;
+
+ node = get_child_by_name(dev, "serdes");
+
+ if (!ofnode_valid(node)) {
+ dev_err(dev, "Failed to get SERDES child DT node\n");
+ return -ENODEV;
+ }
+
+ rc = regmap_init_mem(node, ®map);
+ if (rc) {
+ dev_err(dev, "Failed to get memory resource\n");
+ return rc;
+ }
+ rc = dev_read_u32(dev, "num-lanes", &num_lanes);
+ if (rc) {
+ dev_err(dev, "Failed to read num-lanes property\n");
+ goto err_addr_to_resource;
+ }
+
+ if (num_lanes > WIZ_MAX_LANES) {
+ dev_err(dev, "Cannot support %d lanes\n", num_lanes);
+ goto err_addr_to_resource;
+ }
+
+ wiz->gpio_typec_dir = devm_gpiod_get_optional(dev, "typec-dir",
+ GPIOD_IS_IN);
+ if (IS_ERR(wiz->gpio_typec_dir)) {
+ rc = PTR_ERR(wiz->gpio_typec_dir);
+ dev_err(dev, "Failed to request typec-dir gpio: %d\n", rc);
+ goto err_addr_to_resource;
+ }
+
+ rc = dev_read_phandle_with_args(dev, "power-domains", "#power-domain-cells", 0, 0, &args);
+ if (rc) {
+ dev_err(dev, "Failed to get power domain: %d\n", rc);
+ goto err_addr_to_resource;
+ }
+
+ wiz->id = args.args[0];
+ wiz->regmap = regmap;
+ wiz->num_lanes = num_lanes;
+ wiz->dev = dev;
+ wiz->clk_div_sel = clk_div_sel;
+ wiz->type = dev_get_driver_data(dev);
+ if (wiz->type == J721E_WIZ_10G || wiz->type == AM64_WIZ_10G) {
+ wiz->clk_mux_sel = clk_mux_sel_10g;
+ wiz->clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_10G;
+ } else {
+ wiz->clk_mux_sel = clk_mux_sel_16g;
+ wiz->clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_16G;
+ }
+
+ rc = wiz_get_lane_phy_types(dev, wiz);
+ if (rc) {
+ dev_err(dev, "Failed to get lane PHY types\n");
+ goto err_addr_to_resource;
+ }
+
+ rc = wiz_regfield_init(wiz);
+ if (rc) {
+ dev_err(dev, "Failed to initialize regfields\n");
+ goto err_addr_to_resource;
+ }
+
+ for (i = 0; i < wiz->num_lanes; i++) {
+ regmap_field_read(wiz->p_enable[i], &val);
+ if (val & (P_ENABLE | P_ENABLE_FORCE)) {
+ dev_err(dev, "SERDES already configured\n");
+ rc = -EBUSY;
+ goto err_addr_to_resource;
+ }
+ }
+
+ rc = j721e_wiz_bind_of_clocks(wiz);
+ if (rc) {
+ dev_err(dev, "Failed to bind clocks\n");
+ goto err_addr_to_resource;
+ }
+
+ rc = j721e_wiz_bind_reset(dev);
+ if (rc) {
+ dev_err(dev, "Failed to bind reset\n");
+ goto err_addr_to_resource;
+ }
+
+ rc = wiz_clock_init(wiz);
+ if (rc) {
+ dev_warn(dev, "Failed to initialize clocks\n");
+ goto err_addr_to_resource;
+ }
+
+ rc = wiz_init(wiz);
+ if (rc) {
+ dev_err(dev, "WIZ initialization failed\n");
+ goto err_addr_to_resource;
+ }
+
+ return 0;
+
+err_addr_to_resource:
+ free(regmap);
+
+ return rc;
+}
+
+static int j721e_wiz_remove(struct udevice *dev)
+{
+ struct wiz *wiz = dev_get_priv(dev);
+
+ if (wiz->regmap)
+ free(wiz->regmap);
+
+ return 0;
+}
+
+static const struct udevice_id j721e_wiz_ids[] = {
+ {
+ .compatible = "ti,j721e-wiz-16g", .data = J721E_WIZ_16G,
+ },
+ {
+ .compatible = "ti,j721e-wiz-10g", .data = J721E_WIZ_10G,
+ },
+ {
+ .compatible = "ti,am64-wiz-10g", .data = AM64_WIZ_10G,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(phy_j721e_wiz) = {
+ .name = "phy-j721e-wiz",
+ .id = UCLASS_NOP,
+ .of_match = j721e_wiz_ids,
+ .bind = j721e_wiz_bind,
+ .probe = j721e_wiz_probe,
+ .remove = j721e_wiz_remove,
+ .priv_auto = sizeof(struct wiz),
+ .flags = DM_FLAG_LEAVE_PD_ON,
+};
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
index 3bd23be..a9cedda 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -541,7 +541,7 @@
};
#if CONFIG_IS_ENABLED(DM_GPIO) || \
- (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO_SUPPORT))
+ (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO))
static int mtk_gpio_get(struct udevice *dev, unsigned int off)
{
int val, err;
@@ -664,7 +664,7 @@
priv->soc = soc;
#if CONFIG_IS_ENABLED(DM_GPIO) || \
- (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO_SUPPORT))
+ (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO))
ret = mtk_gpiochip_register(dev);
#endif
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index b9d389e..1cf1f06 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -160,10 +160,14 @@
PIN_GRP_GPIO("jtag", 20, 5, BIT(0), "jtag"),
PIN_GRP_GPIO("sdio0", 8, 3, BIT(1), "sdio"),
PIN_GRP_GPIO("emmc_nb", 27, 9, BIT(2), "emmc"),
- PIN_GRP_GPIO("pwm0", 11, 1, BIT(3), "pwm"),
- PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"),
- PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"),
- PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"),
+ PIN_GRP_GPIO_3("pwm0", 11, 1, BIT(3) | BIT(20), 0, BIT(20), BIT(3),
+ "pwm", "led"),
+ PIN_GRP_GPIO_3("pwm1", 11, 1, BIT(4) | BIT(21), 0, BIT(21), BIT(4),
+ "pwm", "led"),
+ PIN_GRP_GPIO_3("pwm2", 11, 1, BIT(5) | BIT(22), 0, BIT(22), BIT(5),
+ "pwm", "led"),
+ PIN_GRP_GPIO_3("pwm3", 11, 1, BIT(6) | BIT(23), 0, BIT(23), BIT(6),
+ "pwm", "led"),
PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"),
PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"),
PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),
@@ -177,11 +181,6 @@
PIN_GRP_EXTRA("uart2", 9, 2, BIT(1) | BIT(13) | BIT(14) | BIT(19),
BIT(1) | BIT(13) | BIT(14), BIT(1) | BIT(19),
18, 2, "gpio", "uart"),
- PIN_GRP_GPIO("led0_od", 11, 1, BIT(20), "led"),
- PIN_GRP_GPIO("led1_od", 12, 1, BIT(21), "led"),
- PIN_GRP_GPIO("led2_od", 13, 1, BIT(22), "led"),
- PIN_GRP_GPIO("led3_od", 14, 1, BIT(23), "led"),
-
};
static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index 17942e2..cd253b9 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -18,7 +18,7 @@
config SPL_DM_REGULATOR
bool "Enable regulators for SPL"
- depends on DM_REGULATOR && SPL_POWER_SUPPORT
+ depends on DM_REGULATOR && SPL_POWER
---help---
Regulators are seldom needed in SPL. Even if they are accessed, some
code space can be saved by accessing the PMIC registers directly.
@@ -165,7 +165,7 @@
config SPL_DM_REGULATOR_GPIO
bool "Enable Driver Model for GPIO REGULATOR in SPL"
- depends on DM_REGULATOR_GPIO && SPL_GPIO_SUPPORT
+ depends on DM_REGULATOR_GPIO && SPL_GPIO
select SPL_DM_REGULATOR_COMMON
---help---
This config enables implementation of driver-model regulator uclass
diff --git a/drivers/serial/serial_mvebu_a3700.c b/drivers/serial/serial_mvebu_a3700.c
index c7e66fe..6bca8e4 100644
--- a/drivers/serial/serial_mvebu_a3700.c
+++ b/drivers/serial/serial_mvebu_a3700.c
@@ -305,11 +305,12 @@
#ifdef CONFIG_DEBUG_MVEBU_A3700_UART
#include <debug_uart.h>
+#include <mach/soc.h>
static inline void _debug_uart_init(void)
{
void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
- u32 baudrate, parent_rate, divider;
+ u32 parent_rate, divider;
/* reset FIFOs */
writel(UART_CTRL_RXFIFO_RESET | UART_CTRL_TXFIFO_RESET,
@@ -322,9 +323,9 @@
* Calculate divider
* baudrate = clock / 16 / divider
*/
- baudrate = 115200;
- parent_rate = get_ref_clk() * 1000000;
- divider = DIV_ROUND_CLOSEST(parent_rate, baudrate * 16);
+ parent_rate = (readl(MVEBU_REGISTER(0x13808)) & BIT(9)) ?
+ 40000000 : 25000000;
+ divider = DIV_ROUND_CLOSEST(parent_rate, CONFIG_BAUDRATE * 16);
writel(divider, base + UART_BAUD_REG);
/*
diff --git a/drivers/usb/cdns3/Kconfig b/drivers/usb/cdns3/Kconfig
index 05785fc..35b6149 100644
--- a/drivers/usb/cdns3/Kconfig
+++ b/drivers/usb/cdns3/Kconfig
@@ -41,7 +41,7 @@
config SPL_USB_CDNS3_HOST
bool "Cadence USB3 host controller"
- depends on USB_XHCI_HCD && SPL_USB_HOST_SUPPORT
+ depends on USB_XHCI_HCD && SPL_USB_HOST
help
Say Y here to enable host controller functionality of the
Cadence driver.
diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
index 798a217..644a979 100644
--- a/drivers/usb/cdns3/core.c
+++ b/drivers/usb/cdns3/core.c
@@ -149,7 +149,7 @@
dr_mode = best_dr_mode;
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_HOST) {
ret = cdns3_host_init(cdns);
if (ret) {
@@ -403,7 +403,7 @@
dr_mode = usb_get_dr_mode(node);
switch (dr_mode) {
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
+#if defined(CONFIG_SPL_USB_HOST) || \
(!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST))
case USB_DR_MODE_HOST:
debug("%s: dr_mode: HOST\n", __func__);
@@ -466,7 +466,7 @@
};
#endif
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
+#if defined(CONFIG_SPL_USB_HOST) || \
(!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST))
static int cdns3_host_probe(struct udevice *dev)
{
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index c8bf4ae..8d53ba7 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -163,7 +163,7 @@
};
#endif
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
+#if defined(CONFIG_SPL_USB_HOST) || \
!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST)
static int dwc3_generic_host_probe(struct udevice *dev)
{
@@ -320,7 +320,7 @@
driver = "dwc3-generic-peripheral";
#endif
break;
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
case USB_DR_MODE_HOST:
debug("%s: dr_mode: HOST\n", __func__);
driver = "dwc3-generic-host";
diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
index b097471..b1b22b9 100644
--- a/drivers/usb/mtu3/mtu3_plat.c
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -261,7 +261,7 @@
};
#endif
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
+#if defined(CONFIG_SPL_USB_HOST) || \
(!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST))
static int mtu3_host_probe(struct udevice *dev)
{
@@ -329,7 +329,7 @@
break;
#endif
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
+#if defined(CONFIG_SPL_USB_HOST) || \
(!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST))
case USB_DR_MODE_HOST:
dev_dbg(parent, "%s: dr_mode: host\n", __func__);
diff --git a/fs/btrfs/Kconfig b/fs/btrfs/Kconfig
index 2a32f42..a0b48c2 100644
--- a/fs/btrfs/Kconfig
+++ b/fs/btrfs/Kconfig
@@ -1,6 +1,7 @@
config FS_BTRFS
bool "Enable BTRFS filesystem support"
select CRC32C
+ select LIB_UUID
select LZO
select ZSTD
select RBTREE
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 5fed4db..e550703 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -277,7 +277,7 @@
*/
void *trace_buff;
#endif
-#if defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY)
/**
* @cur_i2c_bus: currently used I2C bus
*/
diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index a318926..aaf016c 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -47,8 +47,8 @@
#endif
#if CONFIG_IS_ENABLED(DM_I2C)
-# ifdef CONFIG_SYS_I2C
-# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
+# ifdef CONFIG_SYS_I2C_LEGACY
+# error "Cannot define CONFIG_SYS_I2C_LEGACY when CONFIG_DM_I2C is used"
# endif
#endif
diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h
index fc389b8..1b8312b 100644
--- a/include/configs/M5208EVBE.h
+++ b/include/configs/M5208EVBE.h
@@ -40,7 +40,7 @@
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index 4ab3d48..d061f45 100644
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -49,7 +49,7 @@
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_i2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index 54f6fa7..8ac0086 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -70,7 +70,7 @@
#define CONFIG_HOSTNAME "M5253DEMO"
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index ed93f4a..eb7823a 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -59,7 +59,7 @@
#endif
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index b934dc1..a063b92 100644
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -55,7 +55,7 @@
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index 5c88f09..4fc6d38 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -49,7 +49,7 @@
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index f94cc02..7a9240a 100644
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -51,7 +51,7 @@
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 2cf2e2d..4dad6a5 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -165,7 +165,7 @@
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h
index cfec59e..f7c13d4 100644
--- a/include/configs/MPC8349EMDS_SDRAM.h
+++ b/include/configs/MPC8349EMDS_SDRAM.h
@@ -220,7 +220,7 @@
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index ae368a1..e16a593 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -203,7 +203,7 @@
#define CONFIG_FSL_SERDES2 0xe3100
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index af90fe1..d843ba1 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -206,7 +206,7 @@
/*
* I2C
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 9f83931..2046bf2 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -295,7 +295,7 @@
* I2C
*/
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 5e1bef8..464e7c7 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -203,7 +203,7 @@
/*
* I2C
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 1b68fd1..f5209e1 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -526,7 +526,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 715154a..b5b1594 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -260,7 +260,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 35b11ad..1b4720d 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -423,7 +423,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index ea239f7..57a0bf5 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -453,7 +453,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C2_SPEED 400000
#define CONFIG_SYS_FSL_I2C3_SPEED 400000
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 7bc792b..b8d1693 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -371,7 +371,7 @@
* I2C
*/
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 9449e30..a04a49d 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -323,7 +323,7 @@
* I2C
*/
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 139beae..aa185be 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -155,7 +155,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index c3cc72e..d9a777e 100644
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -310,7 +310,7 @@
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index a9ec1aa..31a1c7e 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -67,7 +67,7 @@
/* SPL USB Support */
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
#define CONFIG_USB_XHCI_OMAP
diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h
index c2c2bf0..7c520f4 100644
--- a/include/configs/am64x_evm.h
+++ b/include/configs/am64x_evm.h
@@ -115,10 +115,4 @@
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
-/* MMC ENV related defines */
-#ifdef CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_SYS_MMC_ENV_PART 1
-#endif
-
#endif /* __CONFIG_AM642_EVM_H */
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index 891240c..2ea33e5 100644
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -58,7 +58,7 @@
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h
index 42e3e56..51585fc 100644
--- a/include/configs/bur_am335x_common.h
+++ b/include/configs/bur_am335x_common.h
@@ -19,8 +19,7 @@
#define CONFIG_SYS_NS16550_CLK (48000000)
#define CONFIG_SYS_NS16550_COM1 0x44e09000
-#define CONFIG_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif /* CONFIG_DM */
diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h
index 0ef55b7..b8928ba 100644
--- a/include/configs/cl-som-imx7.h
+++ b/include/configs/cl-som-imx7.h
@@ -31,7 +31,7 @@
#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
/* I2C configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index c9852a7..fbdd2f0 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -69,13 +69,8 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
-#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
+#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
/* SPL related MMC defines */
-#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
#ifdef CONFIG_SPL_BUILD
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
#endif
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 9892fb8..a496a80 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -166,7 +166,7 @@
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index 3dedcda..6889e8b 100644
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@@ -41,7 +41,7 @@
*/
/* I2C support */
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_PXA
#define CONFIG_PXA_STD_I2C
#define CONFIG_PXA_PWR_I2C
diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h
index 869b94b..171bd18 100644
--- a/include/configs/controlcenterdc.h
+++ b/include/configs/controlcenterdc.h
@@ -83,20 +83,11 @@
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-
-#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
-#endif
+#define CONFIG_SPL_I2C
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
/* SPL related MMC defines */
#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
-#define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10)
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
#ifdef CONFIG_SPL_BUILD
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
#endif
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index d0843c2..924093e6 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -270,7 +270,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h
index 213883e..410a40a 100644
--- a/include/configs/db-88f6720.h
+++ b/include/configs/db-88f6720.h
@@ -18,7 +18,7 @@
#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
@@ -65,7 +65,4 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
-
#endif /* _CONFIG_DB_88F6720_H */
diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h
index fe9a7ab..757fbc0 100644
--- a/include/configs/db-88f6820-amc.h
+++ b/include/configs/db-88f6820-amc.h
@@ -59,11 +59,6 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
-#endif
-
/*
* mv-common.h should be defined after CMD configs since it used them
* to enable certain macros
diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h
index ed851bc..9a34fa6 100644
--- a/include/configs/db-88f6820-gp.h
+++ b/include/configs/db-88f6820-gp.h
@@ -13,7 +13,7 @@
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
@@ -71,15 +71,8 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
-#endif
-
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
/* SPL related MMC defines */
-#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
#ifdef CONFIG_SPL_BUILD
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
#endif
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index 3e20516..b3c4079 100644
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -19,7 +19,7 @@
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
@@ -78,9 +78,6 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
-
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
#define CONFIG_SPD_EEPROM 0x4e
#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index 465d9ce..33d71a7 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -40,7 +40,7 @@
/*
* I2C
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SPEED 100000
/*
diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h
index 9106203..65962ee 100644
--- a/include/configs/dreamplug.h
+++ b/include/configs/dreamplug.h
@@ -31,8 +31,8 @@
/*
* Default environment variables
*/
-#define CONFIG_BOOTCOMMAND "setenv ethact egiga0; " \
- "${x_bootcmd_ethernet}; setenv ethact egiga1; " \
+#define CONFIG_BOOTCOMMAND "setenv ethact ethernet-controller@72000; " \
+ "${x_bootcmd_ethernet}; setenv ethact ethernet-controller@76000; " \
"${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; "\
"setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \
"bootm 0x6400000;"
@@ -52,4 +52,12 @@
#define CONFIG_PHY_BASE_ADR 0
#endif /* CONFIG_CMD_NET */
+/*
+ * SATA Driver configuration
+ */
+#ifdef CONFIG_SATA
+#define CONFIG_SYS_SATA_MAX_DEVICE 1
+#define CONFIG_LBA48
+#endif /* CONFIG_SATA */
+
#endif /* _CONFIG_DREAMPLUG_H */
diff --git a/include/configs/ds414.h b/include/configs/ds414.h
index c8b4506..4475de2 100644
--- a/include/configs/ds414.h
+++ b/include/configs/ds414.h
@@ -21,7 +21,7 @@
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
@@ -68,11 +68,6 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
-#endif
-
/* DS414 bus width is 32bits */
#define CONFIG_DDR_32BIT
diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index ab9daa4..77584fa 100644
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -194,7 +194,7 @@
* I2C
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
index 949ff55..7e0a0ea 100644
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@@ -153,7 +153,7 @@
* I2C related stuff
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h
index 9ee7fee..b117176 100644
--- a/include/configs/el6x_common.h
+++ b/include/configs/el6x_common.h
@@ -26,7 +26,7 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2
/* I2C config */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h
index a29eec0..401b50d 100644
--- a/include/configs/embestmx6boards.h
+++ b/include/configs/embestmx6boards.h
@@ -21,7 +21,7 @@
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index ca249d9..3f26654 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -97,7 +97,7 @@
/* I2C */
#define CONFIG_SYS_MAX_I2C_BUS 1
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SOFT_SPEED 100000
#define CONFIG_SYS_I2C_SOFT_SLAVE 0
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index f4753cf..c345fb2 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -36,7 +36,7 @@
/*
* Hardware drivers
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index f80a309..4f27273 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -42,7 +42,7 @@
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/helios4.h b/include/configs/helios4.h
index 2cda05c..1368080 100644
--- a/include/configs/helios4.h
+++ b/include/configs/helios4.h
@@ -69,13 +69,8 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
-#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
+#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
/* SPL related MMC defines */
-#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
#ifdef CONFIG_SPL_BUILD
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
#endif
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index 362e289..19d3fbf 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -163,7 +163,7 @@
/*
* I2C setup
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index d1bc09e..a6569d5 100644
--- a/include/configs/imx8mp_evk.h
+++ b/include/configs/imx8mp_evk.h
@@ -37,7 +37,7 @@
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PCA9450
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif
diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h
index 1861eba..af81a43 100644
--- a/include/configs/imx8mq_evk.h
+++ b/include/configs/imx8mq_evk.h
@@ -19,15 +19,15 @@
#ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_WATCHDOG
+#define CONFIG_SPL_DRIVERS_MISC
+#define CONFIG_SPL_POWER
+#define CONFIG_SPL_I2C
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x187FF0
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_GPIO
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_BSS_START_ADDR 0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
@@ -44,7 +44,7 @@
#undef CONFIG_DM_PMIC
#undef CONFIG_DM_PMIC_PFUZE100
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h
index 66c2c3a..8038abc 100644
--- a/include/configs/imx8mq_phanbell.h
+++ b/include/configs/imx8mq_phanbell.h
@@ -16,15 +16,15 @@
#ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_WATCHDOG
+#define CONFIG_SPL_DRIVERS_MISC
+#define CONFIG_SPL_POWER
+#define CONFIG_SPL_I2C
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x187FF0
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_GPIO
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_BSS_START_ADDR 0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
@@ -41,7 +41,7 @@
#undef CONFIG_DM_PMIC
#undef CONFIG_DM_PMIC_PFUZE100
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index 62da8ff..18b80ef 100644
--- a/include/configs/j721e_evm.h
+++ b/include/configs/j721e_evm.h
@@ -82,8 +82,6 @@
#ifdef CONFIG_SYS_K3_SPL_ATF
#if defined(CONFIG_TARGET_J721E_R5_EVM)
#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
- "addr_mainr5f0_0load=0x88000000\0" \
- "name_mainr5f0_0fw=/lib/firmware/j7-main-r5f0_0-fw\0" \
"addr_mcur5f0_0load=0x89000000\0" \
"name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0"
#elif defined(CONFIG_TARGET_J7200_R5_EVM)
@@ -129,6 +127,7 @@
#ifdef CONFIG_TARGET_J721E_A72_EVM
#define DEFAULT_RPROCS "" \
+ "2 /lib/firmware/j7-main-r5f0_0-fw " \
"3 /lib/firmware/j7-main-r5f0_1-fw " \
"4 /lib/firmware/j7-main-r5f1_0-fw " \
"5 /lib/firmware/j7-main-r5f1_1-fw " \
@@ -138,11 +137,24 @@
#endif /* CONFIG_TARGET_J721E_A72_EVM */
#ifdef CONFIG_TARGET_J7200_A72_EVM
+#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \
+ "do_main_cpsw0_qsgmii_phyinit=1\0" \
+ "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \
+ "gpio clear gpio@22_16\0" \
+ "main_cpsw0_qsgmii_phyinit=" \
+ "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \
+ "test ${boot} = mmc; then " \
+ "run init_main_cpsw0_qsgmii_phy;" \
+ "fi;\0"
#define DEFAULT_RPROCS "" \
"2 /lib/firmware/j7200-main-r5f0_0-fw " \
"3 /lib/firmware/j7200-main-r5f0_1-fw "
#endif /* CONFIG_TARGET_J7200_A72_EVM */
+#ifndef EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
+#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
+#endif
+
/* set default dfu_bufsiz to 128KB (sector size of OSPI) */
#define EXTRA_ENV_DFUARGS \
"dfu_bufsiz=0x20000\0" \
@@ -190,6 +202,7 @@
EXTRA_ENV_DFUARGS \
DEFAULT_UFS_TI_ARGS \
EXTRA_ENV_J721E_BOARD_SETTINGS_MTD \
+ EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \
BOOTENV
/* Now for the remaining common defines */
diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h
index 7aacd37..ecf4378 100644
--- a/include/configs/km/km-mpc83xx.h
+++ b/include/configs/km/km-mpc83xx.h
@@ -62,7 +62,7 @@
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_NUM_I2C_BUSES 4
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_I2C_FSL
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index 4115906..179e145 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -90,7 +90,7 @@
* I2C related stuff
*/
#undef CONFIG_I2C_MVTWSI
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_INIT_BOARD
diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h
index eb480a3..a4cc477 100644
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -191,7 +191,7 @@
/*
* I2C
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 0724df1..059c54e 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -83,7 +83,7 @@
#define CONFIG_NFS_TIMEOUT 10000UL
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SH
#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
#define CONFIG_SYS_I2C_SH_BASE0 0xE6820000
diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h
index ca96683..8c2c8e1 100644
--- a/include/configs/legoev3.h
+++ b/include/configs/legoev3.h
@@ -47,7 +47,7 @@
/*
* I2C Configuration
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_DAVINCI_I2C_SPEED 400000
#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 6f55acc..670b55d 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -56,7 +56,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index e2ae6e4..4c448c6 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -65,8 +65,8 @@
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_WATCHDOG_SUPPORT
+#define CONFIG_SPL_I2C
+#define CONFIG_SPL_WATCHDOG
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8
@@ -99,7 +99,7 @@
*/
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 7f65845..598f6c6 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -331,7 +331,7 @@
* I2C
*/
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h
index f76d5a1..58c2d97 100644
--- a/include/configs/ls1021atsn.h
+++ b/include/configs/ls1021atsn.h
@@ -105,7 +105,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index d6783db..ba308c5 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -209,7 +209,7 @@
* I2C
*/
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h
index 5900b8f..cbcf30e 100644
--- a/include/configs/ls1028a_common.h
+++ b/include/configs/ls1028a_common.h
@@ -45,7 +45,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif
/* Serial Port */
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 65d63e2..834c3e6 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -150,7 +150,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 11e1a18..289acc0 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -106,12 +106,12 @@
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_WATCHDOG
+#define CONFIG_SPL_I2C
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC
#define CONFIG_SPL_MAX_SIZE 0x17000 /* 90 KiB */
#define CONFIG_SPL_STACK 0x1001f000
#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
@@ -134,7 +134,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h
index d574e7e..3f0679c 100644
--- a/include/configs/ls1088a_common.h
+++ b/include/configs/ls1088a_common.h
@@ -62,7 +62,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 2ed6584..4527336 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -75,7 +75,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif
/* Serial Port */
diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h
index 52c95de..bd117da 100644
--- a/include/configs/m53menlo.h
+++ b/include/configs/m53menlo.h
@@ -88,7 +88,7 @@
* I2C
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index 0c2185c..c456921 100644
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -18,7 +18,7 @@
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index e5dc9ac..e69130d 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -36,7 +36,7 @@
#define CONFIG_MXC_USB_FLAGS 0
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index 83895ab..a4504ee 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -56,7 +56,7 @@
/* MMC */
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC
#endif
#endif
diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h
index 1189677..626dbd5 100644
--- a/include/configs/mx6sabreauto.h
+++ b/include/configs/mx6sabreauto.h
@@ -51,7 +51,7 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index e8f52ce..9546887 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -38,7 +38,7 @@
#endif
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index bd779ae..3d87690 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -41,7 +41,7 @@
#define CONFIG_ARMV7_SECURE_BASE 0x00900000
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC
#endif
/*
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index 6448ea8..0c40750 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -21,7 +21,7 @@
#define CONFIG_MXC_UART_BASE UART2_BASE
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/novena.h b/include/configs/novena.h
index 2b0a763..3876412 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -52,7 +52,7 @@
#endif
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 066311a..ba5b649 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -464,7 +464,7 @@
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h
index 75f84e6..58ead45 100644
--- a/include/configs/phycore_imx8mp.h
+++ b/include/configs/phycore_imx8mp.h
@@ -33,7 +33,7 @@
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PCA9450
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index 80de115..f5d2c23 100644
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -126,7 +126,7 @@
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* I2C configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1
#define CONFIG_SYS_I2C_MXC_I2C2
diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h
index 7a58916..89b3d27 100644
--- a/include/configs/pico-imx8mq.h
+++ b/include/configs/pico-imx8mq.h
@@ -16,15 +16,15 @@
#ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_WATCHDOG
+#define CONFIG_SPL_DRIVERS_MISC
+#define CONFIG_SPL_POWER
+#define CONFIG_SPL_I2C
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x187FF0
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_GPIO
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_BSS_START_ADDR 0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
@@ -40,7 +40,7 @@
#undef CONFIG_DM_MMC
#undef CONFIG_DM_PMIC
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index f96dd77..a4b4c48 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -73,8 +73,7 @@
/* I2C Configuration */
-#define CONFIG_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
/* Defines for SPL */
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h
index 34a0041..529976e 100644
--- a/include/configs/snapper9260.h
+++ b/include/configs/snapper9260.h
@@ -73,7 +73,7 @@
#endif
/* I2C - Bit-bashed */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SOFT_SPEED 100000
#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
diff --git a/include/configs/sniper.h b/include/configs/sniper.h
index 4747e74..6ef96df 100644
--- a/include/configs/sniper.h
+++ b/include/configs/sniper.h
@@ -53,7 +53,7 @@
* I2C
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_I2C_MULTI_BUS
/*
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 9e37e99..958b850 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -199,7 +199,7 @@
defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
#define CONFIG_SYS_I2C_MVTWSI
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x7f
#endif
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index a5cbb11..b62ddc7 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -116,7 +116,7 @@
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index afc9adb..41efb64 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -56,7 +56,7 @@
/* EHCI */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index 587b134..c6a2cfe 100644
--- a/include/configs/theadorable.h
+++ b/include/configs/theadorable.h
@@ -24,7 +24,7 @@
*/
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE
@@ -93,9 +93,6 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
-
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index f13e9e5..4fcf741 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -88,8 +88,7 @@
/* If DM_I2C, enable non-DM I2C support */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif
/*
diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h
index d0eddcc..1e6f038 100644
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -118,7 +118,7 @@
#ifdef CONFIG_SPL_BUILD
/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
-#undef CONFIG_SYS_I2C
+#undef CONFIG_SYS_I2C_LEGACY
#endif
#endif /* __CONFIG_TI_OMAP4_COMMON_H */
diff --git a/include/configs/topic_miami.h b/include/configs/topic_miami.h
index b668817..18179e9 100644
--- a/include/configs/topic_miami.h
+++ b/include/configs/topic_miami.h
@@ -17,7 +17,7 @@
/* Fixup settings */
/* SPL settings */
-#undef CONFIG_SPL_ETH_SUPPORT
+#undef CONFIG_SPL_ETH
#undef CONFIG_SPL_MAX_FOOTPRINT
#define CONFIG_SPL_MAX_FOOTPRINT CONFIG_SYS_SPI_U_BOOT_OFFS
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h
index 4c4a1a0..aa98a51 100644
--- a/include/configs/tqma6_wru4.h
+++ b/include/configs/tqma6_wru4.h
@@ -30,6 +30,6 @@
#define CONFIG_SYS_BOOTCOUNT_BE
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif /* __CONFIG_TQMA6_WRU4_H */
diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h
index 7da18f9..2553da1 100644
--- a/include/configs/turris_omnia.h
+++ b/include/configs/turris_omnia.h
@@ -43,17 +43,10 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-
-#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
-/* SPL related SPI defines */
-# define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
-#endif
+#define CONFIG_SPL_DRIVERS_MISC
#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC
/* SPL related MMC defines */
-# define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
-# define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
# ifdef CONFIG_SPL_BUILD
# define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
# endif
diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
index b6f75c9..813e743 100644
--- a/include/configs/udoo_neo.h
+++ b/include/configs/udoo_neo.h
@@ -71,7 +71,7 @@
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* I2C configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
index 27053c0..648232b 100644
--- a/include/configs/usbarmory.h
+++ b/include/configs/usbarmory.h
@@ -32,7 +32,7 @@
#define CONFIG_MXC_USB_FLAGS 0
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index fd4c749..4f11018 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -42,7 +42,7 @@
#define CONFIG_FEC_MXC_PHYADDR 0
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h
index f97431f..e90eaf3 100644
--- a/include/configs/vining_2000.h
+++ b/include/configs/vining_2000.h
@@ -43,7 +43,7 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
diff --git a/include/configs/warp.h b/include/configs/warp.h
index bda8ff9..e3beee0 100644
--- a/include/configs/warp.h
+++ b/include/configs/warp.h
@@ -53,7 +53,7 @@
#define DFU_DEFAULT_POLL_TIMEOUT 300
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h
index d498c8f..f96178b 100644
--- a/include/configs/work_92105.h
+++ b/include/configs/work_92105.h
@@ -47,7 +47,7 @@
* I2C driver
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SPEED 350000
/*
diff --git a/include/configs/x530.h b/include/configs/x530.h
index 4446510..515c6e7 100644
--- a/include/configs/x530.h
+++ b/include/configs/x530.h
@@ -97,7 +97,4 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
-
#endif /* _CONFIG_X530_H */
diff --git a/include/configs/xpress.h b/include/configs/xpress.h
index e7a2658..e4678e3 100644
--- a/include/configs/xpress.h
+++ b/include/configs/xpress.h
@@ -22,7 +22,7 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
/* I2C configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
diff --git a/include/cpu_func.h b/include/cpu_func.h
index c3a66f0..23cd5ec 100644
--- a/include/cpu_func.h
+++ b/include/cpu_func.h
@@ -59,6 +59,7 @@
void dcache_enable(void);
void dcache_disable(void);
void mmu_disable(void);
+int mmu_status(void);
/* arch/$(ARCH)/lib/cache.c */
void enable_caches(void);
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 3da05d8..4e1a844 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -232,6 +232,16 @@
}
/**
+ * ofnode_name_eq() - Check if the node name is equivalent to a given name
+ * ignoring the unit address
+ *
+ * @node: valid node reference that has to be compared
+ * @name: name that has to be compared with the node name
+ * @return true if matches, false if it doesn't match
+ */
+bool ofnode_name_eq(ofnode node, const char *name);
+
+/**
* ofnode_read_u32() - Read a 32-bit integer from a property
*
* @ref: valid node reference to read property from
diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
index 9047ec6..d417b92 100644
--- a/include/dt-bindings/mux/ti-serdes.h
+++ b/include/dt-bindings/mux/ti-serdes.h
@@ -90,4 +90,9 @@
#define J7200_SERDES0_LANE3_USB 0x2
#define J7200_SERDES0_LANE3_IP4_UNUSED 0x3
+/* AM64 */
+
+#define AM64_SERDES0_LANE0_PCIE0 0x0
+#define AM64_SERDES0_LANE0_USB 0x1
+
#endif /* _DT_BINDINGS_MUX_TI_SERDES */
diff --git a/include/dt-bindings/phy/phy-cadence.h b/include/dt-bindings/phy/phy-cadence.h
new file mode 100644
index 0000000..4652bcb
--- /dev/null
+++ b/include/dt-bindings/phy/phy-cadence.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * This header provides constants for Cadence SERDES.
+ */
+
+#ifndef _DT_BINDINGS_CADENCE_SERDES_H
+#define _DT_BINDINGS_CADENCE_SERDES_H
+
+/* Torrent */
+#define TORRENT_SERDES_NO_SSC 0
+#define TORRENT_SERDES_EXTERNAL_SSC 1
+#define TORRENT_SERDES_INTERNAL_SSC 2
+
+#define CDNS_TORRENT_REFCLK_DRIVER 0
+
+/* Sierra */
+#define CDNS_SIERRA_PLL_CMNLC 0
+#define CDNS_SIERRA_PLL_CMNLC1 1
+
+#endif /* _DT_BINDINGS_CADENCE_SERDES_H */
diff --git a/include/dt-bindings/phy/phy-ti.h b/include/dt-bindings/phy/phy-ti.h
new file mode 100644
index 0000000..ad955d3
--- /dev/null
+++ b/include/dt-bindings/phy/phy-ti.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * This header provides constants for TI SERDES.
+ */
+
+#ifndef _DT_BINDINGS_TI_SERDES
+#define _DT_BINDINGS_TI_SERDES
+
+/* Clock index for output clocks from WIZ */
+
+/* MUX Clocks */
+#define TI_WIZ_PLL0_REFCLK 0
+#define TI_WIZ_PLL1_REFCLK 1
+#define TI_WIZ_REFCLK_DIG 2
+
+/* Reserve index here for future additions */
+
+/* MISC Clocks */
+#define TI_WIZ_PHY_EN_REFCLK 16
+
+#endif /* _DT_BINDINGS_TI_SERDES */
diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h
index 7e657da..d3714ed 100644
--- a/include/dt-bindings/phy/phy.h
+++ b/include/dt-bindings/phy/phy.h
@@ -19,5 +19,6 @@
#define PHY_TYPE_DP 6
#define PHY_TYPE_XPCS 7
#define PHY_TYPE_SGMII 8
+#define PHY_TYPE_QSGMII 9
#endif /* _DT_BINDINGS_PHY */
diff --git a/include/dt-bindings/pinctrl/am33xx.h b/include/dt-bindings/pinctrl/am33xx.h
index 226f772..17877e8 100644
--- a/include/dt-bindings/pinctrl/am33xx.h
+++ b/include/dt-bindings/pinctrl/am33xx.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* This header provides constants specific to AM33XX pinctrl bindings.
*/
@@ -39,5 +40,133 @@
#undef PIN_OFF_INPUT_PULLDOWN
#undef PIN_OFF_WAKEUPENABLE
-#endif
+#define AM335X_PIN_OFFSET_MIN 0x0800U
+#define AM335X_PIN_GPMC_AD0 0x800
+#define AM335X_PIN_GPMC_AD1 0x804
+#define AM335X_PIN_GPMC_AD2 0x808
+#define AM335X_PIN_GPMC_AD3 0x80c
+#define AM335X_PIN_GPMC_AD4 0x810
+#define AM335X_PIN_GPMC_AD5 0x814
+#define AM335X_PIN_GPMC_AD6 0x818
+#define AM335X_PIN_GPMC_AD7 0x81c
+#define AM335X_PIN_GPMC_AD8 0x820
+#define AM335X_PIN_GPMC_AD9 0x824
+#define AM335X_PIN_GPMC_AD10 0x828
+#define AM335X_PIN_GPMC_AD11 0x82c
+#define AM335X_PIN_GPMC_AD12 0x830
+#define AM335X_PIN_GPMC_AD13 0x834
+#define AM335X_PIN_GPMC_AD14 0x838
+#define AM335X_PIN_GPMC_AD15 0x83c
+#define AM335X_PIN_GPMC_A0 0x840
+#define AM335X_PIN_GPMC_A1 0x844
+#define AM335X_PIN_GPMC_A2 0x848
+#define AM335X_PIN_GPMC_A3 0x84c
+#define AM335X_PIN_GPMC_A4 0x850
+#define AM335X_PIN_GPMC_A5 0x854
+#define AM335X_PIN_GPMC_A6 0x858
+#define AM335X_PIN_GPMC_A7 0x85c
+#define AM335X_PIN_GPMC_A8 0x860
+#define AM335X_PIN_GPMC_A9 0x864
+#define AM335X_PIN_GPMC_A10 0x868
+#define AM335X_PIN_GPMC_A11 0x86c
+#define AM335X_PIN_GPMC_WAIT0 0x870
+#define AM335X_PIN_GPMC_WPN 0x874
+#define AM335X_PIN_GPMC_BEN1 0x878
+#define AM335X_PIN_GPMC_CSN0 0x87c
+#define AM335X_PIN_GPMC_CSN1 0x880
+#define AM335X_PIN_GPMC_CSN2 0x884
+#define AM335X_PIN_GPMC_CSN3 0x888
+#define AM335X_PIN_GPMC_CLK 0x88c
+#define AM335X_PIN_GPMC_ADVN_ALE 0x890
+#define AM335X_PIN_GPMC_OEN_REN 0x894
+#define AM335X_PIN_GPMC_WEN 0x898
+#define AM335X_PIN_GPMC_BEN0_CLE 0x89c
+#define AM335X_PIN_LCD_DATA0 0x8a0
+#define AM335X_PIN_LCD_DATA1 0x8a4
+#define AM335X_PIN_LCD_DATA2 0x8a8
+#define AM335X_PIN_LCD_DATA3 0x8ac
+#define AM335X_PIN_LCD_DATA4 0x8b0
+#define AM335X_PIN_LCD_DATA5 0x8b4
+#define AM335X_PIN_LCD_DATA6 0x8b8
+#define AM335X_PIN_LCD_DATA7 0x8bc
+#define AM335X_PIN_LCD_DATA8 0x8c0
+#define AM335X_PIN_LCD_DATA9 0x8c4
+#define AM335X_PIN_LCD_DATA10 0x8c8
+#define AM335X_PIN_LCD_DATA11 0x8cc
+#define AM335X_PIN_LCD_DATA12 0x8d0
+#define AM335X_PIN_LCD_DATA13 0x8d4
+#define AM335X_PIN_LCD_DATA14 0x8d8
+#define AM335X_PIN_LCD_DATA15 0x8dc
+#define AM335X_PIN_LCD_VSYNC 0x8e0
+#define AM335X_PIN_LCD_HSYNC 0x8e4
+#define AM335X_PIN_LCD_PCLK 0x8e8
+#define AM335X_PIN_LCD_AC_BIAS_EN 0x8ec
+#define AM335X_PIN_MMC0_DAT3 0x8f0
+#define AM335X_PIN_MMC0_DAT2 0x8f4
+#define AM335X_PIN_MMC0_DAT1 0x8f8
+#define AM335X_PIN_MMC0_DAT0 0x8fc
+#define AM335X_PIN_MMC0_CLK 0x900
+#define AM335X_PIN_MMC0_CMD 0x904
+#define AM335X_PIN_MII1_COL 0x908
+#define AM335X_PIN_MII1_CRS 0x90c
+#define AM335X_PIN_MII1_RX_ER 0x910
+#define AM335X_PIN_MII1_TX_EN 0x914
+#define AM335X_PIN_MII1_RX_DV 0x918
+#define AM335X_PIN_MII1_TXD3 0x91c
+#define AM335X_PIN_MII1_TXD2 0x920
+#define AM335X_PIN_MII1_TXD1 0x924
+#define AM335X_PIN_MII1_TXD0 0x928
+#define AM335X_PIN_MII1_TX_CLK 0x92c
+#define AM335X_PIN_MII1_RX_CLK 0x930
+#define AM335X_PIN_MII1_RXD3 0x934
+#define AM335X_PIN_MII1_RXD2 0x938
+#define AM335X_PIN_MII1_RXD1 0x93c
+#define AM335X_PIN_MII1_RXD0 0x940
+#define AM335X_PIN_RMII1_REF_CLK 0x944
+#define AM335X_PIN_MDIO 0x948
+#define AM335X_PIN_MDC 0x94c
+#define AM335X_PIN_SPI0_SCLK 0x950
+#define AM335X_PIN_SPI0_D0 0x954
+#define AM335X_PIN_SPI0_D1 0x958
+#define AM335X_PIN_SPI0_CS0 0x95c
+#define AM335X_PIN_SPI0_CS1 0x960
+#define AM335X_PIN_ECAP0_IN_PWM0_OUT 0x964
+#define AM335X_PIN_UART0_CTSN 0x968
+#define AM335X_PIN_UART0_RTSN 0x96c
+#define AM335X_PIN_UART0_RXD 0x970
+#define AM335X_PIN_UART0_TXD 0x974
+#define AM335X_PIN_UART1_CTSN 0x978
+#define AM335X_PIN_UART1_RTSN 0x97c
+#define AM335X_PIN_UART1_RXD 0x980
+#define AM335X_PIN_UART1_TXD 0x984
+#define AM335X_PIN_I2C0_SDA 0x988
+#define AM335X_PIN_I2C0_SCL 0x98c
+#define AM335X_PIN_MCASP0_ACLKX 0x990
+#define AM335X_PIN_MCASP0_FSX 0x994
+#define AM335X_PIN_MCASP0_AXR0 0x998
+#define AM335X_PIN_MCASP0_AHCLKR 0x99c
+#define AM335X_PIN_MCASP0_ACLKR 0x9a0
+#define AM335X_PIN_MCASP0_FSR 0x9a4
+#define AM335X_PIN_MCASP0_AXR1 0x9a8
+#define AM335X_PIN_MCASP0_AHCLKX 0x9ac
+#define AM335X_PIN_XDMA_EVENT_INTR0 0x9b0
+#define AM335X_PIN_XDMA_EVENT_INTR1 0x9b4
+#define AM335X_PIN_WARMRSTN 0x9b8
+#define AM335X_PIN_NNMI 0x9c0
+#define AM335X_PIN_TMS 0x9d0
+#define AM335X_PIN_TDI 0x9d4
+#define AM335X_PIN_TDO 0x9d8
+#define AM335X_PIN_TCK 0x9dc
+#define AM335X_PIN_TRSTN 0x9e0
+#define AM335X_PIN_EMU0 0x9e4
+#define AM335X_PIN_EMU1 0x9e8
+#define AM335X_PIN_RTC_PWRONRSTN 0x9f8
+#define AM335X_PIN_PMIC_POWER_EN 0x9fc
+#define AM335X_PIN_EXT_WAKEUP 0xa00
+#define AM335X_PIN_USB0_DRVVBUS 0xa1c
+#define AM335X_PIN_USB1_DRVVBUS 0xa34
+
+#define AM335X_PIN_OFFSET_MAX 0x0a34U
+
+#endif
diff --git a/include/dt-bindings/pinctrl/omap.h b/include/dt-bindings/pinctrl/omap.h
index 58fe28f..f48245f 100644
--- a/include/dt-bindings/pinctrl/omap.h
+++ b/include/dt-bindings/pinctrl/omap.h
@@ -24,7 +24,7 @@
#define PULL_UP (1 << 4)
#define ALTELECTRICALSEL (1 << 5)
-/* 34xx specific mux bit defines */
+/* omap3/4/5 specific mux bit defines */
#define INPUT_EN (1 << 8)
#define OFF_EN (1 << 9)
#define OFFOUT_EN (1 << 10)
@@ -32,8 +32,6 @@
#define OFF_PULL_EN (1 << 12)
#define OFF_PULL_UP (1 << 13)
#define WAKEUP_EN (1 << 14)
-
-/* 44xx specific mux bit defines */
#define WAKEUP_EVENT (1 << 15)
/* Active pin states */
@@ -48,8 +46,8 @@
#define PIN_OFF_NONE 0
#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL)
#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN)
-#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP)
-#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN)
+#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFFOUT_EN | OFF_PULL_EN | OFF_PULL_UP)
+#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFFOUT_EN | OFF_PULL_EN)
#define PIN_OFF_WAKEUPENABLE WAKEUP_EN
/*
@@ -66,7 +64,8 @@
#define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
#define DM814X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
#define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
-#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
+#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) (0)
+#define AM33XX_PADCONF(pa, conf, mux) OMAP_IOPAD_OFFSET((pa), 0x0800) (conf) (mux)
/*
* Macros to allow using the offset from the padconf physical address
diff --git a/include/efi_loader.h b/include/efi_loader.h
index e6d41cf..a120d94 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -15,6 +15,8 @@
#include <efi_api.h>
#include <image.h>
#include <pe.h>
+#include <linux/list.h>
+#include <linux/oid_registry.h>
struct blk_desc;
struct jmp_buf_data;
@@ -29,11 +31,100 @@
return memcpy(dst, src, sizeof(efi_guid_t));
}
-/* No need for efi loader support in SPL */
#if CONFIG_IS_ENABLED(EFI_LOADER)
-#include <linux/list.h>
-#include <linux/oid_registry.h>
+/**
+ * __efi_runtime_data - declares a non-const variable for EFI runtime section
+ *
+ * This macro indicates that a variable is non-const and should go into the
+ * EFI runtime section, and thus still be available when the OS is running.
+ *
+ * Only use on variables not declared const.
+ *
+ * Example:
+ *
+ * ::
+ *
+ * static __efi_runtime_data my_computed_table[256];
+ */
+#define __efi_runtime_data __section(".data.efi_runtime")
+
+/**
+ * __efi_runtime_rodata - declares a read-only variable for EFI runtime section
+ *
+ * This macro indicates that a variable is read-only (const) and should go into
+ * the EFI runtime section, and thus still be available when the OS is running.
+ *
+ * Only use on variables also declared const.
+ *
+ * Example:
+ *
+ * ::
+ *
+ * static const __efi_runtime_rodata my_const_table[] = { 1, 2, 3 };
+ */
+#define __efi_runtime_rodata __section(".rodata.efi_runtime")
+
+/**
+ * __efi_runtime - declares a function for EFI runtime section
+ *
+ * This macro indicates that a function should go into the EFI runtime section,
+ * and thus still be available when the OS is running.
+ *
+ * Example:
+ *
+ * ::
+ *
+ * static __efi_runtime compute_my_table(void);
+ */
+#define __efi_runtime __section(".text.efi_runtime")
+
+/*
+ * Call this with mmio_ptr as the _pointer_ to a pointer to an MMIO region
+ * to make it available at runtime
+ */
+efi_status_t efi_add_runtime_mmio(void *mmio_ptr, u64 len);
+
+/*
+ * Special case handler for error/abort that just tries to dtrt to get
+ * back to u-boot world
+ */
+void efi_restore_gd(void);
+/* Call this to set the current device name */
+void efi_set_bootdev(const char *dev, const char *devnr, const char *path,
+ void *buffer, size_t buffer_size);
+/* Called by networking code to memorize the dhcp ack package */
+void efi_net_set_dhcp_ack(void *pkt, int len);
+/* Print information about all loaded images */
+void efi_print_image_infos(void *pc);
+
+/* Hook at initialization */
+efi_status_t efi_launch_capsules(void);
+
+#else /* CONFIG_IS_ENABLED(EFI_LOADER) */
+
+/* Without CONFIG_EFI_LOADER we don't have a runtime section, stub it out */
+#define __efi_runtime_data
+#define __efi_runtime_rodata
+#define __efi_runtime
+static inline efi_status_t efi_add_runtime_mmio(void *mmio_ptr, u64 len)
+{
+ return EFI_SUCCESS;
+}
+
+/* No loader configured, stub out EFI_ENTRY */
+static inline void efi_restore_gd(void) { }
+static inline void efi_set_bootdev(const char *dev, const char *devnr,
+ const char *path, void *buffer,
+ size_t buffer_size) { }
+static inline void efi_net_set_dhcp_ack(void *pkt, int len) { }
+static inline void efi_print_image_infos(void *pc) { }
+static inline efi_status_t efi_launch_capsules(void)
+{
+ return EFI_SUCCESS;
+}
+
+#endif /* CONFIG_IS_ENABLED(EFI_LOADER) */
/* Maximum number of configuration tables */
#define EFI_MAX_CONFIGURATION_TABLES 16
@@ -466,8 +557,6 @@
struct efi_simple_file_system_protocol *
efi_fs_from_path(struct efi_device_path *fp);
-/* Called by networking code to memorize the dhcp ack package */
-void efi_net_set_dhcp_ack(void *pkt, int len);
/* Called by efi_set_watchdog_timer to reset the timer */
efi_status_t efi_set_watchdog(unsigned long timeout);
@@ -481,14 +570,8 @@
struct efi_loaded_image *loaded_image_info);
/* Called once to store the pristine gd pointer */
void efi_save_gd(void);
-/* Special case handler for error/abort that just tries to dtrt to get
- * back to u-boot world */
-void efi_restore_gd(void);
/* Call this to relocate the runtime section to an address space */
void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map);
-/* Call this to set the current device name */
-void efi_set_bootdev(const char *dev, const char *devnr, const char *path,
- void *buffer, size_t buffer_size);
/* Add a new object to the object list. */
void efi_add_handle(efi_handle_t obj);
/* Create handle */
@@ -620,8 +703,6 @@
struct efi_device_path *file_path,
struct efi_loaded_image_obj **handle_ptr,
struct efi_loaded_image **info_ptr);
-/* Print information about all loaded images */
-void efi_print_image_infos(void *pc);
#ifdef CONFIG_EFI_LOADER_BOUNCE_BUFFER
extern void *efi_bounce_buffer;
@@ -683,62 +764,12 @@
(((_dp)->type == DEVICE_PATH_TYPE_##_type) && \
((_dp)->sub_type == DEVICE_PATH_SUB_TYPE_##_subtype))
-/**
- * __efi_runtime_data - declares a non-const variable for EFI runtime section
- *
- * This macro indicates that a variable is non-const and should go into the
- * EFI runtime section, and thus still be available when the OS is running.
- *
- * Only use on variables not declared const.
- *
- * Example:
- *
- * ::
- *
- * static __efi_runtime_data my_computed_table[256];
- */
-#define __efi_runtime_data __section(".data.efi_runtime")
-
-/**
- * __efi_runtime_rodata - declares a read-only variable for EFI runtime section
- *
- * This macro indicates that a variable is read-only (const) and should go into
- * the EFI runtime section, and thus still be available when the OS is running.
- *
- * Only use on variables also declared const.
- *
- * Example:
- *
- * ::
- *
- * static const __efi_runtime_rodata my_const_table[] = { 1, 2, 3 };
- */
-#define __efi_runtime_rodata __section(".rodata.efi_runtime")
-
-/**
- * __efi_runtime - declares a function for EFI runtime section
- *
- * This macro indicates that a function should go into the EFI runtime section,
- * and thus still be available when the OS is running.
- *
- * Example:
- *
- * ::
- *
- * static __efi_runtime compute_my_table(void);
- */
-#define __efi_runtime __section(".text.efi_runtime")
-
/* Indicate supported runtime services */
efi_status_t efi_init_runtime_supported(void);
/* Update CRC32 in table header */
void __efi_runtime efi_update_table_header_crc32(struct efi_table_hdr *table);
-/* Call this with mmio_ptr as the _pointer_ to a pointer to an MMIO region
- * to make it available at runtime */
-efi_status_t efi_add_runtime_mmio(void *mmio_ptr, u64 len);
-
/* Boards may provide the functions below to implement RTS functionality */
void __efi_runtime EFIAPI efi_reset_system(
@@ -927,34 +958,6 @@
#define EFI_CAPSULE_DIR L"\\EFI\\UpdateCapsule\\"
-/* Hook at initialization */
-efi_status_t efi_launch_capsules(void);
-
-#else /* CONFIG_IS_ENABLED(EFI_LOADER) */
-
-/* Without CONFIG_EFI_LOADER we don't have a runtime section, stub it out */
-#define __efi_runtime_data
-#define __efi_runtime_rodata
-#define __efi_runtime
-static inline efi_status_t efi_add_runtime_mmio(void *mmio_ptr, u64 len)
-{
- return EFI_SUCCESS;
-}
-
-/* No loader configured, stub out EFI_ENTRY */
-static inline void efi_restore_gd(void) { }
-static inline void efi_set_bootdev(const char *dev, const char *devnr,
- const char *path, void *buffer,
- size_t buffer_size) { }
-static inline void efi_net_set_dhcp_ack(void *pkt, int len) { }
-static inline void efi_print_image_infos(void *pc) { }
-static inline efi_status_t efi_launch_capsules(void)
-{
- return EFI_SUCCESS;
-}
-
-#endif /* CONFIG_IS_ENABLED(EFI_LOADER) */
-
/**
* Install the ESRT system table.
*
diff --git a/include/i2c.h b/include/i2c.h
index c0fe94c..8db34a6 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -20,7 +20,7 @@
/*
* For now there are essentially two parts to this file - driver model
- * here at the top, and the older code below (with CONFIG_SYS_I2C being
+ * here at the top, and the older code below (with CONFIG_SYS_I2C_LEGACY being
* most recent). The plan is to migrate everything to driver model.
* The driver model structures and API are separate as they are different
* enough as to be incompatible for compilation purposes.
@@ -748,7 +748,7 @@
void i2c_init(int speed, int slaveaddr);
void i2c_init_board(void);
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
/*
* i2c_get_bus_num:
*
@@ -922,13 +922,13 @@
*/
unsigned int i2c_get_bus_speed(void);
-#endif /* CONFIG_SYS_I2C */
+#endif /* CONFIG_SYS_I2C_LEGACY */
/*
* only for backwardcompatibility, should go away if we switched
* completely to new multibus support.
*/
-#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
+#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
# if !defined(CONFIG_SYS_MAX_I2C_BUS)
# define CONFIG_SYS_MAX_I2C_BUS 2
# endif
diff --git a/include/spl.h b/include/spl.h
index 925b6f0..afbf39b 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -219,6 +219,7 @@
void *fdt_addr;
#endif
u32 boot_device;
+ u32 offset;
u32 size;
u32 flags;
void *arg;
diff --git a/include/watchdog.h b/include/watchdog.h
index a4a4e8e..14fa5fd 100644
--- a/include/watchdog.h
+++ b/include/watchdog.h
@@ -53,7 +53,7 @@
#else
/* Don't require the watchdog to be enabled in SPL */
#if defined(CONFIG_SPL_BUILD) && \
- !defined(CONFIG_SPL_WATCHDOG_SUPPORT)
+ !defined(CONFIG_SPL_WATCHDOG)
#define WATCHDOG_RESET() {}
#else
extern void watchdog_reset(void);
diff --git a/lib/Kconfig b/lib/Kconfig
index ad4d75e..fdcf7ea 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -40,6 +40,14 @@
If unsure, say N.
+config CHARSET
+ bool
+ default y if UT_UNICODE || EFI_LOADER || UFS
+ help
+ Enables support for various conversions between different
+ character sets, such as between unicode representations and
+ different 'code pages'.
+
config DYNAMIC_CRC_TABLE
bool "Enable Dynamic tables for CRC"
help
diff --git a/lib/Makefile b/lib/Makefile
index 5cd0c9c..07c2ccd 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -25,7 +25,7 @@
obj-$(CONFIG_$(SPL_TPL_)BINMAN_FDT) += binman.o
ifndef API_BUILD
-ifneq ($(CONFIG_UT_UNICODE)$(CONFIG_EFI_LOADER),)
+ifneq ($(CONFIG_CHARSET),)
obj-y += charset.o
endif
endif
diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index f4ed11e..085dc89 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -338,6 +338,7 @@
static int rsa_engine_init(const char *engine_id, ENGINE **pe)
{
+ const char *key_pass;
ENGINE *e;
int ret;
@@ -362,10 +363,20 @@
goto err_set_rsa;
}
+ key_pass = getenv("MKIMAGE_SIGN_PIN");
+ if (key_pass) {
+ if (!ENGINE_ctrl_cmd_string(e, "PIN", key_pass, 0)) {
+ fprintf(stderr, "Couldn't set PIN\n");
+ ret = -1;
+ goto err_set_pin;
+ }
+ }
+
*pe = e;
return 0;
+err_set_pin:
err_set_rsa:
ENGINE_finish(e);
err_engine_init:
@@ -473,7 +484,7 @@
#endif
EVP_MD_CTX_destroy(context);
- debug("Got signature: %d bytes, expected %zu\n", *sig_size, size);
+ debug("Got signature: %zu bytes, expected %d\n", size, EVP_PKEY_size(pkey));
*sigp = sig;
*sig_size = size;
diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index bb8cc61..3840764 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -556,7 +556,7 @@
*/
if (info->checksum->checksum_len >
info->crypto->key_len) {
- debug("%s: invlaid checksum-algorithm %s for %s\n",
+ debug("%s: invalid checksum-algorithm %s for %s\n",
__func__, info->checksum->name, info->crypto->name);
return -EINVAL;
}
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 5be1a9b..25a3e7f 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -459,7 +459,7 @@
quiet_cmd_keep_syms_lto = KSL $@
cmd_keep_syms_lto = \
- NM=$(NM) $(srctree)/scripts/gen_ll_addressable_symbols.sh $^ >$@
+ $(srctree)/scripts/gen_ll_addressable_symbols.sh $(NM) $^ > $@
quiet_cmd_keep_syms_lto_cc = KSLCC $@
cmd_keep_syms_lto_cc = \
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 9b35e1c..812d8f2 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -708,7 +708,6 @@
CONFIG_HVBOOT
CONFIG_HWCONFIG
CONFIG_HW_ENV_SETTINGS
-CONFIG_I2C
CONFIG_I2C_ENV_EEPROM_BUS
CONFIG_I2C_GSC
CONFIG_I2C_MBB_TIMEOUT
@@ -2297,7 +2296,6 @@
CONFIG_SYS_HRCW_HIGH
CONFIG_SYS_HRCW_LOW
CONFIG_SYS_HZ_CLOCK
-CONFIG_SYS_I2C
CONFIG_SYS_I2C2_FSL_OFFSET
CONFIG_SYS_I2C2_OFFSET
CONFIG_SYS_I2C2_PINMUX_CLR
@@ -2352,6 +2350,7 @@
CONFIG_SYS_I2C_IHS_SPEED_3_1
CONFIG_SYS_I2C_INIT_BOARD
CONFIG_SYS_I2C_LDI_ADDR
+CONFIG_SYS_I2C_LEGACY
CONFIG_SYS_I2C_LPC32XX_SLAVE
CONFIG_SYS_I2C_LPC32XX_SPEED
CONFIG_SYS_I2C_MAC1_BUS
@@ -3272,7 +3271,6 @@
CONFIG_SYS_USE_NANDFLASH
CONFIG_SYS_USE_NORFLASH
CONFIG_SYS_USR_EXCEP
-CONFIG_SYS_U_BOOT_OFFS
CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR
CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN
CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT
diff --git a/scripts/gen_ll_addressable_symbols.sh b/scripts/gen_ll_addressable_symbols.sh
index 3978a39..b8840dd 100755
--- a/scripts/gen_ll_addressable_symbols.sh
+++ b/scripts/gen_ll_addressable_symbols.sh
@@ -5,8 +5,11 @@
# Generate __ADDRESSABLE(symbol) for every linker list entry symbol, so that LTO
# does not optimize these symbols away
+# The expected parameter of this script is the command requested to have
+# the U-Boot symbols to parse, for example: $(NM) $(u-boot-main)
+
set -e
echo '#include <common.h>'
-$NM "$@" 2>/dev/null | grep -oe '_u_boot_list_2_[a-zA-Z0-9_]*_2_[a-zA-Z0-9_]*' | \
+$@ 2>/dev/null | grep -oe '_u_boot_list_2_[a-zA-Z0-9_]*_2_[a-zA-Z0-9_]*' | \
sort -u | sed -e 's/^\(.*\)/extern char \1[];\n__ADDRESSABLE(\1);/'
diff --git a/test/dm/core.c b/test/dm/core.c
index 0492698..48e66b7 100644
--- a/test/dm/core.c
+++ b/test/dm/core.c
@@ -177,6 +177,20 @@
}
DM_TEST(dm_test_autobind_uclass_pdata_alloc, UT_TESTF_SCAN_PDATA);
+/* compare node names ignoring the unit address */
+static int dm_test_compare_node_name(struct unit_test_state *uts)
+{
+ ofnode node;
+
+ node = ofnode_path("/mmio-bus@0");
+ ut_assert(ofnode_valid(node));
+ ut_assert(ofnode_name_eq(node, "mmio-bus"));
+
+ return 0;
+}
+
+DM_TEST(dm_test_compare_node_name, UT_TESTF_SCAN_PDATA);
+
/* Test that binding with uclass plat setting occurs correctly */
static int dm_test_autobind_uclass_pdata_valid(struct unit_test_state *uts)
{
diff --git a/test/py/tests/test_fs/test_squashfs/sqfs_common.py b/test/py/tests/test_fs/test_squashfs/sqfs_common.py
index 267c4b5..8b84c2c 100644
--- a/test/py/tests/test_fs/test_squashfs/sqfs_common.py
+++ b/test/py/tests/test_fs/test_squashfs/sqfs_common.py
@@ -146,7 +146,7 @@
out = subprocess.run(['mksquashfs -version'], shell=True, check=True,
capture_output=True, text=True)
# 'out' is: mksquashfs version X (yyyy/mm/dd) ...
- return float(out.stdout.split()[2])
+ return float(out.stdout.split()[2].split('-')[0])
def check_mksquashfs_version():
""" Checks if mksquashfs meets the required version. """
diff --git a/tools/Makefile b/tools/Makefile
index bae3f95..4a86321 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -169,14 +169,6 @@
HOST_EXTRACFLAGS += -DCONFIG_FIT_CIPHER
endif
-ifdef CONFIG_SYS_U_BOOT_OFFS
-HOSTCFLAGS_kwbimage.o += -DCONFIG_SYS_U_BOOT_OFFS=$(CONFIG_SYS_U_BOOT_OFFS)
-endif
-
-ifneq ($(CONFIG_ARMADA_38X),)
-HOSTCFLAGS_kwbimage.o += -DCONFIG_KWB_SECURE
-endif
-
# MXSImage needs LibSSL
ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_ARMADA_38X)$(CONFIG_TOOLS_LIBCRYPTO),)
HOSTCFLAGS_kwbimage.o += \
diff --git a/tools/buildman/README b/tools/buildman/README
index 6007947..ec2d4e7 100644
--- a/tools/buildman/README
+++ b/tools/buildman/README
@@ -1017,7 +1017,7 @@
+ u-boot.cfg: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_NET_SUPPORT=1
+ u-boot-spl.cfg: CONFIG_SPL_MMC_SUPPORT=1 CONFIG_SPL_NAND_SUPPORT=1
+ all: CONFIG_SPL_ENV_SUPPORT=1 CONFIG_SPL_MMC_SUPPORT=1 CONFIG_SPL_NAND_SUPPORT=1 CONFIG_SPL_NET_SUPPORT=1
- 44: Convert CONFIG_SPL_USB_HOST_SUPPORT to Kconfig
+ 44: Convert CONFIG_SPL_USB_HOST to Kconfig
...
This shows that commit 44 enabled three new options for the board
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index 02fd0c9..00cb338 100644
--- a/tools/kwbimage.c
+++ b/tools/kwbimage.c
@@ -16,7 +16,6 @@
#include <stdint.h>
#include "kwbimage.h"
-#ifdef CONFIG_KWB_SECURE
#include <openssl/bn.h>
#include <openssl/rsa.h>
#include <openssl/pem.h>
@@ -42,13 +41,10 @@
EVP_MD_CTX_reset(ctx);
}
#endif
-#endif
static struct image_cfg_element *image_cfg;
static int cfgn;
-#ifdef CONFIG_KWB_SECURE
static int verbose_mode;
-#endif
struct boot_mode {
unsigned int id;
@@ -89,7 +85,7 @@
/* Used to identify an undefined execution or destination address */
#define ADDR_INVALID ((uint32_t)-1)
-#define BINARY_MAX_ARGS 8
+#define BINARY_MAX_ARGS 255
/* In-memory representation of a line of the configuration file */
@@ -103,8 +99,8 @@
IMAGE_CFG_NAND_ECC_MODE,
IMAGE_CFG_NAND_PAGESZ,
IMAGE_CFG_BINARY,
- IMAGE_CFG_PAYLOAD,
IMAGE_CFG_DATA,
+ IMAGE_CFG_DATA_DELAY,
IMAGE_CFG_BAUDRATE,
IMAGE_CFG_DEBUG,
IMAGE_CFG_KAK,
@@ -131,8 +127,8 @@
[IMAGE_CFG_NAND_ECC_MODE] = "NAND_ECC_MODE",
[IMAGE_CFG_NAND_PAGESZ] = "NAND_PAGE_SIZE",
[IMAGE_CFG_BINARY] = "BINARY",
- [IMAGE_CFG_PAYLOAD] = "PAYLOAD",
[IMAGE_CFG_DATA] = "DATA",
+ [IMAGE_CFG_DATA_DELAY] = "DATA_DELAY",
[IMAGE_CFG_BAUDRATE] = "BAUDRATE",
[IMAGE_CFG_DEBUG] = "DEBUG",
[IMAGE_CFG_KAK] = "KAK",
@@ -157,7 +153,6 @@
unsigned int args[BINARY_MAX_ARGS];
unsigned int nargs;
} binary;
- const char *payload;
unsigned int dstaddr;
unsigned int execaddr;
unsigned int nandblksz;
@@ -165,6 +160,7 @@
unsigned int nandeccmode;
unsigned int nandpagesz;
struct ext_hdr_v0_reg regdata;
+ unsigned int regdata_delay;
unsigned int baudrate;
unsigned int debug;
const char *key_name;
@@ -243,8 +239,6 @@
return count;
}
-#if defined(CONFIG_KWB_SECURE)
-
static int image_get_csk_index(void)
{
struct image_cfg_element *e;
@@ -267,8 +261,6 @@
return e->sec_specialized_img;
}
-#endif
-
/*
* Compute a 8-bit checksum of a memory area. This algorithm follows
* the requirements of the Marvell SoC BootROM specifications.
@@ -363,7 +355,6 @@
}
}
-#if defined(CONFIG_KWB_SECURE)
static void kwb_msg(const char *fmt, ...)
{
if (verbose_mode) {
@@ -852,8 +843,6 @@
return ret;
}
-#endif
-
static void *image_create_v0(size_t *imagesz, struct image_tool_params *params,
int payloadsz)
{
@@ -874,11 +863,6 @@
headersz += sizeof(struct ext_hdr_v0);
}
- if (image_count_options(IMAGE_CFG_PAYLOAD) > 1) {
- fprintf(stderr, "More than one payload, not possible\n");
- return NULL;
- }
-
image = malloc(headersz);
if (!image) {
fprintf(stderr, "Cannot allocate memory for image\n");
@@ -891,7 +875,7 @@
/* Fill in the main header */
main_hdr->blocksize =
- cpu_to_le32(payloadsz + sizeof(uint32_t) - headersz);
+ cpu_to_le32(payloadsz - headersz);
main_hdr->srcaddr = cpu_to_le32(headersz);
main_hdr->ext = has_ext;
main_hdr->destaddr = cpu_to_le32(params->addr);
@@ -941,7 +925,9 @@
static size_t image_headersz_v1(int *hasext)
{
struct image_cfg_element *binarye;
+ unsigned int count;
size_t headersz;
+ int cfgi;
/*
* Calculate the size of the header and the size of the
@@ -949,21 +935,18 @@
*/
headersz = sizeof(struct main_hdr_v1);
- if (image_count_options(IMAGE_CFG_BINARY) > 1) {
- fprintf(stderr, "More than one binary blob, not supported\n");
- return 0;
- }
+ count = image_count_options(IMAGE_CFG_DATA);
+ if (count > 0)
+ headersz += sizeof(struct register_set_hdr_v1) + 8 * count + 4;
- if (image_count_options(IMAGE_CFG_PAYLOAD) > 1) {
- fprintf(stderr, "More than one payload, not possible\n");
- return 0;
- }
-
- binarye = image_find_option(IMAGE_CFG_BINARY);
- if (binarye) {
+ for (cfgi = 0; cfgi < cfgn; cfgi++) {
int ret;
struct stat s;
+ binarye = &image_cfg[cfgi];
+ if (binarye->type != IMAGE_CFG_BINARY)
+ continue;
+
ret = stat(binarye->binary.file, &s);
if (ret < 0) {
char cwd[PATH_MAX];
@@ -978,38 +961,23 @@
fprintf(stderr,
"Didn't find the file '%s' in '%s' which is mandatory to generate the image\n"
"This file generally contains the DDR3 training code, and should be extracted from an existing bootable\n"
- "image for your board. See 'kwbimage -x' to extract it from an existing image.\n",
+ "image for your board. Use 'dumpimage -T kwbimage -p 0' to extract it from an existing image.\n",
binarye->binary.file, dir);
return 0;
}
headersz += sizeof(struct opt_hdr_v1) +
- s.st_size +
+ ALIGN(s.st_size, 4) +
(binarye->binary.nargs + 2) * sizeof(uint32_t);
if (hasext)
*hasext = 1;
}
-#if defined(CONFIG_KWB_SECURE)
if (image_get_csk_index() >= 0) {
headersz += sizeof(struct secure_hdr_v1);
if (hasext)
*hasext = 1;
}
-#endif
-
-#if defined(CONFIG_SYS_U_BOOT_OFFS)
- if (headersz > CONFIG_SYS_U_BOOT_OFFS) {
- fprintf(stderr,
- "Error: Image header (incl. SPL image) too big!\n");
- fprintf(stderr, "header=0x%x CONFIG_SYS_U_BOOT_OFFS=0x%x!\n",
- (int)headersz, CONFIG_SYS_U_BOOT_OFFS);
- fprintf(stderr, "Increase CONFIG_SYS_U_BOOT_OFFS!\n");
- return 0;
- }
-
- headersz = CONFIG_SYS_U_BOOT_OFFS;
-#endif
/*
* The payload should be aligned on some reasonable
@@ -1018,10 +986,10 @@
return ALIGN(headersz, 4096);
}
-int add_binary_header_v1(uint8_t *cur)
+int add_binary_header_v1(uint8_t **cur, uint8_t **next_ext,
+ struct image_cfg_element *binarye)
{
- struct image_cfg_element *binarye;
- struct opt_hdr_v1 *hdr = (struct opt_hdr_v1 *)cur;
+ struct opt_hdr_v1 *hdr = (struct opt_hdr_v1 *)*cur;
uint32_t *args;
size_t binhdrsz;
struct stat s;
@@ -1029,11 +997,6 @@
FILE *bin;
int ret;
- binarye = image_find_option(IMAGE_CFG_BINARY);
-
- if (!binarye)
- return 0;
-
hdr->headertype = OPT_HDR_V1_BINARY_TYPE;
bin = fopen(binarye->binary.file, "r");
@@ -1051,28 +1014,21 @@
binhdrsz = sizeof(struct opt_hdr_v1) +
(binarye->binary.nargs + 2) * sizeof(uint32_t) +
- s.st_size;
-
- /*
- * The size includes the binary image size, rounded
- * up to a 4-byte boundary. Plus 4 bytes for the
- * next-header byte and 3-byte alignment at the end.
- */
- binhdrsz = ALIGN(binhdrsz, 4) + 4;
+ ALIGN(s.st_size, 4);
hdr->headersz_lsb = cpu_to_le16(binhdrsz & 0xFFFF);
hdr->headersz_msb = (binhdrsz & 0xFFFF0000) >> 16;
- cur += sizeof(struct opt_hdr_v1);
+ *cur += sizeof(struct opt_hdr_v1);
- args = (uint32_t *)cur;
+ args = (uint32_t *)*cur;
*args = cpu_to_le32(binarye->binary.nargs);
args++;
for (argi = 0; argi < binarye->binary.nargs; argi++)
args[argi] = cpu_to_le32(binarye->binary.args[argi]);
- cur += (binarye->binary.nargs + 1) * sizeof(uint32_t);
+ *cur += (binarye->binary.nargs + 1) * sizeof(uint32_t);
- ret = fread(cur, s.st_size, 1, bin);
+ ret = fread(*cur, s.st_size, 1, bin);
if (ret != 1) {
fprintf(stderr,
"Could not read binary image %s\n",
@@ -1082,17 +1038,13 @@
fclose(bin);
- cur += ALIGN(s.st_size, 4);
+ *cur += ALIGN(s.st_size, 4);
- /*
- * For now, we don't support more than one binary
- * header, and no other header types are
- * supported. So, the binary header is necessarily the
- * last one
- */
- *((uint32_t *)cur) = 0x00000000;
+ *((uint32_t *)*cur) = 0x00000000;
+ **next_ext = 1;
+ *next_ext = *cur;
- cur += sizeof(uint32_t);
+ *cur += sizeof(uint32_t);
return 0;
@@ -1102,8 +1054,6 @@
return -1;
}
-#if defined(CONFIG_KWB_SECURE)
-
int export_pub_kak_hash(RSA *kak, struct secure_hdr_v1 *secure_hdr)
{
FILE *hashf;
@@ -1211,20 +1161,19 @@
return 0;
}
-#endif
static void *image_create_v1(size_t *imagesz, struct image_tool_params *params,
uint8_t *ptr, int payloadsz)
{
struct image_cfg_element *e;
struct main_hdr_v1 *main_hdr;
-#if defined(CONFIG_KWB_SECURE)
+ struct register_set_hdr_v1 *register_set_hdr;
struct secure_hdr_v1 *secure_hdr = NULL;
-#endif
size_t headersz;
uint8_t *image, *cur;
int hasext = 0;
uint8_t *next_ext = NULL;
+ int cfgi, datai, size;
/*
* Calculate the size of the header and the size of the
@@ -1249,11 +1198,10 @@
/* Fill the main header */
main_hdr->blocksize =
- cpu_to_le32(payloadsz - headersz + sizeof(uint32_t));
+ cpu_to_le32(payloadsz - headersz);
main_hdr->headersz_lsb = cpu_to_le16(headersz & 0xFFFF);
main_hdr->headersz_msb = (headersz & 0xFFFF0000) >> 16;
- main_hdr->destaddr = cpu_to_le32(params->addr)
- - sizeof(image_header_t);
+ main_hdr->destaddr = cpu_to_le32(params->addr);
main_hdr->execaddr = cpu_to_le32(params->ep);
main_hdr->srcaddr = cpu_to_le32(headersz);
main_hdr->ext = hasext;
@@ -1273,15 +1221,29 @@
e = image_find_option(IMAGE_CFG_DEBUG);
if (e)
main_hdr->flags = e->debug ? 0x1 : 0;
- e = image_find_option(IMAGE_CFG_BINARY);
- if (e) {
- char *s = strrchr(e->binary.file, '/');
- if (strcmp(s, "/binary.0") == 0)
- main_hdr->destaddr = cpu_to_le32(params->addr);
- }
+ /*
+ * For SATA srcaddr is specified in number of sectors starting from
+ * sector 0. The main header is stored at sector number 1.
+ * This expects the sector size to be 512 bytes.
+ * Header size is already aligned.
+ */
+ if (main_hdr->blockid == IBR_HDR_SATA_ID)
+ main_hdr->srcaddr = cpu_to_le32(headersz / 512 + 1);
-#if defined(CONFIG_KWB_SECURE)
+ /*
+ * For SDIO srcaddr is specified in number of sectors starting from
+ * sector 0. The main header is stored at sector number 0.
+ * This expects sector size to be 512 bytes.
+ * Header size is already aligned.
+ */
+ if (main_hdr->blockid == IBR_HDR_SDIO_ID)
+ main_hdr->srcaddr = cpu_to_le32(headersz / 512);
+
+ /* For PCIe srcaddr is not used and must be set to 0xFFFFFFFF. */
+ if (main_hdr->blockid == IBR_HDR_PEX_ID)
+ main_hdr->srcaddr = cpu_to_le32(0xFFFFFFFF);
+
if (image_get_csk_index() >= 0) {
/*
* only reserve the space here; we fill the header later since
@@ -1289,19 +1251,59 @@
*/
secure_hdr = (struct secure_hdr_v1 *)cur;
cur += sizeof(struct secure_hdr_v1);
+ *next_ext = 1;
next_ext = &secure_hdr->next;
}
-#endif
- *next_ext = 1;
- if (add_binary_header_v1(cur))
- return NULL;
+ datai = 0;
+ register_set_hdr = (struct register_set_hdr_v1 *)cur;
+ for (cfgi = 0; cfgi < cfgn; cfgi++) {
+ e = &image_cfg[cfgi];
+ if (e->type != IMAGE_CFG_DATA &&
+ e->type != IMAGE_CFG_DATA_DELAY)
+ continue;
+ if (e->type == IMAGE_CFG_DATA_DELAY) {
+ size = sizeof(struct register_set_hdr_v1) + 8 * datai + 4;
+ register_set_hdr->headertype = OPT_HDR_V1_REGISTER_TYPE;
+ register_set_hdr->headersz_lsb = cpu_to_le16(size & 0xFFFF);
+ register_set_hdr->headersz_msb = size >> 16;
+ register_set_hdr->data[datai].last_entry.delay = e->regdata_delay;
+ cur += size;
+ *next_ext = 1;
+ next_ext = ®ister_set_hdr->data[datai].last_entry.next;
+ datai = 0;
+ continue;
+ }
+ register_set_hdr->data[datai].entry.address =
+ cpu_to_le32(e->regdata.raddr);
+ register_set_hdr->data[datai].entry.value =
+ cpu_to_le32(e->regdata.rdata);
+ datai++;
+ }
+ if (datai != 0) {
+ size = sizeof(struct register_set_hdr_v1) + 8 * datai + 4;
+ register_set_hdr->headertype = OPT_HDR_V1_REGISTER_TYPE;
+ register_set_hdr->headersz_lsb = cpu_to_le16(size & 0xFFFF);
+ register_set_hdr->headersz_msb = size >> 16;
+ /* Set delay to the smallest possible value 1ms. */
+ register_set_hdr->data[datai].last_entry.delay = 1;
+ cur += size;
+ *next_ext = 1;
+ next_ext = ®ister_set_hdr->data[datai].last_entry.next;
+ }
-#if defined(CONFIG_KWB_SECURE)
+ for (cfgi = 0; cfgi < cfgn; cfgi++) {
+ e = &image_cfg[cfgi];
+ if (e->type != IMAGE_CFG_BINARY)
+ continue;
+
+ if (add_binary_header_v1(&cur, &next_ext, e))
+ return NULL;
+ }
+
if (secure_hdr && add_secure_header_v1(params, ptr, payloadsz,
headersz, image, secure_hdr))
return NULL;
-#endif
/* Calculate and set the header checksum */
main_hdr->checksum = image_checksum8(main_hdr, headersz);
@@ -1408,6 +1410,12 @@
el->regdata.raddr = strtoul(value1, NULL, 16);
el->regdata.rdata = strtoul(value2, NULL, 16);
break;
+ case IMAGE_CFG_DATA_DELAY:
+ if (!strcmp(value1, "SDRAM_SETUP"))
+ el->regdata_delay = REGISTER_SET_HDR_OPT_DELAY_SDRAM_SETUP;
+ else
+ el->regdata_delay = REGISTER_SET_HDR_OPT_DELAY_MS(strtoul(value1, NULL, 10));
+ break;
case IMAGE_CFG_BAUDRATE:
el->baudrate = strtoul(value1, NULL, 10);
break;
@@ -1510,6 +1518,17 @@
return e->version;
}
+static int image_get_bootfrom(void)
+{
+ struct image_cfg_element *e;
+
+ e = image_find_option(IMAGE_CFG_BOOT_FROM);
+ if (!e)
+ return -1;
+
+ return e->bootfrom;
+}
+
static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd,
struct image_tool_params *params)
{
@@ -1519,7 +1538,6 @@
size_t headersz = 0;
uint32_t checksum;
int ret;
- int size;
fcfg = fopen(params->imagename, "r");
if (!fcfg) {
@@ -1547,9 +1565,6 @@
exit(EXIT_FAILURE);
}
- /* The MVEBU BootROM does not allow non word aligned payloads */
- sbuf->st_size = ALIGN(sbuf->st_size, 4);
-
version = image_get_version();
switch (version) {
/*
@@ -1580,16 +1595,10 @@
free(image_cfg);
/* Build and add image checksum header */
- checksum =
- cpu_to_le32(image_checksum32((uint32_t *)ptr, sbuf->st_size));
- size = write(ifd, &checksum, sizeof(uint32_t));
- if (size != sizeof(uint32_t)) {
- fprintf(stderr, "Error:%s - Checksum write %d bytes %s\n",
- params->cmdname, size, params->imagefile);
- exit(EXIT_FAILURE);
- }
-
- sbuf->st_size += sizeof(uint32_t);
+ checksum = cpu_to_le32(image_checksum32((uint8_t *)ptr + headersz,
+ sbuf->st_size - headersz - sizeof(uint32_t)));
+ memcpy((uint8_t *)ptr + sbuf->st_size - sizeof(uint32_t), &checksum,
+ sizeof(uint32_t));
/* Finally copy the header into the image area */
memcpy(ptr, image, headersz);
@@ -1604,6 +1613,30 @@
printf("Image Type: MVEBU Boot from %s Image\n",
image_boot_mode_name(mhdr->blockid));
printf("Image version:%d\n", image_version((void *)ptr));
+ if (image_version((void *)ptr) == 1) {
+ struct main_hdr_v1 *mhdr = (struct main_hdr_v1 *)ptr;
+
+ if (mhdr->ext & 0x1) {
+ struct opt_hdr_v1 *ohdr = (struct opt_hdr_v1 *)
+ ((uint8_t *)ptr +
+ sizeof(*mhdr));
+
+ while (1) {
+ uint32_t ohdr_size;
+
+ ohdr_size = (ohdr->headersz_msb << 16) |
+ le16_to_cpu(ohdr->headersz_lsb);
+ if (ohdr->headertype == OPT_HDR_V1_BINARY_TYPE) {
+ printf("BIN Hdr Size: ");
+ genimg_print_size(ohdr_size - 12 - 4 * ohdr->data[0]);
+ }
+ if (!(*((uint8_t *)ohdr + ohdr_size - 4) & 0x1))
+ break;
+ ohdr = (struct opt_hdr_v1 *)((uint8_t *)ohdr +
+ ohdr_size);
+ }
+ }
+ }
printf("Data Size: ");
genimg_print_size(mhdr->blocksize - sizeof(uint32_t));
printf("Load Address: %08x\n", mhdr->destaddr);
@@ -1632,14 +1665,90 @@
/* Only version 0 extended header has checksum */
if (image_version((void *)ptr) == 0) {
- struct ext_hdr_v0 *ext_hdr;
+ struct main_hdr_v0 *mhdr = (struct main_hdr_v0 *)ptr;
- ext_hdr = (struct ext_hdr_v0 *)
+ if (mhdr->ext & 0x1) {
+ struct ext_hdr_v0 *ext_hdr;
+
+ ext_hdr = (struct ext_hdr_v0 *)
(ptr + sizeof(struct main_hdr_v0));
- checksum = image_checksum8(ext_hdr,
- sizeof(struct ext_hdr_v0)
- - sizeof(uint8_t));
- if (checksum != ext_hdr->checksum)
+ checksum = image_checksum8(ext_hdr,
+ sizeof(struct ext_hdr_v0)
+ - sizeof(uint8_t));
+ if (checksum != ext_hdr->checksum)
+ return -FDT_ERR_BADSTRUCTURE;
+ }
+ }
+
+ if (image_version((void *)ptr) == 1) {
+ struct main_hdr_v1 *mhdr = (struct main_hdr_v1 *)ptr;
+ uint32_t offset;
+ uint32_t size;
+
+ if (mhdr->ext & 0x1) {
+ uint32_t ohdr_size;
+ struct opt_hdr_v1 *ohdr = (struct opt_hdr_v1 *)
+ (ptr + sizeof(*mhdr));
+
+ while (1) {
+ if ((uint8_t *)ohdr + sizeof(*ohdr) >
+ (uint8_t *)mhdr + header_size)
+ return -FDT_ERR_BADSTRUCTURE;
+
+ ohdr_size = (ohdr->headersz_msb << 16) |
+ le16_to_cpu(ohdr->headersz_lsb);
+
+ if (ohdr_size < 8 ||
+ (uint8_t *)ohdr + ohdr_size >
+ (uint8_t *)mhdr + header_size)
+ return -FDT_ERR_BADSTRUCTURE;
+
+ if (!(*((uint8_t *)ohdr + ohdr_size - 4) & 0x1))
+ break;
+ ohdr = (struct opt_hdr_v1 *)((uint8_t *)ohdr +
+ ohdr_size);
+ }
+ }
+
+ offset = le32_to_cpu(mhdr->srcaddr);
+
+ /*
+ * For SATA srcaddr is specified in number of sectors.
+ * The main header is must be stored at sector number 1.
+ * This expects that sector size is 512 bytes and recalculates
+ * data offset to bytes relative to the main header.
+ */
+ if (mhdr->blockid == IBR_HDR_SATA_ID) {
+ if (offset < 1)
+ return -FDT_ERR_BADSTRUCTURE;
+ offset -= 1;
+ offset *= 512;
+ }
+
+ /*
+ * For SDIO srcaddr is specified in number of sectors.
+ * This expects that sector size is 512 bytes and recalculates
+ * data offset to bytes.
+ */
+ if (mhdr->blockid == IBR_HDR_SDIO_ID)
+ offset *= 512;
+
+ /*
+ * For PCIe srcaddr is always set to 0xFFFFFFFF.
+ * This expects that data starts after all headers.
+ */
+ if (mhdr->blockid == IBR_HDR_PEX_ID && offset == 0xFFFFFFFF)
+ offset = header_size;
+
+ if (offset > image_size || offset % 4 != 0)
+ return -FDT_ERR_BADSTRUCTURE;
+
+ size = le32_to_cpu(mhdr->blocksize);
+ if (offset + size > image_size || size % 4 != 0)
+ return -FDT_ERR_BADSTRUCTURE;
+
+ if (image_checksum32(ptr + offset, size - 4) !=
+ *(uint32_t *)(ptr + offset + size - 4))
return -FDT_ERR_BADSTRUCTURE;
}
@@ -1650,7 +1759,9 @@
struct image_type_params *tparams)
{
FILE *fcfg;
+ struct stat s;
int alloc_len;
+ int bootfrom;
int version;
void *hdr;
int ret;
@@ -1662,6 +1773,12 @@
exit(EXIT_FAILURE);
}
+ if (stat(params->datafile, &s)) {
+ fprintf(stderr, "Could not stat data file %s: %s\n",
+ params->datafile, strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+
image_cfg = malloc(IMAGE_CFG_ELEMENT_MAX *
sizeof(struct image_cfg_element));
if (!image_cfg) {
@@ -1681,6 +1798,7 @@
exit(EXIT_FAILURE);
}
+ bootfrom = image_get_bootfrom();
version = image_get_version();
switch (version) {
/*
@@ -1719,12 +1837,77 @@
/*
* The resulting image needs to be 4-byte aligned. At least
* the Marvell hdrparser tool complains if its unaligned.
- * By returning 1 here in this function, called via
- * tparams->vrec_header() in mkimage.c, mkimage will
- * automatically pad the the resulting image to a 4-byte
- * size if necessary.
+ * After the image data is stored 4-byte checksum.
+ * Final SPI and NAND images must be aligned to 256 bytes.
+ * Final SATA and SDIO images must be aligned to 512 bytes.
*/
- return 1;
+ if (bootfrom == IBR_HDR_SPI_ID || bootfrom == IBR_HDR_NAND_ID)
+ return 4 + (256 - (alloc_len + s.st_size + 4) % 256) % 256;
+ else if (bootfrom == IBR_HDR_SATA_ID || bootfrom == IBR_HDR_SDIO_ID)
+ return 4 + (512 - (alloc_len + s.st_size + 4) % 512) % 512;
+ else
+ return 4 + (4 - s.st_size % 4) % 4;
+}
+
+static int kwbimage_extract_subimage(void *ptr, struct image_tool_params *params)
+{
+ struct main_hdr_v1 *mhdr = (struct main_hdr_v1 *)ptr;
+ size_t header_size = kwbimage_header_size(ptr);
+ int idx = params->pflag;
+ int cur_idx = 0;
+ uint32_t offset;
+ ulong image;
+ ulong size;
+
+ if (image_version((void *)ptr) == 1 && (mhdr->ext & 0x1)) {
+ struct opt_hdr_v1 *ohdr = (struct opt_hdr_v1 *)
+ ((uint8_t *)ptr +
+ sizeof(*mhdr));
+
+ while (1) {
+ uint32_t ohdr_size = (ohdr->headersz_msb << 16) |
+ le16_to_cpu(ohdr->headersz_lsb);
+
+ if (ohdr->headertype == OPT_HDR_V1_BINARY_TYPE) {
+ if (idx == cur_idx) {
+ image = (ulong)&ohdr->data[4 +
+ 4 * ohdr->data[0]];
+ size = ohdr_size - 12 -
+ 4 * ohdr->data[0];
+ goto extract;
+ }
+ ++cur_idx;
+ }
+ if (!(*((uint8_t *)ohdr + ohdr_size - 4) & 0x1))
+ break;
+ ohdr = (struct opt_hdr_v1 *)((uint8_t *)ohdr +
+ ohdr_size);
+ }
+ }
+
+ if (idx != cur_idx) {
+ printf("Image %d is not present\n", idx);
+ return -1;
+ }
+
+ offset = le32_to_cpu(mhdr->srcaddr);
+
+ if (mhdr->blockid == IBR_HDR_SATA_ID) {
+ offset -= 1;
+ offset *= 512;
+ }
+
+ if (mhdr->blockid == IBR_HDR_SDIO_ID)
+ offset *= 512;
+
+ if (mhdr->blockid == IBR_HDR_PEX_ID && offset == 0xFFFFFFFF)
+ offset = header_size;
+
+ image = (ulong)((uint8_t *)ptr + offset);
+ size = le32_to_cpu(mhdr->blocksize) - 4;
+
+extract:
+ return imagetool_save_subimage(params->outfile, image, size);
}
/*
@@ -1732,7 +1915,7 @@
*/
static int kwbimage_check_params(struct image_tool_params *params)
{
- if (!strlen(params->imagename)) {
+ if (!params->iflag && (!params->imagename || !strlen(params->imagename))) {
char *msg = "Configuration file for kwbimage creation omitted";
fprintf(stderr, "Error:%s - %s\n", params->cmdname, msg);
@@ -1742,7 +1925,7 @@
return (params->dflag && (params->fflag || params->lflag)) ||
(params->fflag && (params->dflag || params->lflag)) ||
(params->lflag && (params->dflag || params->fflag)) ||
- (params->xflag) || !(strlen(params->imagename));
+ (params->xflag);
}
/*
@@ -1757,7 +1940,7 @@
kwbimage_verify_header,
kwbimage_print_header,
kwbimage_set_header,
- NULL,
+ kwbimage_extract_subimage,
kwbimage_check_image_types,
NULL,
kwbimage_generate
diff --git a/tools/kwbimage.h b/tools/kwbimage.h
index 0b6d05b..e063e3e 100644
--- a/tools/kwbimage.h
+++ b/tools/kwbimage.h
@@ -11,6 +11,12 @@
#include <compiler.h>
#include <stdint.h>
+#ifdef __GNUC__
+#define __packed __attribute((packed))
+#else
+#define __packed
+#endif
+
#define KWBIMAGE_MAX_CONFIG ((0x1dc - 0x20)/sizeof(struct reg_config))
#define MAX_TEMPBUF_LEN 32
@@ -27,7 +33,8 @@
#define IBR_HDR_SATA_ID 0x78
#define IBR_HDR_PEX_ID 0x9C
#define IBR_HDR_UART_ID 0x69
-#define IBR_DEF_ATTRIB 0x00
+#define IBR_HDR_SDIO_ID 0xAE
+#define IBR_DEF_ATTRIB 0x00
/* Structure of the main header, version 0 (Kirkwood, Dove) */
struct main_hdr_v0 {
@@ -45,12 +52,12 @@
uint16_t rsvd2; /* 0x1C-0x1D */
uint8_t ext; /* 0x1E */
uint8_t checksum; /* 0x1F */
-};
+} __packed;
struct ext_hdr_v0_reg {
uint32_t raddr;
uint32_t rdata;
-};
+} __packed;
#define EXT_HDR_V0_REG_COUNT ((0x1dc - 0x20) / sizeof(struct ext_hdr_v0_reg))
@@ -60,12 +67,12 @@
struct ext_hdr_v0_reg rcfg[EXT_HDR_V0_REG_COUNT];
uint8_t reserved2[7];
uint8_t checksum;
-};
+} __packed;
struct kwb_header {
struct main_hdr_v0 kwb_hdr;
struct ext_hdr_v0 kwb_exthdr;
-};
+} __packed;
/* Structure of the main header, version 1 (Armada 370/38x/XP) */
struct main_hdr_v1 {
@@ -86,7 +93,7 @@
uint16_t reserved5; /* 0x1C-0x1D */
uint8_t ext; /* 0x1E */
uint8_t checksum; /* 0x1F */
-};
+} __packed;
/*
* Main header options
@@ -108,21 +115,21 @@
uint8_t headersz_msb;
uint16_t headersz_lsb;
char data[0];
-};
+} __packed;
/*
* Public Key data in DER format
*/
struct pubkey_der_v1 {
uint8_t key[524];
-};
+} __packed;
/*
* Signature (RSA 2048)
*/
struct sig_v1 {
uint8_t sig[256];
-};
+} __packed;
/*
* Structure of secure header (Armada 38x)
@@ -145,7 +152,34 @@
uint8_t next; /* 0x25E0 */
uint8_t reserved4; /* 0x25E1 */
uint16_t reserved5; /* 0x25E2 - 0x25E3 */
-};
+} __packed;
+
+/*
+ * Structure of register set
+ */
+struct register_set_hdr_v1 {
+ uint8_t headertype; /* 0x0 */
+ uint8_t headersz_msb; /* 0x1 */
+ uint16_t headersz_lsb; /* 0x2 - 0x3 */
+ union {
+ struct {
+ uint32_t address; /* 0x4+8*N - 0x7+8*N */
+ uint32_t value; /* 0x8+8*N - 0xB+8*N */
+ } __packed entry;
+ struct {
+ uint8_t next; /* 0xC+8*N */
+ uint8_t delay; /* 0xD+8*N */
+ uint16_t reserved; /* 0xE+8*N - 0xF+8*N */
+ } __packed last_entry;
+ } data[];
+} __packed;
+
+/*
+ * Value 0 in register_set_hdr_v1 delay field is special.
+ * Instead of delay it setup SDRAM Controller.
+ */
+#define REGISTER_SET_HDR_OPT_DELAY_SDRAM_SETUP 0
+#define REGISTER_SET_HDR_OPT_DELAY_MS(val) ((val) ?: 1)
/*
* Various values for the opt_hdr_v1->headertype field, describing the
diff --git a/tools/kwboot.c b/tools/kwboot.c
index 4be094c..7feeaa4 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -26,12 +26,6 @@
#include <sys/mman.h>
#include <sys/stat.h>
-#ifdef __GNUC__
-#define PACKED __attribute((packed))
-#else
-#define PACKED
-#endif
-
/*
* Marvell BootROM UART Sensing
*/
@@ -68,7 +62,7 @@
uint8_t _pnum;
uint8_t data[128];
uint8_t csum;
-} PACKED;
+} __packed;
#define KWBOOT_BLK_RSP_TIMEO 1000 /* ms */
@@ -471,7 +465,7 @@
ssize_t nin, nout;
char _buf[128], *buf = _buf;
- nin = read(in, buf, sizeof(buf));
+ nin = read(in, buf, sizeof(_buf));
if (nin <= 0)
return -1;
@@ -485,13 +479,14 @@
return 0;
buf++;
nin--;
- } else
+ } else {
while (*s > 0) {
nout = write(out, quit, *s);
if (nout <= 0)
return -1;
(*s) -= nout;
}
+ }
}
}
@@ -564,7 +559,9 @@
}
} while (quit[s] != 0);
- tcsetattr(in, TCSANOW, &otio);
+ if (in >= 0)
+ tcsetattr(in, TCSANOW, &otio);
+ printf("\n");
out:
return rc;
}
@@ -637,7 +634,7 @@
}
image_ver = image_version(img);
- if (image_ver < 0) {
+ if (image_ver != 0 && image_ver != 1) {
fprintf(stderr, "Invalid image header version\n");
errno = EINVAL;
goto out;
@@ -648,6 +645,11 @@
else
hdrsz = KWBHEADER_V1_SIZE(hdr);
+ if (size < hdrsz) {
+ errno = EINVAL;
+ goto out;
+ }
+
csum = kwboot_img_csum8(hdr, hdrsz) - hdr->checksum;
if (csum != hdr->checksum) {
errno = EINVAL;