ARM: tegra: add lane tables to Tegra210 XUSB padctl
Add the tables defining which pads and mux options exist in the Tegra210
XUSB padctl hardware.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
diff --git a/arch/arm/mach-tegra/xusb-padctl-common.h b/arch/arm/mach-tegra/xusb-padctl-common.h
index 11ecb99..f44790a 100644
--- a/arch/arm/mach-tegra/xusb-padctl-common.h
+++ b/arch/arm/mach-tegra/xusb-padctl-common.h
@@ -45,8 +45,8 @@
int iddq;
};
-#define MAX_GROUPS 3
-#define MAX_PINS 6
+#define MAX_GROUPS 5
+#define MAX_PINS 7
struct tegra_xusb_padctl_group {
const char *name;