rockchip: rk3188: move usb uart init into arch_cpu_init()

The SoC feature init will be better to use arch_cpu_init() and
goes to soc file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c
index 017bc6e..05ae3ec 100644
--- a/arch/arm/mach-rockchip/rk3188-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3188-board-spl.c
@@ -17,10 +17,7 @@
 #include <asm/io.h>
 #include <asm/arch-rockchip/bootrom.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/grf_rk3188.h>
-#include <asm/arch-rockchip/hardware.h>
 #include <asm/arch-rockchip/periph.h>
-#include <asm/arch-rockchip/pmu_rk3188.h>
 #include <asm/arch-rockchip/sdram.h>
 #include <dm/root.h>
 #include <dm/test.h>
@@ -70,6 +67,11 @@
 	return BOOT_DEVICE_MMC1;
 }
 
+__weak int arch_cpu_init(void)
+{
+	return 0;
+}
+
 void board_init_f(ulong dummy)
 {
 	struct udevice *dev;
@@ -88,24 +90,7 @@
 	printascii("U-Boot SPL board init");
 #endif
 
-#ifdef CONFIG_ROCKCHIP_USB_UART
-	rk_clrsetreg(&grf->uoc0_con[0],
-		     SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK,
-		     1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT |
-		     1 << COMMON_ON_N_SHIFT);
-	rk_clrsetreg(&grf->uoc0_con[2],
-		     SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT);
-	rk_clrsetreg(&grf->uoc0_con[3],
-		     OPMODE_MASK | XCVRSELECT_MASK |
-		     TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK,
-		     OPMODE_NODRIVING << OPMODE_SHIFT |
-		     XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT |
-		     1 << TERMSEL_FULLSPEED_SHIFT |
-		     1 << SUSPENDN_SHIFT);
-	rk_clrsetreg(&grf->uoc0_con[0],
-		     BYPASSSEL_MASK | BYPASSDMEN_MASK,
-		     1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT);
-#endif
+	arch_cpu_init();
 
 	ret = spl_early_init();
 	if (ret) {
diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c
index 933484e..f7e12a9 100644
--- a/arch/arm/mach-rockchip/rk3188/rk3188.c
+++ b/arch/arm/mach-rockchip/rk3188/rk3188.c
@@ -7,11 +7,12 @@
 #include <asm/arch-rockchip/grf_rk3188.h>
 #include <asm/arch-rockchip/hardware.h>
 
+#define GRF_BASE	0x20008000
+
 #ifdef CONFIG_DEBUG_UART_BOARD_INIT
 void board_debug_uart_init(void)
 {
 	/* Enable early UART on the RK3188 */
-#define GRF_BASE	0x20008000
 	struct rk3188_grf * const grf = (void *)GRF_BASE;
 	enum {
 		GPIO1B1_SHIFT		= 2,
@@ -34,3 +35,28 @@
 		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
 }
 #endif
+
+int arch_cpu_init(void)
+{
+#ifdef CONFIG_ROCKCHIP_USB_UART
+	struct rk3188_grf * const grf = (void *)GRF_BASE;
+
+	rk_clrsetreg(&grf->uoc0_con[0],
+		     SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK,
+		     1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT |
+		     1 << COMMON_ON_N_SHIFT);
+	rk_clrsetreg(&grf->uoc0_con[2],
+		     SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT);
+	rk_clrsetreg(&grf->uoc0_con[3],
+		     OPMODE_MASK | XCVRSELECT_MASK |
+		     TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK,
+		     OPMODE_NODRIVING << OPMODE_SHIFT |
+		     XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT |
+		     1 << TERMSEL_FULLSPEED_SHIFT |
+		     1 << SUSPENDN_SHIFT);
+	rk_clrsetreg(&grf->uoc0_con[0],
+		     BYPASSSEL_MASK | BYPASSDMEN_MASK,
+		     1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT);
+#endif
+	return 0;
+}