| commit | 444c46413fb691c7abbb2bec3ed498ab08fa36f8 | [log] [tgz] |
|---|---|---|
| author | Rick Chen <rick@andestech.com> | Thu Nov 14 13:52:27 2019 +0800 |
| committer | Andes <uboot@andestech.com> | Tue Dec 10 08:23:10 2019 +0800 |
| tree | 6649bffbc1673264e11cd66d362c74e53508a289 | |
| parent | 31dae22faa65534cb71631f6c74cbdcf4930a339 [diff] |
riscv: Fix clear bss loop in the start-up code For RV64, it will use sd instruction to clear t0 register, and the increament will be 8 bytes. So if the difference between__bss_strat and __bss_end was not 8 bytes aligned, the clear bss loop will overflow and acks like system hang. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Cc: Alan Kao <alankao@andestech.com>