tree c549887069235d35144830a8ec0bcf9346c1d1ca
parent eb4e18e89eec8d63f064cb5ec597ba9387fe4987
author Lokesh Vutla <lokeshvutla@ti.com> 1337645004 +0000
committer Albert ARIBAUD <albert.u.boot@aribaud.net> 1341662843 +0200

OMAP5: ADD precalculated timings for ddr3

Adding precalculated timings for ddr3 with 1cs
adding required registers for ddr3

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>