diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h
index b311f4c..8930210 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -28,7 +28,7 @@
 #define CONFIG_X86_MRC_ADDR			0xfffa0000
 #define CONFIG_CACHE_MRC_SIZE_KB		512
 
-#define CONFIG_COREBOOT_SERIAL
+#define CONFIG_X86_SERIAL
 
 #define CONFIG_SCSI_DEV_LIST		{PCI_VENDOR_ID_INTEL, \
 			PCI_DEVICE_ID_INTEL_NM10_AHCI},	      \
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index 2581380..990a2d1 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -49,7 +49,7 @@
 	{PCI_VENDOR_ID_INTEL,		\
 			PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
 
-#define CONFIG_COREBOOT_SERIAL
+#define CONFIG_X86_SERIAL
 
 #define CONFIG_STD_DEVICES_SETTINGS     "stdin=usbkbd,vga,serial\0" \
 					"stdout=vga,serial,cbmem\0" \
diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
index b9db6b7..eadb339 100644
--- a/include/configs/crownbay.h
+++ b/include/configs/crownbay.h
@@ -20,7 +20,7 @@
 #define CONFIG_X86_RESET_VECTOR
 #define CONFIG_NR_DRAM_BANKS		1
 
-#define CONFIG_COREBOOT_SERIAL
+#define CONFIG_X86_SERIAL
 #define CONFIG_SMSC_LPC47M
 
 #define CONFIG_PCI_MEM_BUS		0x40000000