| commit | 40e7bcdee72830fa51d9e98428f1a61f9126527e | [log] [tgz] |
|---|---|---|
| author | Marek Vasut <marex@denx.de> | Mon Sep 15 01:29:08 2014 +0200 |
| committer | Marek Vasut <marex@denx.de> | Mon Oct 06 17:46:50 2014 +0200 |
| tree | b2cd09665f2813bd3f5de81840c9979f85f77347 | |
| parent | 9ca2116ce49449602eb9e2f8a0cafe811bcc3086 [diff] |
arm: socfpga: cache: Enable D-Cache The code is now fixed to the point where we can safely enable the L1 data cache. Enable the D-Cache and set it as write-alloc. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>