| commit | 3f0be8ea9217311ec41156fd89e3e23a0308f3b2 | [log] [tgz] |
|---|---|---|
| author | Pankaj Bharadiya <pankaj.bharadiya@ti.com> | Thu Sep 13 09:38:16 2012 +0000 |
| committer | Tom Rini <trini@ti.com> | Tue Oct 23 08:33:17 2012 -0700 |
| tree | ba21021eefcd5ca701b0b689b272f06689df633b | |
| parent | 39826f09978a0a7070999acc15babf88f03e4051 [diff] |
USB: musb_udc: Make musb_peri_rx_ep check for MUSB_RXCSR_RXPKTRDY The endpoint rx count register value will be zero if it is read before receive packet ready bit (PERI_RXCSR:RXPKTRDY) is set. Check for the receive packet ready bit (PERI_RXCSR:RXPKTRDY) before reading endpoint rx count register. Proceed with rx count read and FIFO read only if RXPKTRDY bit is set. Signed-off-by: Pankaj Bharadiya <pankaj.bharadiya@ti.com> Signed-off-by: Tom Rini <trini@ti.com>