x86: ivybridge: Enable the MRC cache
This works correctly now, so enable it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Dropped malloc() and adjusted commit message:
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index d9b3dfc..4372a5c 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -158,14 +158,8 @@
if (!mrc_cache)
return -ENOENT;
- /*
- * TODO(sjg@chromium.org): Skip this for now as it causes boot
- * problems
- */
- if (0) {
- pei_data->mrc_input = mrc_cache->data;
- pei_data->mrc_input_len = mrc_cache->data_size;
- }
+ pei_data->mrc_input = mrc_cache->data;
+ pei_data->mrc_input_len = mrc_cache->data_size;
debug("%s: at %p, size %x checksum %04x\n", __func__,
pei_data->mrc_input, pei_data->mrc_input_len,
mrc_cache->checksum);